JPH0478280A - Still video camera provided with removable recording medium - Google Patents

Abstract

PURPOSE:To improve the operability by transferring and recording a recorded picture to a removable 2nd picture recording medium from a camera. CONSTITUTION:Whether or not an IC card 41 is loaded to a camera is discriminated and when the IC card is loaded to the camera, the state of a memory of the IC card 41 is inputted from a signal processing CPU 51 and a signal CSDP is brought into logical H to make the communication complete. When the IC card is not recorded and the internal memory has a recorded picture, and when the processing of all picture data recorded in the internal memory is finished, number of frames stored in the internal memory 40 is subtracted from number of frames able to be recorded on the IC card 41 and the resulting frame number is displayed for the recordable frame number onto the IC card 41 to make the processing complete.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a still video camera that converts still images into electrical signals and records them on an electronic recording medium.

[Conventional technology]

In a still video camera, after an image is recorded on a recording medium that is detachable from the camera, such as an IC card,
It has been proposed to remove this and attach it to another reproducing device, such as a CRT display device or a printer, to reproduce recorded images.

In addition, a camera has been proposed that is equipped with an internal memory in addition to a recording medium such as an IC card, and is capable of recording images even when no recording medium such as an IC card is attached.

[Problems to be Solved by the Invention] Among the conventional still video cameras described above, in the case of the latter, the camera body must be connected to a CRT display device or a printer in order to play back images recorded in the internal memory. This was extremely inconvenient in terms of operability.

This invention aims to solve the above problems.

[Means to solve the problem]

In order to solve the above-mentioned problems, this invention enables image signals recorded in an internal memory to be transferred and recorded on a removable recording medium such as an IC card, and is equipped with an image recording area for multiple frames. A still video camera comprising a first image recording medium disposed inside and a second image recording medium having an image recording area for a plurality of frames and detachable from the camera body. Detecting means for detecting the attachment state of the image recording medium of No. 2 to the camera body;
When the detection means detects that the second image recording medium is attached to the camera body, the image signal recorded on the first image recording medium is transferred to the second image recording medium. The present invention is characterized by comprising a control means for transferring and recording to a possible area.

[For production]

When the second image recording medium, which is removably attached to the camera body, is attached to the camera body, the image signal recorded on the first image recording medium placed inside the camera body is read out. The image is recorded in the recordable area of the second image recording medium. This allows all recorded image recording signals to be recorded on a removable recording medium and taken out from the camera body.

〔Example〕

Examples of the present invention will be described below. FIG. 1 is a perspective view showing the external appearance of the camera according to the present invention, in which 1 is the camera body, 2 is the photographing lens, 3 is the opening/closing knob for the lens protection barrier, and 4 is the shirt button, which is pressed in the first step. Switch S1, which will be described later, closes, and pressing the second step closes switch S2.
closes.

A display section 5 displays the frame number of the recorded image, the presence or absence of an IC card, the date, and other operational status of the camera.

6 is a finder window, 7 is a light projection window for macro photography, 8 is an insertion slot for an IC card for recording images, 9 is a connection part for a flash device, and 10 is a contact point for connecting the camera body and the flash device. Next, the operation switch will be explained. S
3 is a slide type mode changeover switch for changing various functions of the camera, and the modes that can be selected are as follows.

OFF: Activation of the camera is prohibited.

REC: Recording mode, in which images are recorded on the camera's internal memory or a removable external recording medium (hereinafter referred to as an IC card).

PLAY: Playback mode, in which images recorded in the internal memory or IC card are played back and a video signal is output. Based on this signal, the recorded image is reproduced on a video display device (not shown).

ERASE-ALL: Erase mode that erases all images recorded on the internal memory and IC card.

ERASE-SINGL: This is a single camera erase mode that erases one frame of the photographed image recorded on the internal memory or IC card. Even in this mode, images protected by the protect function described later are not erased.

S4. S5 is an access switch, switch S4 (U
P) functions as a switch for sequentially advancing the recorded images during image reproduction, and functions as a switch for increasing the date when setting the date. Further, the switch S5 (DOWN) functions as a switch for reversing the recorded image during image reproduction, and functions as a switch for decreasing the date when setting the date.

S6 is a protect switch that protects images recorded in the internal memory or IC card from being accidentally erased, and is displayed as rPROT, J. When the switch S6 is in the OFF position, the protect function does not work, and when it is in the ON position, the protect function works.When the switch S6 is in the REMOVE position, that is, the release position, the protected state of the -degree protected image is Release.

S7 is a protect/erase activation switch, and mode selector switch 3 is ERASE (SINGL).

When the protection switch S6 is turned on when it is in the ALL position (which may be in either position), an erase operation is executed, and when it is turned on when the protect switch S6 is in the PROT position, a protect operation is executed.

S8 is a frame advance changeover switch for changing whether frame advance is performed automatically or manually during playback of recorded images.When set to AUTO1, that is, automatic, the access switch S4.
Regardless of the operation in S5, the recorded images are automatically advanced frame by frame at regular intervals and sequentially reproduced. Also, when set to MANUAL, access switch S4. The frame is advanced one frame at a time by the operation in S5.

S9 is a switch for macro photography, and S10 is a switch for setting flash photography.

S12 is a mode switch for setting the date, and each time it is turned on, it changes Y (year) - M (month) - D (day) - H (hour) - Ml (
The mode is switched cyclically in the order of minutes) → Y (years).

A date setting switch 813 is used to set data for the mode selected by the switch S12.

FIG. 2 shows a block diagram of the camera control circuit.

30 is a CPU that controls the entire camera, and 31 is a signal processing section that performs recording and reproduction processing of video signals. The details will be described later. 32 is a solid-state imaging device (hereinafter referred to as CCD) made of a CCD or the like, which converts an image incident from the photographing lens 2 into a video signal. 33 is a correlated double sampling unit for the video signal output from the previous Me CCD, 34 is an A/D converter that converts the video signal into a digital signal, and 35 is a CC
This is a clock generation circuit that synchronizes the D32, the sampling section 33, and the A/D converter 3°4, and is controlled by control signals INREL and EXSTP output from the CPU 30. 36
is a photometric circuit that measures the subject brightness and sends the measurement results to the CPU.
30 and also operates as a dimming circuit to control the dimming of flash light. 37 is a flash device, which includes a light emitting part and a charging capacitor. 38 is the power supply,
It is controlled by a control signal PWC output from the CPU 30. 5 is the display section, which displays the number of image frames and other information as explained earlier; LA is the lamp for illumination during macro photography; P
L is an electromagnetic plunger for shutter operation.

40 is the internal memory built into the camera, at least 1
It has an image recording capacity for frames (10 frames in this embodiment). Reference numeral 41 denotes an IC card that can be attached to and removed from the camera body, and is equipped with a semiconductor memory such as an SRAM, and has an image storage capacity for a plurality of frames (32 frames in this embodiment).

Next, the switches will be described. Sl is a switch that is turned on when the release button 4 is pressed to the second stage, and $2 is a switch that is turned on when the release button 4 is pressed to the second stage. S3 to S9 and Sll-S13 are switches whose operation parts are shown on the camera body shown in FIG. 1, and their functions are as described above in FIG. 1. The SIO is a switch that is turned on when the IC card 41 is inserted into the insertion section 8 of the camera body, and outputs a signal indicating that the IC card 41 is installed.

Next, the signals transmitted through the signal line will be explained.

CHSTA is a signal that instructs the capacitor of the flash device 37 to start charging, CHC is a signal that indicates the completion of charging the capacitor of the flash device 37, FLSTA is a signal that instructs the flash device 37 to emit a flash, FST
OP is a signal that instructs the flash to stop emitting light when the amount of light from the flash detected by the photometry circuit 36 reaches a predetermined value (when dimming is completed).

INREL is the shirt release start signal, and CPU30
The signal is output from the clock generating circuit 35 to the clock generating circuit 35. In response to this signal, the clock generation circuit 35 outputs a signal EXSTA indicating the start of exposure control to the CPU 30. EXSTP is an exposure control end signal, which is sent from the CPU 30 to the clock generation circuit 3.
5 is output. Also, the shirt release start signal I
NREL and the exposure control end signal EXSTP are also output to a signal processing section 31, which will be described later.

C5DP is a signal that controls the transmission of signals between the CPU 30 and the signal processing unit 31, 5OUT and SIN are data signals transmitted as serial data between the CPU 30 and the signal processing unit 31, and SCK is a signal that is transmitted from the CPU 30 to the signal processing unit 31
BUSY is a signal that informs the CPU 30 that the signal processing section 31 is processing the signal, LBC is a signal that indicates that macro photography is being executed, and VOUT is output from the signal processing section 31. It is a video signal.

FIG. 3 is a block diagram showing details of the signal processing section 31. 51 is a signal processing CP that controls the entire signal processing section 31
U, 52 is a signal processing circuit that processes video signals (including compression), and 53 is an address generation circuit that receives a clock signal from the clock generation circuit 35 and generates an address signal.

54 is a signal RD/CD output from the signal processing circuit 52
Based on the address signal output from the address generation circuit 53, that is, the address signal bus used when recording the video signal output from the CCD 32 in the buffer memory 55, and the address when using the buffer memory 55 during signal processing. A multiplexer that selects one of the signal buses.

56 is a signal Di/D output from the signal processing CPU 51
2, the address signal bus ADB1.2 output from the signal processing circuit 52. That is, the address signal bus used when recording and reproducing video signals to and from the internal video recording memory 40 and the IC card 41 is used, and the signal processing CPU 51 outputs data signals other than the video signal, such as frame numbers, protect data, etc. This is a multiplexer that selects either the address signal bus ADB2 when recording the signal in the internal memory 40 or the IC card 41.

57 is a signal DI/D output from the signal processing CPU 51
This multiplexer selects a video signal bus DBI and a data signal bus DB2 other than video signals such as frame numbers, protect data, erase data (ERASE), protect removal data (REMOVE), and chronograph data based on 2.

Further, 58 is a D/A converter that converts a digital signal into an analog signal when outputting a video signal.

Next, the signals transmitted through the signal line will be explained. Among the signals output from the signal processing CPU 51, ENA is a signal that allows signal processing in the signal processing circuit 52, and REC/P
LAY is a signal R that controls whether signal processing in the signal processing circuit 52 is executed in recording mode or reproduction mode.
E/WR is internal memory 40. A signal that controls writing/reading of video signals to and from the IC card 41; ERASE is a signal that controls erasing of video signals recorded in the internal memory 40 and the IC card 41; C5OUT is a signal that controls erasing of video signals recorded in the internal memory 40 and the IC card 41;
C3IN is a signal that controls data communication with the internal memory 40.

FIG. 4 is a perspective view showing the external appearance of a flash device that can be attached to and detached from a camera according to the present invention. A connection part 21 that engages with the flash device connection part 9 of the camera body 1 is provided with a connection electrical contact 22 and comes into contact with the electrical contact 10 of the camera body 1 . 23 indicates a light emitting part.

FIG. 5 shows a circuit diagram of the flash device. Since this circuit is a well-known circuit, its configuration and operation will be briefly explained. In the figure, 61 is a power supply battery, 62 is a D C/D
A booster circuit consisting of a C converter, 63 a main capacitor for charge storage, 64 a neon tube, 65 a trigger circuit, 66
indicates a xenon discharge tube, and 67 indicates a cyrisk.

Next, to explain its operation, the CPU 3 of the camera
When the signal CHSTA instructing the start of charging, which is applied to the terminal L1 from 0 to
It is charged to 3. When the terminal voltage of the main capacitor 63 reaches a predetermined value, the signal CHC applied to the terminal L3 becomes "H".
This notifies the CPU 30 of completion of charging. Camera C
When the signal FLSTA applied to the terminal L4 from the PU 30, which instructs the flash to emit light, becomes H'', the trigger circuit 65 operates, and the xenon discharge tube 66 starts emitting light.The camera's photometry circuit 36 detects the reflection from the subject. When the light is detected and a predetermined amount of light is reached, the light emission stop signal FLSTP applied to the terminal L5 becomes "H", and a reverse bias voltage is applied to the thyristor 67, so that the light emission is stopped.

The configuration of the imaging section will be explained. FIG. 6 is a cross-sectional view taken along a plane including the optical axis of the imaging section, in which 2 is a spherical lens with a focal length f, and 70 is the imaging surface of the lens 2, which is spherical.

71 is an optical fiber whose input end is a spherical imaging surface 70
The emission ends are arranged on the surface of the CCD 32. If the optical fiber 71 has a magnification of 3 times, it is possible to form the same image on the CCD 32 as the image having the focal length fX3. By using an optical fiber that has several times the magnification, the thickness of the imaging section can be made as thin as the focal length of the lens and the size of a part of the optical fiber (for example, 3 mm), and it is also possible to By combining them, it is possible to make the camera body thinner.

The advantages of using a spherical lens as a photographic lens are as follows. Generally, when a spherical lens is used to form an image of an object at infinity, the imaging surface becomes a spherical surface concentric with the spherical lens due to the spherical symmetry of the spherical lens. Therefore, in a spherical lens, axial and off-axis aberrations have equivalent values, and if a substantially good axial aberration correction can be achieved, off-axis aberrations will also be corrected. Therefore, even though the optical system is smaller and simpler than a normal lens system, if appropriate aberration correction is applied, it is possible to obtain a lens with low peripheral illumination and bright imaging performance. It is something.

Next, the camera control operation executed by the CPU 30 is
This will be explained with reference to the flowchart shown in FIG. 17.

FIG. 7 is a flowchart showing an outline of the overall control, and shows that the states of various switches are checked and the process moves to a processing routine corresponding to the switch. With the start of control operation,
First, it is checked whether the mode changeover switch S3 is set to the OFF position, and if it is OFF, the process moves to the OFF processing routine (step P100.PIOI). It is checked whether the mode changeover switch S3 is set to REC1, that is, the recording mode, and if it is the recording mode, the process moves to a recording mode processing routine (steps P102 and P103). Check the state of the switch S1, which is turned on by pressing the shirt release button one step, and if it is turned on, proceed to the SI ON processing routine (steps P104 and P105), and check whether the mode changeover switch S3 is set to PLAY, that is, playback mode. If it is in the playback mode, proceed to the playback mode processing routine (step P106゜P2O3) Check whether the mode changeover switch S3 is set to ERASE, that is, erase mode, and if it is in the erase mode, proceed to the playback mode processing routine. Move to the routine (step P108゜P2O
3) Check the status of access switch S4 (UP),
When it is turned on, the process moves to S4 processing routine (steps PI 10 and PI 11). access switch S5
Check the status of (DOWN), and if it is ON, S5
The process moves to the processing routine (steps P112 and P113).

It is checked whether the frame advance changeover switch S8 is set to AUTO1, that is, automatic mode, and if it is automatic mode, the process moves to the automatic mode processing routine (steps P114 and P11).
5) Check whether the frame advance changeover switch S8 is set to MANUAL, that is, manual mode, and if it is in manual mode, proceed to the manual mode processing routine (step P1
16°P117). Check the status of the date setting switch S13, and if it is ON, proceed to the date processing routine (step P
118. PI 19).

FIG. 8 shows step P10 of the flowchart shown in FIG.
This is a processing routine when the mode changeover switch S3 shown as 1 is OFF. First, reset the timer for each boat (step P131), determine whether the display indicating that the protect function is in operation is ON, and if it is ON, turn the display OFF (step P132, P13).
3). It is determined whether the end display indicating that the number of frames of recorded images has reached the recordable number of frames is ON or not, and if it is ON, the display is turned OFF (steps P134 and P135), and the IC card 41 is inserted into the camera body. It is determined whether or not the display indicating the insertion is ON, and if it is ON, the display is turned OFF (step P137). Step P138.Turn off the date display and turn off the counter display indicating the number of frames of recorded images. P139), and sets the signal PWC to the power supply 38 to "H" to shut off the power supply circuit (step P140).
, return to the main routine.

FIG. 9 shows step P10 of the flowchart shown in FIG.
The mode selector switch S3 shown as 3 is in recording mode (
The recording mode processing routine in the case of REC) is shown.First, the mode changeover switch S3 is set from OFF to REC! If the switch has been made, the signal PWC is set to "L" and the power supply 38 is turned on (Step P152). It is determined whether the IC card 41 is inserted into the camera or not. When inserted, the IC card display is turned ON (Step P154), the signal C3DP is set to "L", and the signal processing CPU 51 sends card data indicating the recording status (number of recorded frames, etc.) of the IC card 41. received, and after the end of communication, signal C3D
Communication is ended by setting P to "H" (step P155.
P156. P157). It is determined whether or not the recording section of the IC card 41 is negative and recording is not possible (step P158). If recording is not possible, the end display is turned on, the counter display indicating the number of recordable frames is turned on, and the date display is turned on. as (
Step P160. P161. P162), returning to the main routine. If it is determined in step P158 that there is an unrecorded portion on the IC card and that recording is possible, step P160 is omitted.

When it is determined in step P153 that the IC card 41 is not inserted, the signal C3DP is set to "L" and the signal processing CPU 51 sends the recording state of the internal memory 40 (
After receiving memory data indicating the number of recorded frames, etc., and after completing the communication, the signal C5DP is set to "H" to end the communication (steps P165, P166, P167), and the process moves to step P161.

If it is determined in step P151 that the switch has not been switched from OFF to REC, it is determined whether or not the mode selector switch $3 has been switched from PLAY to REC.
70), if switched, turn off the PLAY display on the display.
F, and the signal C5DP is set to "L" and the PL is sent to the signal processing section.
A signal indicating that AY has been switched to REC is output, and the signal C3DP is set to "H" to end the reception signal (steps P171, P172, P173 and P174), and the process returns to the main routine.

10(a) to 10(f) show a processing routine when the switch S1, which is turned on by the first press of the release button, shown as step P105 in the flowchart shown in FIG. 7, is turned on.

First, it is determined whether or not it is in the recording mode (REC) (step P2O1). If it is not in the recording mode, the display on the display unit 5 is blinked and the switch S1 is turned OFF to indicate that photography is not possible. Wait for and return to the main routine (
Step P2O7゜P2O8).

If the recording mode is determined in step P2O1, it is determined whether the frame number display counter of the recorded image is O or not.
2O2), if it is 0, it indicates that it is impossible to record any more images, so timer 1 is set to a predetermined value of 1 to start timing and the counter display is blinked (step P2O2).
3゜P2O4). Wait for timer 1 to finish counting, and switch the counter display to continuous lighting (steps P2O5゜P2O6)
), return to the main routine.

If the counter is not O in the judgment of step P2O2,
In other words, it indicates that photography is possible, so step P21
Proceed to processing after 0. First, it is determined whether the macro photography switch S9 is ON or not, and if it is ON, the macro photography lamp L
A is turned on (steps P210 and P211). If macro photography is not being performed, step P211 is omitted. The subject brightness measured by the photometry circuit 36 is A/D converted and input (step P212), and the macro photography switch S9 is turned on.
In step P213), if it is ON, the process moves to switch P230. If the macro photography switch is not sc++roN, it is determined whether the subject is backlit or has low brightness, step P214. P2
15), if it is neither backlit nor low brightness, step P23
Move to 0. In the case of backlight or low brightness, it is necessary to determine whether the flash photography switch Sll is ON or not in step P.
216), if it is ON, it is determined whether the signal CHC indicating the completion of charging of the main capacitor 63 of the flash device 37 is "H" or not. Step P217) If it is "H", step P
Moving on to 230. If it is not "H", set the signal CHSTA, which commands the start of charging of the main capacitor, to "H" to start charging, wait for the completion of charging, and then set the signal CHSTA to "L".
(Steps P219 and P220)
．． P221). Check whether switch S1 is ON or not, and turn it ON.
If so, the process moves to step P230, and if it is not ON, the process returns to the main routine.

In step P230, it is determined whether the flash mode is selected. In the case of flash mode, it is determined whether there is backlight or not. If it is backlight, the shutter speed TVA determined from the subject brightness is set as the shutter speed for flash control TVF, and when it is not backlight, the shutter speed TVH determined by the camera shake limit is set as the shutter speed for flash control. TVF (step P23)
1°P232 P233). If the flash mode is not selected in step P230, the shutter speed TVA determined from the subject brightness and the shutter speed TVH determined by the camera shake limit are determined. If TVA≧TVH, the TV
Let A be the exposure control shutter speed TVC, and TVA<TV
In the case of H, TVH is set as the exposure control shutter speed TVC (steps P234, P235, and P236).

Switch S that turns on when the second step of the release switch is pressed
2 is ON or not (step P237), and if it is not ON, check the switch S1, and if it is ON, return to step P237, and if it is not ON, turn off the macro photography lamp LA (steps P238 and P239).
Return to main routine.

If the switch S2 is ON as determined in step P236, the shutter actuation plunger PL is turned ON to start the exposure operation, and first the release start signal INREL is set to "L".
” to notify the clock generation circuit 35 and signal processing unit 31 of the start of release (steps P240.P241.P
242). It is determined whether the macro photography switch S9 is ON or not, and if it is ON, the signal LBC is set to "L" and the correction in the signal processing in the signal processing unit 31 is switched to WB and γ correction for photography using the lamp, and if it is not ON. If signal LB
Set C to "H" and switch to WB and γ correction for normal image manipulation (step P234, P244, P245), exposure start signal EXS output from clock generation circuit 35
Wait for TA to become "L" (step P246), and determine whether it is in flash mode (step P247)
.

When not in the flash mode, that is, in the case of normal photography, the value 2-VC is set in the timer 2 based on the previously determined shutter speed TVC for normal photography, and time counting is started.

Exposure is completed when the timer ends, and step P248.
P249°P2S5), the process moves to step P260.

If it is determined in step P247 that the flash mode is selected, timer 2 is set to the value 2 - TVF based on the previously determined shutter speed TVF for flash photography, and timekeeping is started (steps P251 and P252). A value defining the light emission timing of the device is set, and time measurement is started (steps P253 and P254). When timer 2 finishes timing before timer 3 (for example, when the light suddenly becomes bright during exposure), exposure is completed without emitting a flash, and the process moves to step P260. If the timer 3 finishes counting before the timer 2, the flash device is made to emit light, and the light emission is controlled to be stopped and the exposure is ended in step P255. P256. P25
7°P25B), the process moves to step P260.

Turn off the shutter actuating plunger PL (step P260), wait for the end of signal processing in the signal processing unit 31 (step P261), determine whether the mouth-opening switch S9 is on or not (step P262), turn it on. If so, the lamp LA is turned OFF (step P264), and the process moves to step 2269. If it is OFF, it is determined whether the flash photography switch Sll is ON. Switch Sl
If l is OFF, the process moves to step P269, and if it is ON, it is determined whether the signal CHC indicating the completion of charging of the main capacitor 63 of the flash device 37 is "H" or not.
256), in the case of "H", the process moves to step P269. If the signal CHC is not "H", the signal CHSTA, which commands the start of charging the main capacitor, is set to "H" to start charging, and after waiting for the completion of charging, the signal CHSTA is set to "L" to stop charging (steps P266, P267, P268).
).

Additional data such as date data is recorded in the internal memory 40 and IC card 41 via the data bus DB2, and the signal INREL is set to "H" to indicate the end of exposure (step P2).
69. P270).

Determine whether the protect switch S6 is set to the ON position (Step P271), and if it is not ON, turn the protect display OFF (Step P272)
, the process moves to step P280. If it is ON, timer 1 is set to a predetermined value of 1 to start timing (step P27).
3-P275). It is determined whether or not the protect/erase switch S7 is turned ON while the timer 1 is counting (Step P275). If it is ON, the video recording frame shot immediately before is protected, and the protect data is transferred to the data bus DBI. to the internal memory 40 or IC card 41, turn on the protect display, and protect / /! Wait for i1 release switch S7 to turn OFF (steps P276, P27'7, P278)
, proceed to step 280. In addition, if the switch S7 is not ON in the judgment of step P275, wait until timer 1 finishes timing, that is, if the protect/erase switch S7 is not pressed while timer 1 is counting, protection will not be performed. 1 after completion of time measurement (step P2
79), the process moves to step P280.

Decrement 1 from the contents of the piece number counter, determine whether the contents of the counter are 0, and further determine whether or not the IC card 41 is inserted (steps P280, P281, P2).
82) If the counter is not 0 and the IC card is not inserted, the process moves to step P286. When the counter is O and an IC card is inserted, the I
Since no more data can be recorded on the C card, the contents of the counter are set to 10 (the image recording capacity of the internal memory 40), the IC card recording end display is turned ON (steps P283, P2S5, P2S5), and the address bus ADB
The image data corresponding to the frame number of the counter is read from the internal memory via P1, and data indicating whether or not that frame is protected is input (step P286゜P).
2S5), it is determined whether or not protect data has already been written to that frame (Step P288); if it has been written, no image will be recorded to that frame, so the process returns to Step P280 and data for the next frame is determined. Move on to processing.

As a result of the determination in step P288, if the protect data is not written, press the first step of the release button to turn it on.
Wait until the switch S1 becomes OFF (step P289), and if it is OFF, it is determined whether the protect switch S6 is ON (step P290). When the switch S6 is ON, the timer l is set to a predetermined value of 1 to start timing, and after the protect display blinks for a predetermined time, it lights up continuously to notify that the protection is complete (steps P291 to P294>Step Proceed to P296.Protect switch S6 is OFF as determined in step P290.
In this case, the protect display is turned OFF, the next photographable frame number is displayed on the counter (steps P295 and P296), and the process returns to the main routine.

FIG. 11 is step P1 of the flowchart shown in FIG.
The function changeover switch S3 shown as 07 is in playback mode (
PLAY). First, it is determined whether the function changeover switch S3 has been switched from the REC to the PLAY position (step P301), and if it has been switched, the PLAY display is turned ON.
PLAY to the signal processing unit 31 with the signal C3DP set to “L”
Informs you that the mode has been switched.

The communication is ended by setting the signal C3DP to "H" (steps P302 to P305).If the switch S3 has not been switched from REC to PLAY as determined in step P301, the mode changeover switch S3 is switched from ERASE to PLAY.
(Step P306). If the switch has been made, the ERASE display is turned OFF and the process proceeds to Step P3.
Move to 02. In addition, if it is not switched, step P
Moving on to 308.

Determine whether or not the IC card 41 is inserted (step P308). If the IC card 41 is inserted, turn on the card display, determine whether the IC card has just been inserted in playback mode, and insert the IC card. If the IC card has just been inserted, the number of playable frames is set to 32 on the counter and the card mode is set (steps P309 to P312). Processing such as settings (step P
311. P312) is omitted. If it is determined in step P308 that the IC card is not inserted, the card display is turned OFF, and in the playback mode it is determined whether or not the IC card has just been removed.If the IC card has just been removed, the number of playable frames is set to 10 on the counter. and set the internal memory mode (steps P313 to P316). Step P3
If the IC card has been removed first in the judgment of step P315.
316) is omitted.

The counter contents are output via the address bus ADB l, the counter contents are displayed, and the image data of the corresponding address is read from the IC card 41 or the internal memory 40 and output as a video signal (steps P317 to P3
19) When the access switch S4 (UP) is pressed, the process moves to the S4 processing routine, which will be described later. When the access switch 55 (DOWN) is pressed, the process moves to the S5 processing routine, which will be described later. When is pressed, the main routine returns to the corresponding subroutine (steps P320 to P322), and the 7th access switch s4. If neither S5 nor the other mode selection switch is pressed, the process returns to step P319 and continues outputting the video signal.

12(a) to 12(c) show the erase mode processing routine when the mode changeover switch S3 shown as step P109 of the flowchart shown in FIG. 7 is in the erase mode (ERASE). In step P331), it is determined whether the switch s3 is set to ERASE-SINGLE, ERASE-3INGL.
In the case of E, that is, in the case of erasing a single piece, step P33
In the case of ERASE-ALL (7), that is, in the case of erasing all frames, the process moves to step P371.

In step P332, mode changeover switch s3 is set to PLA.
Switched from Y to S INGLE or from ALL to 5
Determine whether it has been switched to INGLE, and in the former case, P
Turn off the LAY display, and in the latter case, select “A” to indicate all pieces.
” Turn off the display (Steps P332 to P335)
. The "S" display indicating a single frame is turned on, the signal C5DP is set to "L", the signal processing CPU 51 is informed that it is in the single frame erase mode, and the signal C5DP is set to "H" to end the communication (step P336). ~P339).

Next, depending on whether or not the IC card 41 is inserted, the IC card mode or internal memory mode is set (steps P340 to P348).
Step P308 of the PLAY processing routine shown in Figure 1
~P316, so the explanation will be omitted.

Proceeding to step P350, the counter contents are output via the address bus ADBI, the counter contents are displayed, and the protect data of the image to be reproduced is read out (step P35).
0-P352), it is determined whether or not there is any protect data in the image to be reproduced, and if there is no protect data, that is, if it is not protected, the video signal is pressed, and if the protect data is recorded, it is set by 1 from the counter contents. In order to subtract the value and process the next piece, the process returns to step P350 (steps P353, P354, P2S5). Through the above-described processing, reproduction of an image in which protected data is recorded is prohibited, and the protected data will not be erased by mistake.

Determine whether or not the protect/erase activation switch S7 is turned on (step P356). If it is turned on, output the erase data to the signal processing CPU 51, wait for the completion of the erase process of the recorded image, and turn on the erase display. (Step P3
57-P359).

Wait until the protect/erase switch S7 is turned OFF (step P360), and then proceed to step P361.

If the switch S7 is not ON as determined in step P356, the process also moves to step P361.

When the access switch S4 (UP) is pressed, the process moves to the S4 processing routine described later, and the access switch S5 is pressed.
When (DOWN) is pressed, the process moves to a S5 processing routine to be described later, and when a selection switch for another mode is pressed, the process returns to the main routine and moves to the corresponding subroutine (steps P361 to P363). access switch S
4°S5: If none of the selection switches for other modes are pressed, the process returns to step P350.

When it is determined in step P331 that not a single frame is erased but all frames are erased, the process moves to step P371. First, turn off the “S” display that indicates a single piece, and turn off the “S” display that indicates all pieces.
A" display is turned on. Set signal C5DP to "L",
Notify the signal processing CPU 51 that it is in the all frame erase mode, set the signal C3DP to "H" and end the communication (steps P371 to P375), determine whether the protect/erase operation switch S7 is ON or not (step P376),
If it is ON, the erase data is output to the signal processing CPU 51, and the erase display blinks after the erase process is completed. Then, wait for switch S7 to turn OFF and turn on the erase display.
N (steps P377 to P381), it is determined whether or not the IC card 41 is inserted, and if it is inserted, the counter content is set to 32, and if it is not inserted, the counter content is set to 10 ( Steps P382-P
385), return to the main routine.

FIGS. 13(a) to 13(d) show sequential forwarding of image frames during recorded image playback and frame-by-frame image processing by operating the access switch S4 (UP), which is shown as step P111 in the flowchart shown in FIG. 7 is a flowchart showing processing such as sequential forwarding of image frames when erasing. First, it is determined whether the mode selector switch S3 is in the playback mode (PLAY) (step P401), and if it is not in the playback mode, it is determined whether it is in the frame-by-frame erase mode (S-ERASE), and if it is in the erase mode, step P401). The process moves to P441, and if it is not in the erase mode, returns to the main routine (step P40).
2).

If it is the reproduction mode as determined in step P401, it is determined whether the access switch S4 has changed from OFF to ON, and each time the access switch S4 changes from OFF to ON, the process proceeds to step P405 (steps P403 and P404). Add 1 to the contents of the counter (step P405), determine whether or not the IC card 41 is inserted (step P406), and if it is inserted, determine whether the counter contents have become 33 (step P407). ). Counter content is 33
In the case of , it means that the reproduction of all the frames recorded on the IC card 41 has been completed, so the counter is set to 1 and the internal memory mode is set for reproduction of the images recorded on the internal memory 40 ( Step P408.P409
). If the counter content is not 33 in the determination at step P407, whether or not the internal memory mode is set;
In the case of internal memory mode, it is determined whether the counter contents are 11 or not (steps P410 and P411). If the counter contents are 11, it means that the reproduction of all the frames recorded in the internal memory 40 has been completed. The counter is set to 1, and the IC card mode is set for reproducing images recorded on the IC card 41 (step P412.P
413), step P410. If the determination in P411 is negative, the process moves to step P416. Also, step P4
If the IC card is not inserted in the judgment of 06, it is judged whether the counter content is 11 or not, and if it is 11, the counter is set to 1, and if it is not 11, immediately step P4
16 (steps P414 to P415).

The contents of the counter are input via the address bus ADB 1, the IC card 41 or internal memory 40 is accessed, the counter contents are displayed, and the image data of the frame at the corresponding address is read from the IC card 41 or internal memory 40. , output as a video signal (step P416
~P418).

The protection data of the frame being played is read out, and it is determined whether the image being played back is protected (step P
419. P420), if the result of the judgment is that the protection is protected, the protect display is turned ON and the protect switch S6 is set to the release position (REMOVE) where the protection is released.
), and if it is at the release position, press release data, turn off the protect display (steps P422 to P424), and return to step P401. If switch S4 is not in the release position, immediately proceed to step P4.
Return to 01.

If it is determined in step P420 that the protect switch is not protected, it is determined whether the protect switch S6 is in the ON position, and if it is in the ON position, a predetermined value of 2 is set in timer 1;
Timing is started (steps P425 to P427). If the switch S6 is not in the ON position as determined in step P425, the process returns to step P401. While the timer l is counting time, it is determined whether or not the protect/erase switch S6 is turned on (step P428). If it is turned on, the protect data is output to the IC card or internal memory via the data bus DB2. Write and protect display to O
N, waits until the switch S6 is turned off (steps P429 to P432), and returns to step P401.

Note that in the above embodiment, the time when the protect switch S6 is operated is defined as 2 in the time set in the timer 1, and the switch S6 is protected only when it is operated during this time. For example, when switching to the next image, a protectable time may be defined.

The case where the determination in step P402 is single horse elimination mode will be explained. Of this process, steps P441 to P4
55 (FIG. 13(C)) is the step P403 to P417 (FIGS. 13(a) and (b)) in the playback mode.
Since the contents of the processing are the same, the explanation will be omitted here.

In step P456, the protect data of the image to be played back is read out. It is determined whether or not the image to be played back has protect data. If there is no protect data, that is, if it is not protected, a video signal is output and the protect data is recorded. If so, the process moves to step P443 to process the next frame (steps P457 to P458).The above process prohibits the reproduction of the protected image and prevents it from being erased by mistake.

It is determined whether or not the protect/erase operation switch S7 is turned on (step P459), and if it is turned on, the erase data is output to the signal processing CPU 51, and the erase display is turned on after waiting for the completion of the erase processing of the recorded image. (Step P45
9-P462).

Then, the process moves to step P401 after waiting for the switch S7 to turn off. If the switch S7 is not ON as determined in step P459, the process also moves to step P401.

FIGS. 14(a) to 14(d) are flowcharts for operating the access switch S5 (DOWN), which is shown as step P113 in the flowchart shown in FIG. First, function selector switch $3 is set to playback mode (PLA
Step P501) to determine whether Y) or not, and if it is not the playback mode, the frame-by-frame erase mode (S-ERASE)
If it is the erase mode, step P541
and if not in erase mode, return to the main routine (
Step P502).

If it is determined in step P501 that the access switch S5 is in the playback mode, it is determined whether or not the access switch S5 has changed from OFF to ON (step P503 P2O3), and each time the access switch S5 changes from OFF to ON, 1 is subtracted from the contents of the counter ( Step P505). It is determined whether the IC card 41 is inserted (step P506), and if it is inserted, it is determined whether the counter content has become 0 (step P507). If the counter content is 0, the IC card 41
This means that the reproduction of all the frames recorded in is completed, so the counter is set to 10 and the internal memory mode is set for reproduction of the images recorded in the internal memory 40 (steps P508 and P509). If the counter content is not O in the determination at step P507, it is determined whether the internal memory mode is set, and if the internal memory mode is set, it is determined whether the counter content is O (step P510).
．． P511), if the counter content is 0, internal memory 4
Since this means that the reproduction of all the frames recorded at 0 has been completed, the counter is set to 32 and the IC card mode is set for reproduction of the image recorded on the IC card 41 (steps P512 and P513). Step P510
．． If the determination at P511 is negative, the process moves to step P516. Further, if it is determined in step P506 that no IC card is inserted, it is determined whether the counter content is O or not, and if it is 0, the counter is set to 10, and if it is not 0, the process immediately moves to step P516 (step P514).゜P515).

Processing to output video signals from image recording frames, protection/
The processing of steps P516 to P532 for recording and canceling protected data by operating the erase operation switch S6 is the same as step P in the processing of the access switch S4.
Since it is the same as the processing from 416 to P432, the explanation will be omitted here.

The processing when the determination in step P502 is the single frame erase mode will be described. This process starts from step P541, but steps P541 to P555 (Fig. 14 (C
)) is performed in steps P503 to P503 in the playback mode.
The processing content is the same as 517 (FIGS. 14(a) and 14(b)). Further, steps P556 to P563 (the process in FIG. 14(d) is a single cylinder deletion process, but this process is performed at step P456 in the process of the access switch S4).
~P463 The processing contents are the same as the processing shown in FIG. 13(d). Therefore, the explanation is omitted here.

FIGS. 15(a) to 15(c) show automatic frame speed (AUTO) processing during image playback, selected by the frame advance changeover switch S8, shown as step P115 in the flowchart shown in FIG. It is a flowchart which shows.

When automatic piece speed is selected by operating switch S8,
First, the function selector switch S3 is set to the image playback mode (PLAY).
) or frame-by-piece erase mode (S-ERASE)
Step P601. P602), the process proceeds to step P603 and subsequent steps only in these two modes.

It is determined whether the access switch $4 has changed from OFF to ON, and if not, the same determination is made for the access switch S5 (steps P603 and P604).
), when the switch S4 changes to 0FF-ON, the timer 4 is set to a predetermined value of 4 to start counting time, and 1 is added to the counter contents (steps P605 to P607).

The internal memory mode or IC card mode is set depending on whether playback of all frames recorded on the IC card or playback of all frames recorded on the internal memory has been completed, and the image is played back and the video signal is The processing of steps P608 to P621 for outputting is the same as the processing of steps P406 to P418 of the access switch S4. Therefore, the explanation is omitted here.

Determine whether the access switch S4 or S5 has changed from OFF to ON before the timer 4 finishes counting (
Steps P622 to P624). If the time measurement by the timer 4 ends first, the process returns to step P605, starts the time measurement by the timer 4 again, and moves on to playback of the next image. Also,
If the switch S4 or S5 is turned ON before the timer 4 finishes measuring time, the timer 4 stops measuring the time and reads out the protected data of the reproduced image (step P625.P
626).

The processing of steps P626 to P639 for reading the protected data of the reproduced image and recording and canceling the protected data by operating the protect/erase operation switch S6 is performed in step P41 in the processing of the access switch S4.
Since this process is the same as the process from 9 to P432, the explanation will be omitted here.

The access switch S5 is turned off in the judgment of step P604.
If it changes from F to ON, the process moves to step P641. First, timer 4 is set to a predetermined value of 4 to start timing, and 1 is subtracted from the counter contents (step P641).
~P643).

The internal memory mode or IC card mode is set depending on whether playback of all frames recorded on the IC card or playback of all frames recorded on the internal memory has been completed, and the image is played back and the video signal is The processing of steps P644 to P657 for outputting is the same as the processing of steps P506 to P518 of the access switch S5. Therefore, the explanation is omitted here.

Determine whether access switch S4 or S5 changes from OFF to ON before timer 4 finishes counting (
Steps P658-P660). If timer 4 finishes counting first, the process returns to step P641 and timer 4 starts counting again.
starts timing and moves on to playing the next image. Also, switch S4 or S5 is turned off before timer 4 finishes counting.
If the result is N, the process moves to step P625, and the process of recording and canceling the protect data is performed in the same way as before.

FIG. 16 shows step P of the flowchart shown in FIG.
12 is a flowchart showing a manual frame speed (MANUAL) process during image reproduction, which is selected by the frame advance changeover switch S8 shown as 117. As is clear from the flowchart, when switch S8 is set to MANUAL, access switch S4 changes from OFF to ON.
Each time the access switch S5 changes from OFF to ON, the process of S4 described above is executed, and the process of S5 described above is executed each time the access switch S5 changes from OFF to ON.

FIG. 17 shows step PI of the flowchart shown in FIG.
19 is a flowchart of the date setting process shown as FIG. First, the date setting switch S13 is turned ON to enter the "year" setting mode, and the access switch S4. S
Set the desired year by performing step 5 (step P701).
When the mode shift switch S12 is turned ON, the mode changes to the "Month" setting mode, and the switch S4. The desired month is set by operating S5 (steps P702 and P2O3), and the mode shift switch SL2 and access switch S4. The "day", "hour", and "1 minute" are set by the operation in S5 (steps P704 to P709). Step P710) Determine whether date setting switch S13 is ON or not.
, if it is not ON, the process returns to step P701 and the date can be set again. If it is ON, date setting is completed and the process returns to the main routine. The 17th fixed display shows an example of the display state of the display unit 13 at each step.

Note that in this embodiment, after setting the minutes, switch S
Although the state of the switch S13 is determined, the state of the switch S13 may be determined after data setting in each setting mode, and if it is ON, the original display is returned.

FIGS. 18(a) and 18(b) are flowcharts showing the process of transferring images recorded in the internal memory to the IC card when the IC card is inserted. First, it is determined whether or not the IC card 41 is inserted into the camera (step P801). If it is inserted, the signal C5DP is set to "L", and the state of the memory of the IC card is determined by the signal processing CP.
It is input from U51, and the signal C3DP is set to "H" to end the communication (steps P802 to P804). It is determined whether the IC card is unrecorded or there is a recorded image in the internal memory (step P805 P2O3). If the IC card is unrecorded and there is a recorded image in the internal memory, the process moves to step P807. If the IC card has already been recorded or there are no recorded images in the internal memory, the process returns to the main routine.

The first frame number of the recorded image in the internal memory is set to X (10 in this embodiment), and the first frame number recordable on the IC card is set to Y (32 in this embodiment) (Step P807
．． P808). Switch to internal memory mode, set the counter content to X, read image data from the internal memory frame corresponding to the counter content X, and store it in the buffer memory (steps P809 to P812). This process is performed in this embodiment. Since it is controlled by the signal processing CPU 51, it waits for the end of the processing (step P813), outputs the counter content X again, and erases the image data of the corresponding frame in the internal memory (steps P814 to P815).

Waiting for the end of the erasing process (step P816), the IC card mode is set, the counter content is set to Y, and the image data stored in the buffer memory is recorded in the IC card piece corresponding to the counter content Y. (Step P81
7 to P820), wait for the end of the recording process (step P820), and wait for the end of the recording process (step
821), the internal memory mode is set again, and 1 is subtracted from the internal memory frame number X to be processed to prepare for processing the next frame (steps P822 to P823). Determine whether the frame number is 0 or not. If it is not O, it means that there is a frame to be processed, so set a new frame number X to the counter and retrieve the image data from the frame in the internal memory corresponding to the counter content It is read out and stored in the buffer memory (steps P824 to P827). Waiting for the end of the processing (step P828), outputting the counter content X again, erasing the image data of the corresponding frame in the internal memory (steps P829-P830), waiting for the end of the erasing processing (step P831), Set the IC card mode, subtract 1 from the counter content Y, record the image data stored in the buffer memory on the IC card piece corresponding to the new counter content Y, and wait for the end of the process (step P
832 to P837), the process returns to step P822 and moves on to processing the next piece.

It is determined in step P824 that X=0. In other words, when all the image data recorded in the internal memory has been processed, the number of frames recorded in the internal memory is subtracted from the number of frames that can be recorded on the IC card, and from this frame number, it is possible to record on the IC card. This is displayed and the process ends (steps P840 to P841).

In the above embodiment, the IC card to which the image recorded in the internal memory is transferred is limited to an unrecorded one, but the image data is recorded in an unrecorded area of the IC card where some image data is recorded. Also, in the above embodiment, images of all the pieces recorded in the internal memory are transferred to the IC card, but only images of protected pieces may be transferred.

FIG. 19 shows an example of the display on the display section 5. Among the display elements of the display unit 5, 5a is a display element that shows the frame number of the image processed in each mode of recording, protect, playback, and erasure, 5b is a display element that shows the insertion of an IC card, and 5c is a display element that shows the date setting. This is a display element that shows the current mode (year, month, day, hour, minute). Also,
5d is a display element that indicates a protect mode, 5e a display element that indicates a reproduction mode, and 5f a display element that indicates a single cylinder erase mode.

Figures 19 (a), (b), and (c) show display examples in the recording mode. (a) shows that the IC card is installed, the IC card is set, and it is possible to record 32 frames of images. There is. In (b), it is indicated by the diagonal line in the center of the display 5b that all the frames on the IC card have been recorded, indicating that it is possible to record 10 frames of images in the internal memory. (C) is IC
It shows that no card is installed, the internal memory mode is set, and 10 frames of images can be recorded.

19(d), (e), and (f) show display examples in the protected mode, (g), (h), and (i) show display examples in the playback mode, and (j), (k), and I2.) indicates the single cylinder erase mode among the erase modes, and “5-ERA
"SE" is displayed.In case of all frame erase mode, "A" is displayed.
-ERASE” is displayed.

In the above embodiment, a digital image signal is recorded using an IC card as a recording medium, but the present invention may be applied to recording an analog image signal using a magnetic disk instead.

[Effects of the Invention] As explained above, according to the present invention, images recorded on a first image recording medium provided with a camera are transferred and recorded on a second image recording medium that is detachably attached to the camera. Therefore, when playing back images, there is no need to connect the camera to the playback device, and the IC card can be directly inserted into the playback device, which significantly improves operability.

[Brief explanation of the drawing]

FIG. 1 is a perspective view showing the exterior of a camera according to the present invention, and FIG. 2 is a block diagram of a control circuit of the camera. Fig. 3 is a block diagram showing details of the signal processing section in the control circuit, Fig. 4 is a perspective view showing the removal of the flash unit, and Fig. 5 is the flash unit! 6 is a perspective view showing the configuration of the photographing section, FIGS. 7 to 17 are flowcharts explaining the control operation of the camera, and FIG. Figure 8 is a flowchart showing the process when the mode selection switch is OFF, Figure 9 is a flowchart showing the process in recording mode, and Figure 10 is the switch SL ON which is activated by pressing the release button one step.
11 is a flowchart showing the processing in the playback mode, FIG. 12 is a flowchart showing the processing in the erase mode, FIG. 13 is a flowchart showing the processing in the access switch S4, and FIG. 14 is a flowchart showing the processing in the access switch S5. FIG. 15 is a flowchart of automatic frame advance processing using the frame advance switch S8, FIG. 16 is a flowchart of manual frame advance processing using the frame advance switch S8, and FIG. 17 is a flowchart of the automatic frame advance process using the frame advance switch S8.
13 is a flowchart of the date setting process, FIG. 18 is a flowchart of the process of transferring an image recorded in the internal memory to an IC card, and FIG. 19 is a diagram showing an example of a display on the display unit. 1: Camera body, 2: Photographic lens, 4 Nirellis button, 5
: Display section, 7: 1-light window for macro photography, 8: IC card insertion slot, 9: Flash device connection section, S3: Mode selection switch, S4. S5: access switch, S6: protect switch, S7: protect/erase activation switch,
S8: Frame forwarding switch, S9: Macro photography switch, S10: Flash photography switch, 30: CPU, 3
1: Signal processing unit, 4o: Internal memory, 41: IC card. Figure 4 Figure 6 Figure 10 (C) Figure 10 (f) Figure 12 (C) Figure 13 (Q) Figure 13 (d) Figure 14 (d) Figure 18 (Q) Figure 18 Figure (b) (a) Hull) (d) (e) (h) (f) Figure 19 (j) (k)

Claims (1)

[Scope of Claims] A first image recording medium disposed inside the camera, which has an image recording area for a plurality of frames, and an image recording area for a plurality of frames, and is detachable from the camera body. a still video camera equipped with a second image recording medium, a detection means for detecting a mounting state of the second image recording medium on the camera body; control means for transferring and recording an image signal recorded on the first image recording medium to a recordable area of the second image recording medium when it is detected that the first image recording medium is attached to the second image recording medium. A still video camera with a removable recording medium.