JPH0468832A - Synchronous catching circuit for spread spectrum communication - Google Patents

Abstract

PURPOSE:To easily execute a synchronous catch by limiting the band of a signal, which is obtained by inverse diffusion in a first multiplying means, by a band limiting means as well in a synchronizing circuit. CONSTITUTION:A received signal is inputted through an RF/IF circuit or the like and first of all multiplied with a reception side PN code outputted from a PN code generating means 21 by a first multiplying means 22. A signal inversely diffused by the first multiplying means 22 is inputted to a second multiplying means 24 after limiting the band by a band limiting means 23. The gain of the signal is automatically controlled to a prescribed gain by an automatic gain control means 25. The signal is inversely diffused again by a third multiplying means 26. The signal inversely diffused by the third multiplying means 26 receives band limit or the like and afterwards, it is decided whether the reception side PN code is coarsely synchronized with a transmission side PN code or not. Thus, even in the case of including jamming waves or noise at a high level in the received signal, the synchronous catch can be easily executed.

Description

[Detailed Description of the Invention] [Summary] The present invention provides a synchronization acquisition circuit incorporated in a receiver of a spread spectrum communication system, in which a received signal contains large level interference waves and noise in addition to the spread spectrum signal. In order to easily acquire synchronization even in such cases, the signal that has been received and once despread is band-limited and then spread again to eliminate interference waves and noise. After applying gain control, despreading is performed again.

[Industrial application field]

The present invention relates to a synchronization acquisition circuit that is incorporated in a receiver of a spread spectrum communication system and performs synchronization of a PN code when a spread spectrum signal is received.

[Conventional technology]

As shown in Figure 5, spread spectrum communication spreads the information over a much larger frequency band than the usual method, which uses the minimum necessary bandwidth to transmit the information. This is a communication method that uses signals (spread spectrum signals). Advantages of this method include excellent noise resistance and fading resistance, and the ability to perform code division multiplexing.

In order to spread the spectrum, it is necessary to add additional modulation in addition to the modulation by the transmitted information. Due to this difference in modulation method, spread spectrum communication is a direct spread method (Direct 5 sequence: DS method).
, frequency hopping method (FrequencyHopp
ing: F H method), time hopping method (Tim
eHopping: TH method), chirp method, etc. Here, the DS method will be explained.

In the DS method, as shown in FIG.
Modulation with high-speed digital data called udo No. 1 code (usually BPSK modulation: B
(inary Phase 5hift Keying)
By doing this, a spread spectrum signal is obtained. On the receiving side, it is necessary to prepare a PN code that has the same phase (that is, synchronization) as the PN code on the transmitting side by some means, and by multiplying the received signal by such a synchronized PN code, , a normal modulated signal can be obtained. As described above, in spread spectrum communication, synchronization of PN codes on the receiving side is very important.

Hereinafter, spread spectrum communication will be explained in more detail based on FIG. 7.

On the transmitter side, the -order modulation circuit 1 first modulates the carrier wave with the information to be sent, and then the secondary modulation circuit 2 modulates the carrier wave.
A spread spectrum signal is obtained by adding modulation using a PN code. Next, this spread spectrum signal is transmitted to the RF/IF
After frequency conversion and amplification by the circuit 3, the signal is transmitted from the transmitting antenna 4.

On the other hand, on the receiver side, a reception antenna 5 receives a spread spectrum signal, which is frequency-converted and amplified by an RF/IF circuit 6 and then input to a synchronization circuit 7. This synchronization circuit 7 matches the phases of the transmitting side PN code and the receiving side PN code, that is, synchronizes them, and when synchronization is achieved,
A normal unspread signal is given to the demodulation circuit 8. This demodulation circuit 8 then reproduces the information.

Here, the operation of the synchronization circuit 7 can be roughly divided into two. One is synchronization acquisition and the other is synchronization maintenance. Synchronization acquisition is an operation that roughly synchronizes the above-mentioned transmitting side PN code and receiving side PN code so that the phase difference between the two is within, for example, 1 chip (=1 bit of the PN code).

Synchronization maintenance is an operation of finely adjusting the synchronization after rough synchronization is achieved. The configuration and operation of the synchronous circuit 7 are explained below.
This will be explained in detail based on FIG.

First, the signal input from the RF/IF circuit 6 shown in FIG.
ntrol) After receiving automatic gain control in amplifier 8a, 3
A PN code generation circuit 1 with three multipliers 9a, 9b, and 9c.
The signal is multiplied by the three types of PN codes PSE and L output from 9, respectively, and despreading is performed. These 3
The PNN code of type E, ,L has a phase of E-4P.
-4L by a predetermined chip (for example, l/2 chip), and for example, compared to the phase of the PNN code, the
The phase of the N code is l/2 chips ahead, and conversely the phase of the PN
The phase of the N code is delayed by 1/2 chips. These 3
Among the different phase PN codes, the PNN code is used for synchronization acquisition, and the other two PNN codes, L, are used for synchronization maintenance.

The despread signal output from the multiplier 9a is band-limited and amplified through a bandpass filter (BPF) loa, an amplifier (AMP) lla, and a bandpass filter (BPF) 12a, and is input to a detector 13a. Here, when the phases of the PN codes on the transmitting side and the receiving side are shifted from each other, the signal level passing through the bandpass filter 10a becomes low, and accordingly, the output of the detector 13a also becomes low.

-On the other hand, when the phase difference between the PN codes on the transmitting side and the receiving side is within 1 chip, that is, when rough synchronization is achieved,
The signal level passing through the bandpass filter 10a increases, and the output of the detector 13a also increases accordingly. Therefore, the output signal of the wave detector 13a is integrated by the integrator 14 for a predetermined period of time, and the value is determined by the comparator 15 to determine whether rough synchronization is achieved, that is, determination of synchronization acquisition. As a result, if it is determined to be asynchronous, P
The phase of each PN code output from the N code generation circuit 19 is shifted by a predetermined chip (for example, 1/2 chip). By repeating the above integration, judgment, and shift,
Synchronous acquisition is performed.

After synchronization acquisition, synchronization is maintained. First, the spread signal input to the multiplier 9b is multiplied by a phase-advanced PNN code, despread, and then band-limited and amplified through a bandpass filter 10b1, an amplifier 11b1, and a bandpass filter 12b.

This signal is applied to the control voltage generation circuit 16 after being detected by the detector 13b. At the same time, the spread signal input to the multiplier 9c is multiplied by a phase-delayed PNN code and despread, and is then applied to a bandpass filter 10c, an amplifier 11C, and a bandpass filter 12c in the same manner as above.
The signal is then band-limited and amplified, further detected by a detector 13c, and then applied to a control voltage generation circuit 16. The control voltage generation circuit 16 is composed of, for example, several operational amplifiers, etc., and when the comparator 15 determines that the state is roughly synchronized, the control voltage generation circuit 16 calculates the difference between the outputs of the two detectors 13b and 13c, and calculates the difference between the outputs of the two detectors 13b and 13c. The frequency of the PN code is changed so that the difference becomes zero. Here, as a means for changing the frequency of the PN code, a voltage controlled crystal oscillator (VCXO) used as a clock of the PN code generation circuit 19 is used.
) 18 is controlled via the loop filter 17. This results in two PNN codes, L
The phase of the PNN code that is intermediate between the phase of the transmitting side PN
The codes are controlled so that their phases match.

[Problem to be solved by the invention]

In the conventional synchronous circuit shown in Fig. 8, especially in the circuit for performing synchronization acquisition (synchronization acquisition circuit), the input C/N
(Carrier to No.1se ratio:
carrier wave to noise power ratio) or input C/I (Ca
rrier t.

When the interference ratio (power ratio of carrier wave to interference wave) is low or when the level of interference waves is high, there is a problem in that synchronization failure (erroneous synchronization or inability to synchronize) occurs. That is, the determination of synchronization acquisition in the synchronization acquisition circuit is performed by comparing the integration result of the integrator 14 obtained based on the received signal with a predetermined reference voltage using the comparator 15. If the level of noise and interference waves included in the signal increases to a certain extent, the gain of the AGC will be affected by the noise and interference waves, and the output level will increase, and the output level of the integrator 14 will also increase. , this causes a problem such as exceeding the reference voltage of the comparator 15 even though it is in an asynchronous state, resulting in a determination that the state is in a roughly synchronized state.

The present invention has been made in view of the above-mentioned conventional problems, and its purpose is to provide a signal that can be used even when a received signal contains a large level of interference waves and noise in addition to a spread spectrum signal. An object of the present invention is to provide a synchronization acquisition circuit for spread spectrum communication that can easily perform synchronization acquisition.

[Means to solve the problem]

FIG. 1 is a block diagram of the principle of the synchronization acquisition circuit of the present invention.

As shown in the figure, the present invention provides a PN code generation means 21.
, first multiplication means 22, band limiting means 23, second multiplication means 24, automatic gain control means 25, third multiplication means 26
and a synchronization acquisition determining means 27.

A received signal is input to the synchronization acquisition circuit of the present invention via an RF/IF circuit, etc., and is first multiplied by the receiving side PN code output from the PN code generating means 2I by the first multiplier 22. In this way, the spread spectrum signal is despread.

The signal despread by the first multiplication means 22 is band-limited by the band-limiting means 23 and then inputted to the second multiplication means 24, where the signal output from the PN code generation means 21 is sent to the receiving side. By multiplying by the PN code, spreading is performed again, and then the automatic gain control means 25 automatically controls the gain to a predetermined value. Furthermore, automatic gain control means 2
The third multiplication means 26 multiplies the output signal of No. 5 by the receiving side PN code output from the PN code generation means 21, thereby performing despreading again.

The signal despread by the third multiplication means 26 is subjected to band limitation, etc., and then inputted to the synchronization acquisition determination means 23, where the receiving side PN code and the transmitting side PN code are roughly synchronized. It is determined whether there are any.

[For production]

By band-limiting the signal obtained by despreading by the first multiplication unit 22, the band-limiting unit 23 also eliminates interference waves and noise contained in the received signal, and after that, the signal is spread again. , an automatic gain control means 25 applies automatic gain control, and then a third multiplication means 26 despreads the signal again.

Therefore, to the extent that interference waves and noise are eliminated by the first multiplication means 22 and band limiting means 23, the automatic gain control means 25 operates accurately without being affected by noise or interference waves. The signal obtained from the third multiplication means 26 has less interference waves and noise, and the synchronization acquisition determination means 2
7 makes it easier to determine whether synchronization has been acquired. That is, since the interference waves and noise are eliminated as described above, synchronization is possible even with high-level interference waves and noise.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a configuration diagram of a synchronization circuit for spread spectrum communication to which a synchronization acquisition circuit according to an embodiment of the present invention is applied. Note that the same parts as in the conventional synchronous circuit shown in FIG. 8 are denoted by the same reference numerals.

As shown in FIG. 2, the synchronization acquisition circuit of this embodiment has the eighth
In place of the amplifier 11a in the figure, the part surrounded by the broken line, that is, the multiplier 34, the AGC (automatic
(c) Ga1n Control) An amplifier 35 and a multiplier 36 are incorporated, and the PNN code for synchronization acquisition is input to these two multipliers 34 and 36 similarly to the multiplier 9a. Note that the configurations of the transmitter and receiver in spread spectrum communication to which this embodiment is applied are the same as those shown in FIG.

In the above configuration, the spread spectrum signal input from the RF/IF circuit (see Figure 7) is transmitted to the AGC amplifier 8.
After receiving automatic gain control in the first multiplier 9a, P
After being despread by being multiplied by the PNN code output from the N code generation circuit 19, the signal is input to the bandpass filter 10a, where it is band limited. The signal that has passed through the bandpass filter 10a is multiplied by the PN code P in the second multiplier 34, so that
After being spread again, it is input to the AGC amplifier 35, where it is automatically gain controlled to maintain constant power. Subsequently, the signal output from the AGC amplifier 35 is further multiplied by the PN code P in the third multiplier 36, thereby being despread again.

The signal obtained by despreading again as described above is passed through a bandpass filter 12a to a detector 13a, as in the conventional case.
, is input to a synchronization acquisition determination means consisting of an integrator 14 and a comparator 15, where a determination of synchronization acquisition is made. That is, the signal that has passed through the band-pass filter 12a is envelope-detected by the detector 13a, and then the detected signal is integrated for a predetermined time by the integrator 14, and the magnitude of the integrated value is determined by the comparator 15 for a predetermined time. By comparing the reference voltage with the reference voltage, it is determined whether rough synchronization is achieved, that is, synchronization acquisition is determined. PNN code is sender's PN
Since the above-mentioned integral value becomes maximum when the phase is in the same phase as the code, it is determined that rough synchronization has been achieved when such a maximum integral value is obtained, and it is determined that non-synchronization is achieved otherwise.

If it is determined that the PN code is asynchronous, the phase of each PN code output from the PN code generation circuit 19 is changed to a predetermined chip (
For example, shift by 1/2 chip). The integral above,
Synchronous acquisition is performed by repeating determination and shifting.

After synchronization acquisition is performed as described above, synchronization is maintained as in the conventional case. That is, first, the multiplier 9b
The spread signal input to the PNN code is despread by being multiplied by a PNN code whose phase is advanced by a predetermined number of chips.
The signal is band-limited and amplified through a band pass filter 12b. This signal is applied to the control voltage generation circuit 16 after being detected by the detector 13b. At the same time, the spread signal input to the multiplier 9c is despread by being multiplied by a PNN code whose phase is delayed by a predetermined number of chips. Bandpass filter 12
The signal is band-limited and amplified via a detector 13c, and then detected by a detector 13c, and then applied to a control voltage generating circuit 16.

Regulation? In the voltage generating circuit 16, when the comparator 15 determines that the state is roughly synchronized, the difference between the outputs of the two detectors 13b and 13c is determined, and the voltage is outputted via the loop filter 17 so that this difference becomes zero. Controlled crystal oscillator (VCXO) 1B
The system 71! By changing the + voltage, the frequency of each PN code of the PN code generation circuit 19, which uses this control voltage as a clock, is changed. Thereby, the PNN code method phase, which is between the phases of the two PNN codes, L, is maintained in a synchronized state between predetermined chips with respect to the phase of the transmitting side PN code.

In addition, in this embodiment, compared to the conventional synchronous circuit shown in FIG. 8, more processing is added to the portion surrounded by the broken line in FIG. 2, but the delay time caused by the AGC amplifier 35 is almost ignored. Therefore, in the two multipliers 34 and 36, the phases of the PN codes for their respective input signals are aligned with each other, that is, they are synchronized. Therefore, the process of acquiring synchronization is substantially the same as that of the conventional synchronization circuit described above.

As described above, in this embodiment, after the output signal of the bandpass filter 10a is spread again by the second multiplier 34, automatic gain control is performed by the AGC amplifier 35, so that interference waves contained in the received signal are After eliminating noise and noise by band limiting after despreading, the signal is spread again and AGC is applied. Therefore, the level of interference waves and noise contained in the signal finally obtained by despreading in the third multiplier 36 is extremely low, and therefore, the gain of AGC is less likely to be affected by interference waves and noise. It becomes possible to easily acquire synchronization even in the face of larger interference waves and noise.

As an example, the operation against CW interference will be explained based on FIG. 3.

When the input signal includes a CW interference wave as well as a spread spectrum signal (SS signal) as shown in FIG. 3(a), the despread output from the first multiplier 9a during synchronization is as follows: As shown in FIG. 6B, the SS signal is despread, and the CW interference wave becomes a spread spectrum. Subsequently, by passing through the bandpass filter IOa, the CW interference wave is significantly band-limited as shown in FIG.

When this signal is spread again by the second multiplier 34, a spectrum is obtained in which the SS signal and the CW interference wave almost overlap, as shown in FIG.
As is clear from the comparison with the spectrum of , most of the CW interference waves are eliminated, and only low-level CW interference waves are present. Subsequently, by passing through the AGC amplifier 35, the signal level is increased to a partial level as shown in FIG. Thereafter, when the signal is despread again by the third multiplier 36, an SS signal from which CW interference waves are almost eliminated is obtained, as shown in FIG. Therefore, in the conventional synchronization acquisition circuit, synchronization failure occurred when the CW interference wave level was partially higher than the SS signal, but in this embodiment, as described above, after despreading by the first multiplier 9a, Since the band is limited and the interference waves are eliminated, they are spread again and AGC is applied, so the AGC gain is less affected by interference waves and noise by the amount of interference waves removed, and is effective against high-level CW interference waves. It is possible to synchronize even if

Such operations are performed in the same way regardless of the type of interference waves or noise. For example, even when white noise is included, synchronized acquisition is possible by almost the same operation as for the CW interference wave, as shown in FIG.

〔Effect of the invention〕

According to the present invention, the received and once despread signal is
By limiting the band, interference waves and noise are eliminated, and then the signal is spread again, automatic gain control is applied, and then despreading is performed again, so that the received signal does not contain large-level interference waves in addition to the spread spectrum signal. Synchronization can be easily acquired even when noise is included.

[Brief explanation of drawings]

Fig. 1 is a block diagram of the principle of the present invention, Fig. 2 is a block diagram of a synchronization circuit for spread spectrum communication to which a synchronization acquisition circuit according to an embodiment of the present invention is applied, and Fig. 3 is a CW interference wave in the above embodiment. FIG. 4 is an explanatory diagram of the operation for white noise in the above embodiment. FIG. 5 is a diagram showing the difference in bandwidth between the normal communication method and spread spectrum communication. FIG. 7 is a block diagram showing the configuration of a transmitter and receiver used in spread spectrum communication, and FIG. 8 is a configuration diagram of a conventional synchronization circuit used in spread spectrum communication. 8a... AGC amplifier, 9a, 9b, 9c... Multiplier, 10a, 10b, 10c... Band pass filter, 11b, llc... Amplifier, 12 a, 12 b, 12 c... Band Pass filter, 13a. 14 ・ ・ l 5 ・ ・ 16 ・ ・ 17 ・ ・ 18 ・ ・ l 9 ・ ・ 2 l ・ ・ 22 ・ ・ 23 ・ ・ 24 ・ ・ 25 ・ ・ 26 ・ ・ 27 ・ ・ 34 ・ ・ 35 ・ ・ 36 ・・ 3b, 13c... Detector, integrator, comparator, control voltage generation circuit, loop filter, voltage controlled crystal oscillator, PN code generation circuit, PN code generation means, 1'9th multiplication means, band limiting means, second multiplication means, automatic gain control means, third multiplication means, synchronization acquisition determination means, multiplier, AGC amplifier, multiplier.

Claims (1)

[Claims] PN code generation means (21
), a first multiplier (22) that performs despreading by multiplying the received spread spectrum signal by the receiving side PN code output from the PN code generating means (21); Band-limiting means (23) for band-limiting the signal despread by the multiplication means (22);
The PN code generating means (21) is applied to the signal passing through the PN code generating means (23).
); a second multiplier (24) that performs re-spreading by multiplying the receiving side PN code output from the second multiplier (24); and an automatic multiplier that performs automatic gain control of the signal obtained by the second multiplier (24). gain control means (25); and the automatic gain control means (25).
), a third multiplication means (26) performs despreading again by multiplying the output signal of the PN code generation means (21) by the receiving side PN code outputted from the PN code generation means (21); ), it is determined whether the receiving side PN code and the transmitting side PN code are roughly synchronized, and based on the determination result, the PN code generating means (21) is roughly synchronized. synchronization acquisition determination means (27) that generates a correct receiving side PN code;
A synchronization acquisition circuit for spread spectrum communication, characterized by comprising: