JPH0451332A - Process/task execution time counting circuit - Google Patents

Abstract

PURPOSE:To count only actual execution time by setting an operation level attached on each process/task on a register for timer control, and counting the execution time of the process/tasks in which set operation levels coincide with each other. CONSTITUTION:The operation level of the process/task and the frequency division ratio of a clock for timer are set on the register(TCR) 21 for timer control via an internal bus 31, and an initial value is set on timers 1, 2 as necessary. Then, when the timer operation starting bit of the register TCR 21 is turned on, the timer is operated while the processing of the process/task of specific operation level (for example, in the operation level 2) is performed, and the processing time is integrated. Also, since the timer operation bit can be set at every timer 1, 2, it is possible to set the counting start time of plural process/ tasks individually.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to measuring the execution time of a process/task in an information processing device, such as billing processing in an electronic exchange and effective time scheduling of O3/application software. If applied to such things, work can be made more efficient.

[Prior Art] In an information processing device that processes, converts, calculates, etc. on the contents of information, the process/task execution time is measured in order to manage the execution of the process/task. In addition,
Since processes and tasks are often used interchangeably, the notation process/task will be used here.

Generally, the execution time of a process/task is measured by integrating the execution time of a process/task at a specific operation level, as shown in FIG. In the illustrated example, the execution time of operation level 2 is measured.

As methods for measuring the execution time of such processes/tasks, there have conventionally been methods mainly using software and methods using dedicated hardware.

■Measurement method using software As shown in Figure 3, a timer interrupt (To
~T8), and the execution time is accumulated based on the operating level at that time.

In this case, it is necessary to have hardware for timer interrupts. Additionally, in order to improve measurement accuracy, it is necessary to shorten the interrupt interval, but as shorter intervals have a greater impact on process/task execution time, the trade-off between accuracy and execution time must be considered. It won't happen.

(2) Measurement method using hardware As shown in FIG. 4, a write/readable count circuit 40 (including a counter and a counter control section) is provided to write measurement conditions and read count values using software. This counter circuit 40
is externally attached to the information processing device. In order to exclude from measurement the time required for an external interrupt request during process/task switching, control is performed so that counting is performed only in cases other than interrupt requests.

In this case, since it is provided outside the information processing device, it is not possible to eliminate the interrupt processing time inside the information processing device.

[Problems to be Solved by the Invention] The above-mentioned software-based measurement method and hardware-based measurement method have the following drawbacks.

(1) Measuring method using software Since timer addition processing occurs every time there is an interrupt from the timer, processing time and processing process overhead are large.

In order to minimize the influence of timer interrupts on processes/tasks, it is necessary to reduce the frequency of interrupts, but this increases measurement errors. Therefore m
The limit is measurement in units of seconds.

(2) Measurement method using hardware Since the period from the start of an interrupt to a process/task to the actual completion of processing is measured, the interrupt processing time is included in the measurement, resulting in a measurement error.

Furthermore, since it is located outside the information processing device and has read/write functions from software, the hardware scale becomes large.

An object of the present invention is to solve the above-mentioned problems of the prior art by measuring the execution time of a process/task using hardware inside an information processing device, thereby enabling accurate execution time measurement and software implementation. An object of the present invention is to provide a process/task execution time measuring circuit that allows for a simplified system configuration.

[Means for Solving the Problems] A process/task execution time measurement circuit of the present invention is provided in an information processing device that has a plurality of operation levels that can be set for executing processes/tasks.

The configuration includes a timer that measures the execution time of a process/task, a counter that generates a clock that operates the timer, an operation level that specifies the executed process/task, and a unit of measurement for the execution time of the process/task. and a timer control register that sets a clock frequency division ratio to specify the execution time of a specific process/task based on the operation level set in the timer control register and the clock frequency division ratio. It is designed to be measured in units of measurement.

Further, it is preferable to provide a plurality of the above-mentioned timers so that the execution time of a process/task can be measured in individually set measurement units for each operation level.

[Operation] First, set the operation level of the process/task and the frequency division ratio of the timer clock in the timer control register to enable writing to the timer from the hardware (timer control register). put. Subsequently, during processing of the process/task, the timer operates based on the specific operation level and clock frequency division rate set in the timer control register, and the processing time is accumulated. Finally, the timer value is read and the processing time of the process/task is accurately measured from the clock period and frequency division ratio.

Additionally, if multiple timers are provided to measure the execution time of processes/tasks for each operating level,
By individually setting measurement conditions for a plurality of processes/tasks in the timer control register for each timer, the processing time of processes/tasks for each operation level can be accurately measured.

[Example] Embodiments of the present invention will be described below with reference to FIG.

FIG. 1 is a block diagram showing an embodiment of a process/task execution time measuring circuit according to the present invention. This measurement circuit is built into an information processing device, and includes a plurality of timers 1 and 2 that measure the execution time of processes/tasks, a counter 11 that generates a clock that operates these timers 1 and 2, and an execution process/task. A register 21 for timer control that sets an operation level that specifies a task, a clock division rate that specifies a unit of measurement of execution time of a process/task, and a timer operation start bit, and these timer 1.2 and counter 11. ．． It is composed of a timer control section 22 that controls a timer control register 21.

Of these, the timer control register 21 and timer 1.2 are connected to the internal bus 31 of the information processing device and can be read/written. Timers 1 and 2 have exactly the same configuration and can measure the execution time of multiple processes/tasks at the same time. The timer can be added as much as the hardware capacity allows.

To control the operation of multiple timers 1 and 2, the operation level added to each process/task is controlled by the timer control register 2.
This is done by setting it to 1. The clock for operating the timer 1.2 is generated by frequency-dividing the system clock of the processor (not shown), and the frequency division ratio can also be arbitrarily set in the control register 21.

Next, the operation of the process/task execution time measuring circuit having the configuration shown in FIG. 1 will be explained.

First, the timer control register 21 is connected via the internal bus 31.
Set the operation level of the process/task and the frequency division rate of the timer clock, and set initial values for timers 1 and 2 as necessary. Subsequently, the timer operation start bit of the timer control register 21 is turned on. When the timer operation start bit is turned on, the timer operates during processing of a process/task at a specific operation level, and the processing time is accumulated.

Note that since the timer operation start bit can be set for each timer 1 and 2, the measurement start time of a plurality of processes/tasks can be set individually.

When a process/task is processed according to the flow shown in Figure 2, the timer operates only when the operation level set in the timer control register 21 (operation level 2 in this case) matches the actual level. .

Finally, a processor (not shown) via an internal bus 31
The processing time of a process/task can be accurately determined from the timer value read in the system clock and the period and frequency division ratio of the system clock. Note that these operations are performed by the timer control section 22.
It is carried out under the control of

As described above, according to this embodiment, since a hardware measurement method is adopted, the processing time and overhead of processing processes are small, and there is no need to consider the trade-off between accuracy and execution time. Measurement with small errors in units smaller than the ms unit is possible.

Furthermore, since the measurement circuit is provided inside the information processing device, the interrupt processing time inside the information processing device can be excluded from the measurement time.

In addition, the operation level added to each process/task is set in the timer control register, and the execution time of processes/tasks that match the set operation level is measured, so only the actual execution time is measured. Therefore, the interrupt processing time is not included in the measurement and no errors occur.

Furthermore, a timer control register is provided to set and register the operation level added to each process/task and the frequency division ratio of the clock that operates the timer, and writing to the timer is performed from this timer control register. In addition, since the register and timer are connected to an internal bus to read the timer value, the hardware scale can be significantly reduced, unlike those having read/write functions from software.

[Effects of the Invention] As described above, according to the present invention, the following excellent effects are exhibited.

(1) According to the process/task execution time measurement circuit according to the first aspect, execution time can be accurately measured. In addition, by changing the clock division ratio appropriately,
The same hardware/software can measure processes/tasks ranging from short and precise processes/tasks to very long processing times. Furthermore, there is almost no burden on software/external hardware.

(2) According to the process/task execution time measuring circuit according to the second aspect, since a plurality of timers are provided, the processing time of the process/task for each operation level can be measured simultaneously.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the process/task execution time measuring circuit according to this embodiment, FIG. 2 is an explanatory diagram showing the principle of measuring process/task execution time, and FIG. 3 is process/task execution by software in the conventional example. FIG. 4 is an explanatory diagram showing a method for measuring time. FIG. 4 is an explanatory diagram showing a method for measuring process/task execution time using hardware. 1.2 is a timer, 11 is a timer clock generation counter, 21 is a timer control register, 22 is a timer control unit,
31 is an internal bus.

Claims (1)

[Claims] 1. In a process/task execution time measurement circuit of an information processing device having multiple operation levels that can be set for execution processes/tasks, a timer for measuring the execution time of a process/task; A counter that generates a clock to execute the process, and a register for timer control that sets the operation level that specifies the executed process/task and the clock division rate that specifies the measurement unit of the process/task execution time. In preparation for this, a process/task is characterized in that the execution time of a specific process/task is measured in a specific measurement unit based on an operation level set in a timer control register and a clock division rate. Execution time measurement circuit. 2. Process/task execution time measurement according to claim 1, wherein a plurality of the timers are provided, and the execution time of the process/task is measured in individually set measurement units for each operation level. circuit.