JPH0449730A - Transmission line switching device - Google Patents

Abstract

PURPOSE:To perform the switching of a transmission line system in use and a spare one without generating hit by providing two systems of delay compensation circuits at the front and rear stages of an elastic store, respectively, performing the bit delay operation of signal sequence based on a delay control signal, and compensating time difference. CONSTITUTION:When the switching from a system in use to the spare system is requested, a phase difference detection circuit 50 detects a signal that becomes the reference of a transmission line frame signal, etc., and calculates bit quantity in accordance with delay difference between the transmission lines of the system in use and the spare system. Furthermore, the delay control signal CNT2 is supplied to the delay compensation circuit 23 of the spare system so as to eliminate phase difference between the signal sequence of the system in use and the spare system, and the bit delay operation of a transmission line signal is performed. Thence, the circuit 50 supplies switching control signals CNT3, CNT4 to a clock switching circuit 30 and a signal sequence switching circuit 40, and switches a clock signal from the clock signal CL1 of the system in use to the clock signal CL2 of the spare system. After that, bit switching from the transmission signal sequence of the system in use to that of the spare system is performed at every bit unit. Thereby, the switching of the system from the one in use to the spare one without generating the hit can be completed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention is applied to a transmission line switching device for data communication. The present invention relates to a transmission line switching device that performs instantaneous switching between a working system and a standby system in a transmission system having a redundant configuration.

[Conventional technology]

Transmission systems are becoming more sophisticated than ever before, such as automatic switching in the event of equipment failure. For this reason, as requirements for transmission systems, not only reduction of transmission line costs but also system maintenance and management are becoming increasingly important.

In addition, as the capacity of transmission lines increases due to the increase in the amount of information,
The impact of instantaneous power outages is not limited to the transmission section, but is beginning to have a major impact on the network.

Furthermore, as transmission systems with redundant configurations become more complex, in order to ensure reliability and maintain reliability through preventive maintenance, transmission paths between the active and backup systems must be constantly monitored and both systems used evenly. This is desirable.

As described above, in future transmission systems, it is necessary to perform switching between the active system and the standby system without momentary interruption due to maintenance or the like. Furthermore, in ultra-large capacity transmission systems, instantaneous interruptions have a great effect, so it is necessary to have a redundant system in a 1=1 configuration and switch without interruption even when a line is interrupted.

Conventionally, transmission line switching devices have needed to switch not only the signal sequence but also the clock signal in order to switch the working system and the protection system without momentary interruption. It is technically difficult to correct the phase difference of the clock signal and switch without momentary interruption.

Furthermore, when switching from the transmission path clock signal to the local clock signal and then switching to the active system and the protection system, frequency stuff processing and other signal processing become complicated, making it difficult to implement.

For this reason, in current transmission systems, switching between the working system and the protection system is performed without compensating for the transmission path delay between the working system and protection system signal trains, and without compensating for the phase shift of the transmission path clock signal. .

As described above, switching between active and standby systems in current transmission systems is performed with momentary interruptions.

[Problem to be solved by the invention]

Such conventional transmission line switching equipment can switch between the active system and the backup system during maintenance, or when the line in a transmission line system with a 1:1 redundant configuration is disconnected, without a momentary interruption. However, in order to switch between the working system and the protection system, it is necessary to correct the phase difference between the transmission line clock signals between the working system and the protection system and to do it without any interruption, but this is not technically possible. Because of the difficulty, there was a drawback that the process was performed without compensating for the phase shift of the transmission line clock signal and was accompanied by momentary interruptions.

The present invention solves the above-mentioned drawbacks, and aims to provide a transmission line switching device that can switch between a working system and a protection system of a transmission line system without momentary interruption.

[Means for Solving the Problems] The present invention provides two systems that receive input signal trains of two transmission lines consisting of a working system and a standby system, and output signal trains and clock signals of the two systems, respectively. In a transmission line switching device equipped with a receiving circuit and a signal train switching circuit that outputs a signal train of the operating system of the above two systems based on an input switching control signal and a switching clock signal, the input switching control signal A clock switching circuit that selects an operating system clock signal from the clock signals from the two receiving circuits and outputs it as a switching clock signal, and a clock switching circuit that is provided at each output of the two receiving circuits and converts the signal train. An elastic store that is temporarily stored in response to a corresponding clock signal and read out and supplied to the signal train switching circuit based on the switching clock signal, and bits of the two signal trains that are input to the signal train switching circuit based on the switching clock signal. a phase detection circuit that detects a phase difference and outputs a delay control signal, and outputs the switching control signal when the bit phases match; The present invention is characterized by comprising a delay compensation circuit for compensating for a time difference between signal trains input to the signal train switching circuit.

Further, in the present invention, the clock switching circuit includes a selection circuit that selects an operating system clock signal from the two systems of clock signals based on the switching control signal, and a phase locked loop that generates the switching clock signal. The phase-locked loop can receive the clock signal from the selection circuit as a comparison input.

Further, in the present invention, each of the delay compensation circuits can be configured as an optical fiber-type variable optical delay circuit, which is provided upstream of the two receiving circuits.

Further, each of the delay compensation circuits is configured of an optical fiber-type optical variable delay circuit provided at the front stage of the above-mentioned two receiving circuits, and an electric circuit memory provided at the rear stage of the optical variable delay circuit. I can do it.

[Effect]

The clock switching circuit selects the operating system clock signal from among the clock signals from the two receiving circuits based on the input switching control signal and outputs it as a switching clock signal. The two-system elastic store temporarily stores the signal strings of the two-system receiving circuits using corresponding clock signals, and supplies them to the respective readout signal string switching circuits using switching clock signals. The phase detection circuit detects the bit phase difference based on the frame signal of the two signal streams input to the signal stream switching circuit based on the switching clock signal, outputs a delay control signal, and outputs the switching control signal when the bit phases match. Output. The two delay compensation circuits are provided before or after each of the two elastic stores, and simulate the bit delay of the signal string corresponding to the bit amount of the signal string input to the signal string switching circuit based on the delay control signal. to compensate for the time difference.

Further, the clock switching circuit has a selection circuit that selects the operating system clock signal from the two systems of clock signals based on the switching control signal, and the phase-locked loop uses the clock signal from the selection circuit as a comparison input and outputs the switching clock signal. Output. Tarock signal switching is done in order to prevent a phase shift in the switching clock signal at the time of switching, and to prevent the phase variation of the switching clock signal from exceeding the memory capacity of the elastic store for switching to the local clock signal. This is done with a time constant equal to the jitter wander of the transmission line.

Furthermore, if the input signal string is an optical signal string, it can be compensated by an optical fiber type optical variable delay circuit provided as a delay compensation circuit before the receiving circuit.

In addition, rough delay correction is performed by an optical Feige type optical variable delay circuit provided before the second receiving circuit, and minute delay correction is performed by an electric circuit memory provided after the optical variable delay circuit. Reduce the burden on the delay compensation circuit.

As described above, switching between the active system and the standby system of the transmission line system can be performed without momentary interruption.

〔Example〕

Embodiments of the present invention will be described with reference to the drawings. 1st
The figure is a block diagram of a transmission line switching device according to an embodiment of the present invention. FIG. 2 is a block diagram of the clock switching circuit of the transmission line switching device of the present invention. In FIGS. 1 and 2, the transmission line switching device receives input signals from two transmission lines consisting of a working system and a protection system, respectively, and outputs two signal trains S1, S2 and clock signals CLI, CL2. It includes two receiving circuits 11 and 21 that output signals respectively, and a signal train switching circuit 40 that outputs the signal train of the operating system of the two systems based on the input switching control signal CNT4 and switching clock signal CL3.

Here, the feature of the present invention is that the clock signal of the operating system is selected from among the clock signals CLI and CL2 from the receiving circuits 11 and 21 of the two systems based on the input switching control signal CNT3, and is used as the switching clock signal CL3. The output clock switching circuit 30 and the signal strings S1 and S2 of the two-system receiving circuits 11 and 21 are temporarily stored by corresponding clock signals, and the two-system error signals are respectively applied to the readout signal string switching circuit 40 by the switching clock signal CL3. Detects the bit phase difference between the stick store 12.22 and two signal streams input to the signal stream switching circuit 40 based on the switching clock signal CL3, and outputs delay control signals CNTl and CNT2;
When the bit phases match, the switching control signals CNT3 and C
A two-system signal is provided between the phase difference detection circuit 50 that outputs NT4, the elastic store 12.22, and the signal train switching circuit 40, and is input to the signal train switching circuit 40 based on the delay control signals CNTl and CNT2. The present invention is provided with two delay compensation circuits 13 and 23 for compensating for time differences between columns.

Further, the clock switching circuit 30 receives a switching control signal CNT3.
a selection circuit 41 that selects an operating system clock signal from two systems of clock signals CLI and CL2 based on the clock signal CLI and CL2, and a phase locked loop 42 that uses the clock signal from the selection circuit 41 as a comparison input and outputs a switching clock signal CL3. include.

Further, phase-locked loop 42 includes a phase comparator 43, a low-pass filter 44, and a voltage-controlled oscillator 45.

The operation of the transmission line switching device having such a configuration will be explained. In FIG. 1, the receiving circuit 1 of the working system and the protection system
The clock signals CL1 and CL2 of the transmission line 1.21 are input to the clock switching circuit 30, respectively. The clock switching circuit 30 outputs a clock signal CLI during active system operation, and outputs a clock signal CL2 during standby system operation.

Further, when switching from the active system to the standby system, the clock switching circuit 30 outputs a clock signal whose clock phase gradually changes from the phase of the clock signal CLI to the phase of the clock signal CL2. Details of the clock switching circuit 30 will be described later.

The elastic store 12.22 also receives signal sequences S1 and S2 from the active and standby receiving circuits 11.21.
is temporarily accumulated in the clock signals CL1 and CL2 of each transmission line, and the switching clock signal C is output from the clock switching circuit 30.
Read with L3. As a result, the transmission line clock phase fluctuation is absorbed, and a state is reached in which each of the switching clock signals CL3 operates with the same switching clock signal CL3.

Next, delay compensation circuits 13 and 23, which are composed of electric circuit memories and the like and compensate for the time difference between the transmission line signal trains of the working system and the protection system on a bit-by-bit basis, completely adjust the bit phases of the respective signal trains S1 and S2. The output signal is output to the signal train switching circuit 40 which switches the transmission path signal train between the working system and the protection system.

Further, a phase difference detection circuit 50 provided between the delay compensation circuit 13, 23 and the signal train switching circuit 40 detects the phase difference between the signal trains of the working system and the standby system.

Next, the procedure for switching from the active system to the standby system will be explained. When switching to the protection system is requested, the phase difference detection circuit 50 detects a reference signal such as a transmission line frame signal, and calculates the amount of bits corresponding to the transmission line delay difference between the working system and the protection system. do. Furthermore, a delay control signal CNT2 is applied to the delay compensation circuit 23 of the protection system for performing delay correction so that the phase difference between the signal trains of the working system and the protection system is eliminated. Delay compensation circuit 2
3 performs a bit delay operation on the transmission line signal by the amount of bits instructed by the phase difference detection circuit 50. Next, the phase difference detection circuit 50 confirms that there is no phase difference between the signal trains of the active system and the standby system, and outputs switching control signals CNT3 and CNT for switching to the clock switching circuit 30 and the signal train switching circuit 40.
Give 4. The clock switching circuit 30 changes from the state in which it selects the clock signal CLI of the active transmission line to the state in which it selects the clock signal CL2 in the protection transmission line in accordance with the clock switching command of the switching control signal CNT3 from the phase difference detection circuit 50. Switch. Further, the signal train switching circuit 40 operates a circuit that switches bit by bit according to the signal train switching command of the switching control signal CNT4, and switches from the working transmission line signal train (signal train Sl) to the protection transmission line signal train (signal train S1). Bit switching is performed to column S2). By performing the above operations, the instantaneous switching from the active system to the standby system is completed.

Furthermore, switching back from the standby system to the active system is performed using the same operation as described above based on the control signals CNTI-CNT4.

In FIG. 2, the clock switching circuit 30 is composed of a selection circuit 41 consisting of a 2:1 selection switch and a phase locked loop 42 having a time constant approximately equal to the transmission line jitter wander. Further, the phase locked loop 42 includes a phase comparator 43
, low pass filter 44 and voltage controlled oscillator (VCO) 45
It consists of The phase comparator 41 outputs a signal having a level equal to the phase difference between the signal input to the phase locked loop 42 and the output signal of the voltage controlled oscillator 45. The low-pass filter 44 converts the signal from the phase comparator 43 into a signal that changes with a time constant determined by the band of the low-pass filter 44, and outputs the signal to a voltage-controlled oscillator 45 whose oscillation frequency changes depending on the voltage level.

Therefore, the output signal of the voltage controlled oscillator 45 changes with a time constant determined by the band of the low-pass filter 44. in this way,
By configuring the feedback system, the phase difference between the signal input to the phase-locked loop 42 and the output signal of the voltage controlled oscillator 45 gradually converges to "O" with a time constant determined by the band of the low-pass filter 44. Note that the time constant of the phase-locked loop 42 is set to a value approximately equal to the transmission line jitter wander by optimally designing the low-pass filter 44 and the like. By using the above-mentioned switching circuit in the clock switching circuit 30, the clock switching circuit 30 can be used even when switching from the clock signal CLI of the active transmission line to the clock signal CL2 of the protection transmission line.
The switching clock signal CL3 outputted by the switching clock signal CL3 changes with a time constant approximately equal to the transmission line jitterwang.

FIG. 3 is a block diagram of a transmission line switching device according to a second embodiment of the present invention. The feature of the second embodiment is that the delay compensation circuit 13 is placed in front of the elastic store 12, so that the switching circuit portion and the delay compensation circuit portion are separated. The rest of the structure is the same as the first embodiment shown in FIG. With such a configuration, it becomes possible to replace (upgrade) the delay compensation circuit portion when the memory amount in the delay compensation circuit becomes insufficient.

FIG. 4 is a block diagram of a transmission line switching device according to a third embodiment of the present invention. The third embodiment is used for an optical transmission system,
A feature is that a delay compensation circuit 13 is provided before the receiving circuit 11. The delay compensation circuit 13 is composed of an optical variable delay circuit using an optical fiber or the like. The rest of the structure is the same as the first embodiment shown in FIG.

FIG. 5 is a block diagram of the optical variable delay circuit of the transmission line switching device according to the third embodiment of the present invention, in which a 2×2 optical switch and a pair of optical fibers of different lengths are considered as one unit, and they are connected in series. A two-way optical variable delay circuit is constructed by connecting the two. Bit delay compensation can be performed by operating each 2×2 optical switch based on the delay control signal CNTl sent to the delay compensation circuit 13.23 for delay compensation.

FIG. 6 is a block diagram of a transmission line switching device according to a fourth embodiment of the present invention. This is a configuration in which delay circuits are provided at two locations. With this configuration, when performing delay correction, rough correction is performed using delay compensation circuits 61 and 62 composed of optical variable delay circuits, etc., and minute portions of delay correction are performed using electric circuit memory, etc. Configured delay compensation circuit 13
．． 23, making it possible to reduce the burden on the delay compensation circuit.

〔Effect of the invention〕

As described above, the present invention has the excellent effect of being able to switch the signals and clock signals of the active and protection transmission lines without momentary interruption.

Furthermore, when the active system and standby system are configured in a 1:1 ratio, there is an advantage that switching is possible without momentary interruption even in the event of an abnormality such as a disconnection of a transmission line by maintaining a state in which switching is possible at all times.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a transmission line switching device according to a first embodiment of the present invention. FIG. 2 is a block diagram of the clock switching circuit of the transmission line switching device according to the first embodiment of the present invention. FIG. 3 is a block diagram of a transmission line switching device according to a second embodiment of the present invention. FIG. 4 is a block diagram of a transmission line switching device according to a third embodiment of the present invention. FIG. 5 is a block diagram of the optical variable delay circuit of the transmission line switching device according to the third embodiment of the present invention. FIG. 6 is a block diagram of a transmission line switching device according to a fourth embodiment of the present invention. 11.21... Receiving circuit, 12.22... Elastic store, 13.23.61.62... Delay compensation circuit, 30... Clock switching circuit, 40... Signal train switching circuit, 41... Selection circuit, 42... Phase locked loop, 43... Phase comparator, 44... Low pass filter,
45... Voltage controlled oscillator, 50... Phase difference detection circuit, Sl, S2... Signal train, CLI, CL2... Clock signal, CL3... Switching clock signal, CNT1,
CNT2, CNT5, CNT6...delay control signal, C
NT3, CNT4...Switching control signal. Patent Applicant: Nippon Telegraph and Telephone Co., Ltd. Agent, Patent Attorney: Takashi Ide - Example Clock switching circuit Figure 2

Claims (1)

[Scope of Claims] 1. The above-mentioned two-system receiving circuit receives input signal trains of two transmission lines consisting of a working system and a protection system, and outputs the two-system signal trains and a clock signal, respectively; A transmission line switching device comprising a signal train switching circuit that outputs a signal train of the operating system of the two systems based on an input switching control signal and a switching clock signal, a clock switching circuit that selects an operating system clock signal from among the clock signals from the receiving circuit and outputs it as a switching clock signal;
An elastic store is provided at each output of the above-mentioned two systems of receiving circuits, and temporarily stores the signal train according to the corresponding clock signal, and reads out each signal train according to the above-mentioned switching clock signal and supplies it to the above-mentioned signal train switching circuit. a phase detection circuit that detects the bit phase difference between the two systems of signals input to the signal train switching circuit, outputs a delay control signal, and outputs the switching control signal when the bit phases match; and the elastic store. A transmission line switching device comprising: a delay compensation circuit provided before or after each of the delay control signals and compensating for a time difference between signal trains input to the signal train switching circuit based on the delay control signal. 2. The clock switching circuit includes a selection circuit that selects an operating system clock signal from the two systems of clock signals based on the switching control signal, and a phase locked loop that generates the switching clock signal. 2. The transmission line switching device according to claim 1, wherein the phase-locked loop receives a clock signal from the selection circuit as a comparison input. 3. The transmission line switching device according to claim 1, wherein each of the delay compensation circuits is provided upstream of the receiving circuits of the two systems and is constituted by an optical fiber type optical variable delay circuit. 4. Each of the delay compensation circuits is comprised of an optical fiber-type variable optical delay circuit provided at the front stage of the receiving circuit of the two systems and an electric circuit memory provided at the rear stage of the variable optical delay circuit. The transmission line switching device according to item 1.