JPH0446021B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to receivers, and more particularly to radiotelephone receivers having the ability to detect interference at radio frequencies. In communications, interference is a problem when a limited frequency channel is shared by a large number of users, such as in mobile radio communications. That is, if a channel is already in use and another user uses the same channel, interference will occur in the radio frequency band, making it impossible for both parties to communicate. Although it is possible to reduce the chance of such interference by accurately checking the usage status of the channel before starting communication, this method is not sufficient due to the unstable lines of mobile radio systems. do not have. If this interference can be detected early while the amount of interference is small, it is possible to take measures such as switching to another channel, so a receiver that has the function of detecting interference is of practical significance.

Conventional methods for detecting interference have been proposed, for example, as described in Kozono and Ishikawa, "Study of co-frequency interference detection method in land mobile communications," Proceedings of the 1985 IEICE General Conference, No. 2176 (Reference 1). What is known is what is known. However, this method has the disadvantage that the circuit configuration becomes complicated.

An object of the present invention is to provide a receiver having an interference detection device with a simple circuit configuration.

The present invention provides a plurality of determination circuits that determine input digital signals based on different determination levels, a comparison means that compares and determines whether or not the outputs of the plurality of determination circuits match, and an output of the comparison means that is inputted.
The present invention is characterized by comprising an interference amount detection means for estimating the amount of interference at no frequency based on a value determined by the relationship between the determination discrepancy rate and the amount of interference.

Hereinafter, the present invention will be explained in detail using the drawings. FIG. 1 is a block diagram of a transmitter for performing communications targeted by the receiver of the present invention. The audio signal and digital signal input from input terminals 11 and 12 are combined by a combining circuit 13 and then transmitted by a transmitting circuit 14. The digital signal may be transmitted specifically for the receiver of the present invention, or may be a data signal transmitted simultaneously with the audio signal. FIG. 2 is a conceptual diagram of a transmission baseband signal spectrum in frequency multiplexing, which is an example of a method for multiplexing data signals and audio signals. Audio signal spectrum 2
2 and the digital signal spectrum 21 are separated in frequency so that they do not overlap. Since it is usually sufficient for audio signals to be transmitted in a band of about 300 Hz to 3 KHz, digital signals can be inserted above or below this frequency band. In the embodiment of the present invention, the case is shown in which it is inserted on the lower side. In this way, attempts have already been made to insert digital signals into the lower band of audio signals and transmit them; for example, Matsumoto, Hattori, et al.
"Study of busy signal transmission in mobile communications", Showa
Proceedings of the 58th National Conference of the Institute of Electronics and Communication Engineers, No.2201
(Reference 2). According to this result,
It has been shown that transmission at a transmission rate of about 50 bits/second is sufficient. As a method for simultaneously transmitting data signals and audio signals, in addition to multiplexing on the frequency axis as shown in this embodiment, multiplexing on the time axis can also be considered. By transmitting data signals at the same time as audio signals, you can specify which channel to switch to when interference occurs, etc.
Various degrees of control can be performed.

FIG. 3 is a block diagram for explaining an example of a receiver using the present invention. The transmitted signal is received by the receiving circuit 31. The concentrated power is branched into two, one of which is input to a high-pass filter 32, whereby an audio signal is obtained at an output terminal 33. The other signal is input to a low-pass filter 34 to obtain a digital signal. This signal is judged by the sample judgment circuit 351, and the output terminal 3
6, a transmitted digital signal is obtained. A part of the sampled signal is input to the judgment circuit 352, and the comparison circuit 3 compares the judgment result with the previous judgment result.
7, and by inputting the output to the conversion circuit 38, a detected value of the amount of interference is obtained at the output terminal 39.

FIG. 4 is a block diagram for explaining in detail the operations of the sample determination circuit 351, determination circuit 352, and comparison circuit 37 included in the portion surrounded by the broken line in FIG. The data signal is transmitted to the clock regeneration circuit 43.
The sample and hold circuit 42 samples and holds the clock signal generated by the sample and hold circuit 42. This signal is judged by the first judgment circuit 44 and a transmitted digital signal is obtained. A portion of the sampled signal is also determined by the second determination circuit 45.
Here, it is assumed that the first and second determination circuits have different determination reference voltages. This situation is shown in FIG. Here, the signal waveform is schematically drawn, and shows the waveform before being sampled and held.
Samples are taken at optimal timing ts. The determination reference voltage of the first determination circuit 44 is selected to be the optimum value v ₁ , and the determination reference voltage of the second determination circuit 45 is selected to be a value v ₂ deviated from the optimum value. Therefore, the error rate of the first determination circuit is higher than the error rate of the second determination circuit. For example, if the error rate of the first determination circuit is 0.1% under a certain interference condition, the error rate of the second determination circuit is twice that, 0.2%. Therefore, the probability that the judgment result as the output of the comparison circuit 37 is judged as a mismatch is 0.1 depending on whether the position where the error occurred in the first judgment circuit and the position where the error occurred in the second judgment circuit match or do not match. % to 0.3%. As the amount of interference in the radio frequency increases, the error rates of the first and second determination circuits increase. The degree to which this error rate increases is due to the second
The determination circuit is larger than the first determination circuit because the determination reference voltage is deviated from the optimum value.
For example, if the amount of interference increases more than the above-mentioned interference condition and the error rate of the first determination circuit increases to 1%, the error rate of the second determination circuit becomes twice that amount, about 2%. At this time, the probability that the determination result as the output of the comparison circuit 37 will be inconsistent is 1% to 3%. The present invention uses this difference in the magnitude of increase in error rate to indirectly determine the amount of interference. The outputs of the first and second determination circuits are output from the exclusive OR circuit 4
6, and differences in determination results are detected. FIG. 6 is a signal waveform diagram showing this situation. Figures a and b show the outputs of the first and second determination circuits, respectively, and figure c shows the output of the exclusive OR circuit 46. Only when the determination results are different, the output of the exclusive OR circuit 46 takes a "high" level. The output of the exclusive OR circuit 46 is passed through the low pass filter 4.
7, a value proportional to the average value of the number of disagreements in the determination is obtained at the output terminal 48. For example, the relationship between this output and the amount of interference is measured in advance as shown in FIG.
8, the amount of interference can be detected at the output terminal 39.

As explained above, the present invention has the effect of being able to detect interference simply by adding a simple circuit. Furthermore, by using the digital line on which interference has been measured, it is possible to perform control such as switching to another channel while the influence of interference is small.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a transmitter that transmits signals for reception by the receiver of the present invention;
FIG. 2 is a diagram showing a spectrum of a received signal of a receiver according to an embodiment of the present invention, FIG. 3 is a block diagram showing an embodiment of the present invention, and FIG. 4 is a diagram for explaining in detail the broken line portion in FIG. 3. Fig. 5 is a received waveform diagram for explaining the judgment reference level, Fig. 6 a to c
7 is a waveform diagram for explaining the mismatch detection operation of outputs determined based on different determination reference levels, and FIG. 7 is a diagram schematically showing the relationship between the amount of interference and the determined mismatch. In these figures, 11 is an audio signal input terminal, 12 is a digital signal input terminal, 13 is a synthesis circuit, 14 is a transmission circuit, 21 is a digital signal spectrum, 22 is an audio signal spectrum, 31
32 is a receiving circuit, 32 is a high-pass filter, 33 is an audio signal output terminal, 34 is a low-pass filter, 35
1 is a sample judgment circuit, 352 is a judgment circuit, 36
is a received data signal output terminal, 37 is a comparison circuit, 3
8 is a conversion circuit, 39 is an interference amount detection output terminal, 41
42 is a data signal input terminal, 42 is a sample hold circuit, 43 is a clock regeneration circuit, 44 and 45 are determination circuits, 48 is an exclusive OR circuit, 47 is a low-pass filter, and 48 is an interference amount detection output terminal.

Claims (1)

[Claims] 1 A plurality of judgment circuits that judge input digital signals based on different judgment levels, a comparison means that compares and judges whether the outputs of the plurality of judgment circuits match, and a comparison means that uses the outputs of the comparison means as input to compare the judgment mismatch rate. 1. A receiver comprising: interference amount detection means for estimating the amount of interference at a radio frequency based on a value determined by the relationship between the amounts of interference.