JPH04329676A - Manufacture of semiconductor acceleration sensor - Google Patents

Abstract

PURPOSE:To improve yield by forming a second semiconductor layer on a surface of a fifth sacrificing layer, removing fifth, fourth, third, second and first sacrificing layers by etching through an opening formed at the second layer, and forming a weight, a beam and a stopper. CONSTITUTION:A nitride film 27 is selectively formed on a surface of an N-type epitaxial layer through an oxide film 26, and a nitride film 29 is formed as a second semiconductor layer on the film 27. A cavity 11 is formed by removing sacrificing layers formed in a P-type substrate 16, an N-type epitaxial layer 18 and an N-type epitaxial layer 23 and on a surface of the layer 23. Parts remaining without etching become a weight 10 and a cantilever beam 14. Upper and lower stoppers of the weight 10 are formed of the film 29 and the substrate 16.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor acceleration sensor, and more particularly to a method of manufacturing a semiconductor acceleration sensor formed by etching a semiconductor substrate from one surface side.

0002

2. Description of the Related Art A conventional acceleration sensor will be explained based on FIGS. 29 and 30. FIG. 29 is a plan view of the acceleration sensor, and FIG. 30 is a cross-sectional view taken along the line XP-XP in FIG. 29. In FIGS. 29 and 30, 1 is a silicon wafer, which is sandwiched between glass plates 2 and 3. A groove 8 is formed in the silicon wafer 1 by etching. Then, the weight 7, the cantilever beam 4, and the support member 9 are integrally formed by the portions that were not etched. Furthermore, a piezoresistive element 5 is formed on the surface of the cantilever beam 104.

[0003] The weight 7 and the support member 9 are made of a silicon wafer 1.
The thickness of the material is used as is. Therefore, recesses 102 and 103 are formed on the surfaces of the glass plates 2 and 3 facing the weight 7 and the cantilever beam 4 so that the weight 7 can move. 6 is a resistor, which together with the piezoresistive element 5 constitutes a bridge circuit (not shown).

Next, the operation will be explained. When acceleration in the direction of arrow A is applied to the above device, the weight 7 is displaced downward due to the acceleration. As a result, the cantilever beam 4 is distorted, and the piezoresistive element 5 is also distorted. Since the resistance value of the piezoresistive element 5 changes when it is distorted, a potential difference occurs in the bridge circuit described above. A change in resistance value is determined based on this potential difference, and acceleration can be detected from the result.

[0005]

In the above-mentioned apparatus, after the silicon wafer 1 is etched from the back side, the piezoresistive element 5 is formed on the front side. Therefore, masks had to be used on both sides, making it difficult to align the masks accurately. Further, when forming the recesses 102 and 103 in the glass plates 2 and 3, alignment had to be performed. Therefore, there was a problem in that it was difficult to form the device with high precision.

Furthermore, if an excessive acceleration is applied due to movement of the apparatus after etching the silicon wafer 1 and before attaching the stopper, there is a risk that the beam 104 will be damaged. Furthermore, the thickness of the silicon wafer 1 is set to the thickness of the weight 7 (approximately 300 [μm]) and is used as is, and glass plates 2 and 3 are placed on both sides of the silicon wafer 1 as a stopper for the weight 4. Because of the installation, there was a problem that the device became larger and the weight increased.

Furthermore, due to the thickness of the adhesive bonding the glass plates 2 and 3 and the silicon wafer 1, the glass plate 2
, 3 and the weight 4, it is difficult to control the gap between the weight 4, air damping is difficult to act, and the detected value is unstable.

The present invention was made to solve the above problems, and by a process from one surface,
The present invention aims to provide a method for manufacturing a small and lightweight semiconductor acceleration sensor.

[0009]

Means for Solving the Problems The present invention provides a method for forming a first sacrificial layer made of silicon oxide inside a semiconductor substrate.
A second sacrificial layer is formed by forming a trench from the surface of the semiconductor substrate so as to reach a region other than a predetermined region on the side of the first sacrificial layer, and filling the trench with silicon oxide. a second step of forming a third sacrificial layer from the surface of the semiconductor substrate so as to reach the predetermined region on the side of the first sacrificial layer; a third step of forming a first semiconductor layer on the first semiconductor layer; a fourth step of forming a groove from the surface of the first semiconductor layer to the second sacrificial layer; and a fourth step of forming a groove on the first semiconductor layer. a fifth step of forming a fourth sacrificial layer by filling the groove formed in the first semiconductor layer with silicon oxide; Fifth
a sixth step of forming a sacrificial layer on the fifth sacrificial layer; a seventh step of forming a second semiconductor layer on the fifth sacrificial layer; and a seventh step of forming an opening at a predetermined position in the second semiconductor layer. 8 steps and
A cavity is formed by etching away the fifth sacrificial layer, the fourth sacrificial layer, the third sacrificial layer, the second sacrificial layer, and the first sacrificial layer from the opening. a ninth step, the first, second, third,
A feature is that the cavities formed by etching away the fourth and fifth sacrificial layers form a weight, a beam, and a stopper for regulating displacement of the weight.

0010

According to the present invention, a cavity is formed by etching away the first, second, third, fourth, and fifth sacrificial layers. Then, the region of the semiconductor substrate and the first semiconductor layer that remains unetched and surrounded by the cavity becomes a weight and a beam, and the semiconductor substrate around the cavity, the first semiconductor layer,
And the second semiconductor layer serves as a stopper for regulating the displacement of the weight. Therefore, the weight of the device can be reduced compared to the case where the stopper is configured by installing a glass plate or the like.

[0011] Also, the first semiconductor layer, the first, second and third
- The fourth and fifth sacrificial layers and the second semiconductor layer are all formed from one surface side of the semiconductor substrate. Therefore, the mask is placed only on the front side of the semiconductor substrate, and there is no need to perform mask alignment on both sides of the semiconductor substrate.

Note that since the first sacrificial layer and the fifth sacrificial layer are formed of silicon oxide, the thickness of each sacrificial layer can be controlled with high precision. Further, the second sacrificial layer and the fourth sacrificial layer were formed by forming trenches in the semiconductor substrate and the first semiconductor layer and then filling them with silicon oxide. Since the width of the groove can be controlled with high precision, the width of each sacrificial layer can be formed thin.

[0013]

Embodiment A first embodiment of the present invention will be described based on FIGS. 1 to 7. FIG. 1 is a plan view showing the sensor portion of this embodiment, and FIG. 2 is a sectional view taken along line II-II in FIG. In FIGS. 1 and 2, 10 is a weight, and 14 is a cantilever beam. A piezoresistive element 13 made of a P-type diffusion layer is formed on the surface of the cantilever beam 14. The P+ type diffusion layer 15 formed in the piezoresistive element 13 is a pad portion, and is connected to a bridge circuit (not shown). Further, the region of the piezoresistive element 13 on the weight 10 is formed to have a higher impurity concentration than other regions.

Reference numeral 16 denotes a P-type substrate, and an N-type epitaxial growth layer (hereinafter simply referred to as an N-type epitaxial layer) 18 is formed on the surface of the P-type substrate 16, and a further layer is formed on the surface of the N-type epitaxial layer 18. An N-type epi layer 23 is formed. Note that the P-type substrate 16 and the N-type epitaxial layer 18 constitute a semiconductor substrate, and the N-type epitaxial layer 23 constitutes a first semiconductor layer. A nitride film 27 is selectively formed on the surface of the N-type epitaxial layer 23 via an oxide film 26, and a nitride film 29 as a second semiconductor layer is formed on the nitride film 27.

11 is a cavity. The cavity 11 is formed by etching away the sacrificial layer formed inside the P-type substrate 16, the N-type epitaxial layer 18, and the N-type epitaxial layer 23, and on the surface of the N-type epitaxial layer 23, as described later. Ru. The remaining portions that are not etched become the weight 10 and the cantilever beam 14. Furthermore, the nitride film 29 and the P-type substrate 16 constitute upper and lower stoppers for the weight 10.

Next, the operation will be explained. Figure 2 for the above device
When an acceleration in the vertical direction is applied, the weight 10 is displaced in accordance with the acceleration. This displacement causes the beam 14 to become distorted, and the resistance value of the piezoresistive element 13 to change. Therefore, acceleration is detected by detecting the resistance value of the piezoresistive element 13 using the aforementioned bridge circuit.

Furthermore, the region of the piezoresistive element 13 formed on the surface of the weight 10 is not distorted by the displacement of the weight 10. Therefore, a highly concentrated P+ type diffusion layer is formed in this region to reduce the influence of the resistance value of the piezoresistive element 13 on the output. When the above device is subjected to excessive acceleration in the vertical direction as shown in FIG.
Or contact the semiconductor substrate 16. Further, if an excessive acceleration is applied in the vertical direction in FIG. 1, the weight 10 comes into contact with the N-type epitaxial layers 18, 23 or the P-type substrate 16 on both sides, and is no longer displaced. Therefore, even when a large acceleration is applied, the cantilever beam 14 is prevented from being damaged due to large distortion.

Further, since the cavity 11 around the weight 10 is formed by etching away the SiO2 layer as described later, the width can be reduced. Therefore, cavity 11
Since the volume of the weight 10 becomes smaller and less air is compressed by the displacement of the weight 10, the air becomes a damper that prevents the movement of the weight 10. In this way, by air damping, the weight 1
Since the displacement of 0 is stable, acceleration can be detected with high accuracy.

Next, the manufacturing method of this embodiment will be explained based on FIGS. 3 to 7. First, as shown in FIG. 3, a SIMOX (Separate)
ion by IMplant OXygen), a buried layer 1 consisting of SiO2 as a first sacrificial layer
7 is formed.

Next, as shown in FIG. 4, a single crystal N-type epitaxial layer 18 is formed on the surface of the P-type substrate 16. after that,
An N + -type diffusion layer 19 as a third sacrificial layer is formed in a predetermined region around the buried layer 17 from the surface of the N-type epitaxial layer 18 . Then, a vertical groove (hereinafter referred to as a trench) 2 is formed by anisotropic dry etching in a region around the buried layer 17 where the N+ type diffusion layer 19 is not formed.
0 is formed, and S as a second sacrificial layer is formed in the trench 20.
An iO2 layer 21 is filled by CVD.

Next, as shown in FIG. 5, the N-type epitaxial layer 18
A single crystal N-type epitaxial layer 23 is formed on the surface of the substrate. and,
A trench 24 is selectively formed on the SiO2 layer 21 by anisotropic etching, and a SiO2 layer 25 as a fourth sacrificial layer is embedded in the trench 24.

As shown in FIG. 6, in order to form the piezoresistive element 13, a region on the N+ type diffusion layer 19,
The surface of the N-type epitaxial layer 23 on which the SiO2 layer 25 is not formed is doped with boron (B), and a P-type diffusion layer is formed by thermal diffusion. Then, a P+ type diffusion layer 15 is formed on the surface of this P type diffusion layer to form a pad portion. Thereafter, a thin oxide film 26 is formed on the surfaces of the N-type epitaxial layer 23, the SiO2 layer 24, the piezoresistive element 13, and the P+ type diffusion layer 15. This is the surface of the oxide film 26 and the SiO2 layer 17.
A nitride film 27 is selectively deposited on regions where the nitride film 27 is not formed. Subsequently, a PSG film 28 as a fifth sacrificial layer is deposited on the surface of the oxide film 26 using the nitride film 27 as a mask. After that, the surface is planarized, and the nitride film 27 and P
A nitride film 29 as a second semiconductor layer is formed on the surface of the SG film 28.
is formed by anisotropic dry etching.

Next, as shown in FIG. 7, openings 61 are provided at predetermined locations in the nitride film 29. Etching is then performed through the opening 61 using a hydrogen fluoride (HF) buffer solution. By this etching, the oxide film 26 in the area not covered with the PSG film 28 and the vaginalization film 27, and the SiO
Two layers 25, 21, 17 are removed. Next, etching is performed through the opening 61 using a solution of hydrogen fluoride, nitric acid (HNO3), and acetic acid (CH3COOH) mixed in a ratio of 1:3:8. This etching depends on the impurity concentration, and the N+ type diffusion layer 19 has a higher impurity concentration than the N type epitaxial layers 18 and 23 and the P type substrate 16.
is removed. Through the above etching, a cavity 11 is formed, a P-type substrate 16 surrounded by the cavity 11, and an N-type epitaxial layer 1.
8 and 23 are the weight 10 and the cantilever beam 14.

As explained above, according to this embodiment,
A SiO2 layer 1 is formed inside the P-type substrate 16 by SIMOX.
7, N-type epitaxial layers 18 and 23 are formed on the P-type semiconductor substrate 16, an N+ type diffusion layer 19 is formed in a predetermined region of the N-type epitaxial layer 18, and a predetermined region of the N-type epitaxial layer 18, 23 is formed. Trenches 20 and 24 are formed in the regions, SiO2 layers 21 and 25 are formed in the trenches 20 and 24, a piezoresistive element 13 is formed on the surface of the N-type epitaxial layer 20, and a nitride film 27 is formed on the N-type epitaxial layer 23. and a PSG film 28, a nitride film 29 is formed on the surfaces of the nitride film 27 and the PSG film 28, and the nitride film 1
6 through the opening 61 provided in the PSG film 28, SiO2
The layers 25, 21, 17 and the N+ type diffusion layer 19 were etched away.

[0025] Therefore, the weight 10 and the cantilever beam 14 can be formed by a process starting from one surface, and there is no need to perform mask alignment from both sides, so that the device can be manufactured with high precision. In addition, since a stopper can also be formed using the above process, it is possible to prevent damage to the equipment due to excessive acceleration when it is moved during the manufacturing process, resulting in an effect of improving yield. . Further, according to the device of the above embodiment, since there is no need to newly attach a stopper, the device can be made smaller and lighter. Furthermore, as a sacrificial layer, a SiO2 layer 17 is formed using SIMOX, trenches 20 and 24 are formed, and the SiO2
Since the layers 21 and 25 are filled, the width of the cavity 11 can be formed narrow. Therefore, when the weight 10 is displaced, air damping is effectively performed, the detection accuracy is improved, and the cantilever beam 14 is prevented from being damaged due to excessive displacement of the weight 10. can get.

Next, a second embodiment will be explained based on FIGS. 8 to 12. In the first embodiment, the amount of displacement of the weight 10 was detected using the piezoresistive element 13, but in this embodiment, the amount of displacement of the weight is detected based on a change in capacitance.

FIG. 8 is a plan view showing the sensor portion of this embodiment, and FIG. 9 is a sectional view taken along line IX-IX in FIG. In FIGS. 8 and 9, 30 is a weight, and 35 is a cantilever beam. 16 is a P-type board, and inside the P-type board 16 is an S
A SiO2 layer is formed by IMOX. P type board 16
An N-type epi layer 18 is formed on the surface of the N-type epi layer 18.
An N-type epitaxial layer 23 is further formed on the surface. Note that the P-type substrate 16 and the N-type epitaxial layer 18 constitute a semiconductor substrate, and the N-type epitaxial layer 23 forms a first semiconductor layer.

A P-type diffusion layer 36 is formed on the surface of the N-type epitaxial layer 23.
is formed. A nitride film 27 is selectively formed on the surfaces of the N-type epitaxial layer 23 and the P-type diffusion layer 36 via an oxide film 26, and a nitride film 32 is formed on the nitride film 27. A P+ type polysilicon layer 33 is formed on the nitride film 32, and a nitride film 34 is formed on the P+ type polysilicon layer 33. Note that the P+ type polysilicon layer 33 serves as one electrode, and the P type diffusion layer 36 serves as the other electrode, forming a capacitor. Note that the nitride films 32 and 34 and the P+ type polysilicon layer 33 constitute an upper stopper 31 as a second semiconductor layer.

Next, the operation will be explained. Figure 9 for the above device
When an acceleration in the vertical direction is applied, the weight 30 is displaced in accordance with the acceleration. This displacement changes the capacitance between the P+ type polysilicon layer 33 and the P type diffusion layer 36. Therefore, acceleration is detected by detecting this capacitance.

Furthermore, if excessive acceleration is applied to the above device, the weight 30 comes into contact with either the upper stopper 31, the P-type substrate 16, or the N-type epitaxial layers 18 and 23 surrounding the weight 30. Therefore, even when a large acceleration is applied, the cantilever beam 35 is prevented from being damaged due to large distortion.

Next, the manufacturing method of this embodiment will be explained based on FIGS. 10 to 12. First, as shown in FIG. 10, a SiO2 layer 17 as a first sacrificial layer is formed on a P-type substrate 16 using SIMOX. Then, a single-crystal N-type epitaxial layer 18 is formed on the surface of the P-type substrate 16.
N+ type diffusion layer 19 as a third sacrificial layer in the type epitaxial layer 18
And a SiO2 layer 21 as a second sacrificial layer is formed. Furthermore, a single crystal N-type epi layer 23 is formed on the surfaces of the N-type epi layer 18, the N+ type diffusion layer 19, and the SiO2 layer 21, and the SiO2 layer 25 is formed on the N-type epi layer 23. The above steps are similar to the steps shown in FIGS. 3 to 5 of the first embodiment.

Next, as shown in FIG. 11, the N-type epitaxial layer 2
A P-type diffusion layer 36 is selectively formed on the surface of 3. Then, a thin oxide film 26 is formed on the surfaces of the SiO2 layer 25, the N-type epitaxial layer 23, and the P-type diffusion layer 36. After that, on the surface of the oxide film 26 except for the area on the SiO2 layer 17,
A nitride film 27 is selectively deposited. Next, the oxide film 26
A PSG film 28 as a fifth sacrificial layer is deposited thereon using the nitride film 27 as a mask. Thereafter, a nitride film 32, a P-type polysilicon layer 33, and a nitride film 34 are sequentially deposited on the surfaces of the nitride film 27 and the PSG film 28.

Next, as shown in FIG. 12, the nitride film 32,
Openings 62 are formed at predetermined locations in upper stopper 31 made of P-type polysilicon layer 33 and nitride film 34 by anisotropic dry etching. Then, through the opening 62, a hydrogen fluoride buffer solution is applied to the PSG film 28 and the SiO
The two layers 25, 21, and 17 are etched away. Next, the N+ type diffusion layer 19 is removed by etching with potassium hydroxide (KOH). Through the above manufacturing process, the device of this example is obtained.

As explained above, according to this embodiment,
A SiO2 layer 1 is formed inside the P-type substrate 16 by SIMOX.
N-type epitaxial layers 18 and 23 are formed on the P-type semiconductor substrate 16, an N+-type diffusion layer 19 is formed in a predetermined region of the N-type epitaxial layer 18, and the N-type epitaxial layers 18 and 23 are buried. The trench 20 is formed by forming trenches 20 and 24 in a predetermined area.
, 24, a P-type diffusion layer 36 is formed on the surface of the N-type epi layer 20, a nitride film 27 and a PSG film 28 are formed on the N-type epi layer 23, and the nitride film 27
Then, an upper stopper 31 consisting of a nitride film 32, a P+ type polysilicon layer 33, and an evaporation film 34 is formed on the surface of the PSG film 28. , 17, and N
The + type diffusion layer 19 was removed by etching.

Therefore, the same effects as in the first embodiment can be obtained, and a semiconductor acceleration sensor using capacitance can be obtained.

Next, based on FIGS. 13 to 19, the third
An example will be described. In the structure of this embodiment, the first sacrificial layer is formed not of SIMOX but by oxidizing the surface of a P-type substrate.

FIG. 13 is a plan view showing the sensor portion of this embodiment, and FIG. 14 is a sectional view taken along line XIV-XIV in FIG. 13 and 14, 40 is a weight;
4 is a cantilever beam. A piezoresistive element 43 made of a P-type diffusion layer is formed on the surface of the cantilever beam 44. 45
is a P+ type diffusion layer as a pad portion of the piezoresistive element 43.

Reference numeral 46 denotes a P-type substrate, and an N-type epitaxial layer 48 is formed on the surface of the P-type substrate 46, and an N-type epitaxial layer 53 is further formed on the surface of the N-type epitaxial layer 48. Note that the P-type substrate 46 and the N-type epitaxial layer 48 form a semiconductor substrate, and the N-type epitaxial layer 53 forms a first semiconductor layer. A nitride film 57 is selectively formed on the surface of the N-type epitaxial layer 43 via an oxide film 56, and a nitride film 59 as a second semiconductor layer is formed on the nitride film 57.

41 is a cavity. The cavity 41 is formed by etching away the sacrificial layer, as will be described later. Further, the nitride film 59 and the P-type substrate 46 constitute upper and lower stoppers for the weight 40, and prevent the cantilever beam 44 from being damaged due to excessive acceleration.

Next, the operation will be explained. Figure 1 for the above device
4. When acceleration is applied in the vertical direction, the weight 40 is displaced according to the acceleration. This displacement causes the beam 44 to become distorted, and the resistance value of the piezoresistive element 43 to change. Therefore, by detecting the resistance value of the piezoresistive element 43, acceleration is detected.

Next, the manufacturing method of this embodiment will be explained based on FIGS. 15 to 19. First, as shown in FIG. 15, a vaginalization film 64 is selectively formed on the surface of the P-type substrate 46. Then, the P-type substrate 46 is oxidized to form an oxide film 47 as a first sacrificial layer, and then the vaginalization film 64 is removed.

Next, as shown in FIG. 16, the P-type substrate 46
Then, an N-type epitaxial layer 48 is formed on the surface of the oxide film 47. At this time, the N-type epitaxial layer 48 formed on the oxide film 47 becomes polycrystalline, and the N-type epitaxial layer 48 formed on the P-type substrate 46 becomes single-crystalline. Thereafter, an N + -type diffusion layer 49 as a third sacrificial layer is formed in a predetermined region around the oxide film 47 from the surface of the N-type epitaxial layer 18 . And oxide film 47
A vertical trench 50 is formed by anisotropic etching in a region around the periphery of the N+ type diffusion layer 49 where the N+ type diffusion layer 49 is not formed.
Layer 51 is embedded by CVD. Note that the P-type substrate 4
6 and N-type epitaxial layer 48 constitute a semiconductor substrate.

Next, as shown in FIG. 17, the N-type epitaxial layer 4
8. On the surfaces of the N+ type diffusion layer 49 and the SiO2 layer 51, an N type epitaxial layer 53 is formed as a first semiconductor layer. Then, a trench 54 is selectively formed on the SiO2 layer 51 by anisotropic etching, and a fourth trench 54 is formed in the trench 54.
A SiO2 layer 55 as a sacrificial layer is buried by CVD. At this time, the N-type epitaxial layer 53 on the SiO2 layer 47
is polycrystalline because it is formed on a polycrystalline silicon layer,
The N-type epitaxial layer 53 in other regions is formed on a single-crystal silicon layer and is therefore single-crystal.

Further, the N+ type diffusion layer 49 constitutes a third sacrificial layer, and the SiO2 layers 51 and 54 constitute a second sacrificial layer.

As shown in FIG. 18, the N+ type diffusion layer 49 is a region on which the SiO2 layer 55 is not formed.
A P type diffusion layer 43 and a P+ type diffusion layer 45 are formed on the surface of the type epitaxial layer 53 to form a piezo element 43. After that, the N-type epitaxial layer 53, the SiO2 layer 54, the P-type diffusion layer 43,
A thin oxide film 56 is then formed on the surface of the P+ type diffusion layer 45. Thereafter, a nitride film 57 is selectively deposited on the surface of the oxide film 56 in a region where the oxide film 47 is not formed. Subsequently, a PSG film 58 as a third sacrificial layer is deposited on the surface of the oxide film 56 using the nitride film 57 as a mask. Thereafter, a nitride film 59 is formed on the surfaces of the nitride film 57 and the PSG film 58.

Next, as shown in FIG. 19, openings 63 are provided at predetermined locations in the nitride film 59. Then, through the opening 63, the oxide film 56, the SiO2 layers 55 and 51, and the oxide film 4 in the area not covered with the PSG film 58 and the vaginalization film 57 are exposed.
7 is removed by etching. Next, N+ with high impurity concentration
The shape diffusion layer 49 is removed. A cavity 41 is formed by the above etching, and an N-type epitaxial layer 48 surrounded by the cavity 41,
53 is the weight 40 and the cantilever beam 44.

As explained above, according to this embodiment,
An oxide film 47 is formed on the surface of the P-type substrate 46, and the P-type substrate 4
6 and oxide film 47, an N+ type diffusion layer 49 is formed in a predetermined region of the N-type epitaxial layer 48, and a trench 5 is formed in a predetermined region of the N-type epitaxial layer 48, 53.
0 and 54 are formed, SiO2 layers 51 and 55 are formed in the trenches 50 and 54, a piezoresistive element 43 is formed on the surface of the N-type epi layer 53, and a nitride film 57 and a PSG film are formed on the N-type epi layer 53. 58, a nitride film 57 and a PSG film 5.
A nitride film 59 is formed on the surface of the PSG film 58 and the SiO2 layers 55 and 51 through the opening 63 provided in the nitride film 59.
, the oxide film 47, and the N+ type diffusion layer 49 were removed by etching.

Therefore, the same effects as in the first embodiment can be obtained, and the SIMOX process can be omitted.
Since there is no need to use a separate device, an effect can be obtained in that the cost can be reduced compared to the first embodiment.

Next, a fourth embodiment of the present invention will be described based on FIGS. 20 to 27. In this embodiment, all the sacrificial layers are made of SiO2. FIG. 20 is a plan view showing the sensor portion of this embodiment, and FIG. 21 is a sectional view taken along line XXI-XXI in FIG. Figure 20 and Figure 2
1, 70 is a weight, and 74 is a cantilever beam. A piezoresistive element 73 is formed on the surface of the cantilever beam 74.

Reference numeral 76 denotes a P-type substrate, and an N-type epitaxial layer 78 is formed on the surface of the P-type substrate 76, and an N-type epitaxial layer 83 is further formed on the surface of the N-type epitaxial layer 78. Note that the P-type substrate 76 and the N-type epitaxial layer 78 constitute a semiconductor substrate, and the N-type epitaxial layer 83 constitutes a first semiconductor layer. Then, on the surface of the N-type epitaxial layer 83, an oxide film 86, a piezoresistive element made of the polysilicon layer 73, and an oxide film 67 are selectively formed in this order.

A vaporization film 87 is selectively formed on the surface of the oxide film 67 and the N-type epitaxial layer 83, and a nitride film 89 as a second semiconductor layer is formed on the vaporization film 87. .

[0052] 71 is a cavity. The cavity 71 is formed by etching away the sacrificial layer, as will be described later. Furthermore, the nitride film 89 and the P-type substrate 76 constitute upper and lower stoppers for the weight 70.

Next, the operation will be explained. Figure 2 for the above device
When an acceleration of 1 is applied in the vertical direction, the weight 70 is displaced in accordance with the acceleration. This displacement distorts the beam 74 and changes the resistance value of the piezoresistive element 73. Therefore, by detecting the resistance value of the piezoresistive element 43, acceleration is detected.

Next, the manufacturing method of this embodiment will be explained based on FIGS. 22 to 27. First, as shown in FIG. 22, a vaginalization film 65 is selectively formed on the surface of the P-type substrate 76. Then, the P-type substrate 76 is oxidized to form an oxide film 77 as a first sacrificial layer, and then the vaginalization film 65 is removed.

Next, as shown in FIG. 23, the P-type substrate 76
Then, an N-type epitaxial layer 78 is formed on the surface of the oxide film 77. At this time, the N-type epitaxial layer 78 formed on the oxide film 77 becomes polycrystalline, and the N-type epitaxial layer 78 formed on the P-type substrate 76 becomes single-crystalline. Thereafter, a trench 60 is vertically formed in a predetermined region around the oxide film 77 by anisotropic etching, and a trench 80 is formed in a region around the oxide film 47 where the trench 60 is not formed. Then, a SiO2 layer 79 as a third sacrificial layer is buried in the trench 60 by CVD, and a SiO2 layer 81 as a second sacrificial layer is buried in the trench 80.

Next, as shown in FIG. 24, the N-type epitaxial layer 7
8 and the N-type epitaxial layer 83 on the surfaces of the SiO2 layers 79 and 81.
form. At this time, the N-type epitaxial layer 83 on the SiO2 layer 77 is formed on a polycrystalline silicon layer, so it becomes polycrystalline, and the N-type epitaxial layer 83 in other areas is formed on a single-crystalline silicon layer, so it becomes single-crystalline. becomes. Then, trenches 84 are selectively formed on the SiO2 layer 81 by anisotropic etching.
is formed, and a fourth sacrificial layer of Si is formed in the trench 84.
An O2 layer 85 is embedded by CVD. Note that the P-type substrate 76 and the N-type epitaxial layer 78 constitute a semiconductor substrate, and the N-type epitaxial layer 83 constitutes a first semiconductor layer.

As shown in FIG. 25, an oxide film 86, a polysilicon layer 73, and an oxide film 6 are formed on the surface of the N-type epitaxial layer 83.
7 is sequentially deposited and selectively etched to form a piezo element.

Thereafter, as shown in FIG. 26, a nitride film 87 is selectively deposited on the surfaces of the N-type epitaxial layer 83, the SiO2 layer 85, and the oxide film 67, where the oxide film 77 is not formed. . Subsequently, an oxide film 67 and an N-type epitaxial layer 8 are formed.
A PSG film 88 as a fifth sacrificial layer is deposited on the surface of the substrate 3 using the nitride film 87 as a mask. After that, the nitride film 8
A nitride film 89 is formed on the surfaces of 7 and PSG film 88.

Next, as shown in FIG. 27, openings 66 are provided at predetermined locations in the nitride film 89. Then, through the opening 66, the oxide film 67, the SiO2 layers 85, 81, 79, and the oxide film 77 in areas not covered with the PSG film 88 and the vaginization film 87 are removed by etching. The portions remaining without being removed by this etching become the weight 70 and the cantilever beam 74.

As explained above, according to this embodiment,
An oxide film 77 is formed on the surface of the P-type substrate 76, and the P-type substrate 7
6 and oxide film 77, and trenches 80 are formed in predetermined regions of N-type epitaxial layers 78 and 83.
, 84, 60 are formed, SiO2 layers 81, 85, 79 are formed in the trenches 80, 84, 60, respectively, a piezoresistance element 73 is formed on the surface of the N-type epitaxial layer 83, and a piezoresistive element 73 is formed on the N-type epitaxial layer 83. A nitride film 87 and a PSG film 88 are formed, a nitride film 89 is formed on the surfaces of the nitride film 87 and the PSG film 88, and the PSG film 8 is formed through an opening 66 provided in the nitride film 59.
8. The SiO2 layers 85, 81, 79 and the oxide film 77 were removed by etching.

Therefore, the same effects as in the first embodiment can be obtained, and the sacrificial layer can be etched at once, thereby simplifying the process.

Further, as shown in FIG. 28, instead of using a piezoresistance element, a P-type diffusion layer 96 is formed on the surface of the N-type epitaxial layer 83, and the second semiconductor layer is formed with a vaporization film 92 and a P-type diffusion layer 96. It may be formed by depositing a polysilicon layer 93 and a vaginalization film 94, and the acceleration may be detected from a change in capacitance between the P-type diffusion layer 96 and the P-type polysilicon layer 93. Such a structure eliminates the need for the oxide film 67 and polysilicon layer 73 formed in the fourth embodiment.

[0063]

As explained above, according to the present invention, the first sacrificial layer and the second sacrificial layer are formed using silicon oxide within the semiconductor substrate, and the third sacrificial layer is formed within the semiconductor substrate. , forming a first semiconductor layer on the surface of the semiconductor substrate;
A fourth sacrificial layer made of silicon oxide is formed so as to reach the second sacrificial layer from the surface of the semiconductor layer, a fifth sacrificial layer is formed on the first semiconductor layer, and a fifth sacrificial layer is formed on the surface of the fifth sacrificial layer. second to
The weight, the beam, and the stopper are formed by forming a semiconductor layer and etching away the fifth, fourth, third, second, and first sacrificial layers through the opening provided in the second semiconductor layer. .

Therefore, the device can be formed by a semiconductor process from one surface side, and the device can be made smaller and lighter. Further, since a stopper can also be formed by the above process, it is possible to prevent the device from being damaged due to excessive acceleration during the manufacturing process, and the yield can be improved. Furthermore, since the sacrificial layer can be formed narrowly, the gap between the weight and the stopper can be made extremely narrow, and the effect of stabilizing the detected value due to the effect of air damping can be obtained.

[Brief explanation of drawings]

FIG. 1 is a plan view showing a sensor of a first embodiment.

FIG. 2 is a sectional view of the first embodiment.

FIG. 3 is a sectional view showing the manufacturing process of the first embodiment.

FIG. 4 is a cross-sectional view showing the manufacturing process of the first embodiment.

FIG. 5 is a cross-sectional view showing the manufacturing process of the first embodiment.

FIG. 6 is a cross-sectional view showing the manufacturing process of the first embodiment.

FIG. 7 is a cross-sectional view showing the manufacturing process of the first embodiment.

FIG. 8 is a plan view showing a sensor of a second embodiment.

FIG. 9 is a sectional view of the second embodiment.

FIG. 10 is a cross-sectional view showing the manufacturing process of the second embodiment.

FIG. 11 is a cross-sectional view showing the manufacturing process of the second embodiment.

FIG. 12 is a cross-sectional view showing the manufacturing process of the second embodiment.

FIG. 13 is a plan view showing a sensor of a third embodiment.

FIG. 14 is a sectional view of the third embodiment.

FIG. 15 is a cross-sectional view showing the manufacturing process of the third embodiment.

FIG. 16 is a cross-sectional view showing the manufacturing process of the third embodiment.

FIG. 17 is a cross-sectional view showing the manufacturing process of the third embodiment.

FIG. 18 is a cross-sectional view showing the manufacturing process of the third embodiment.

FIG. 19 is a cross-sectional view showing the manufacturing process of the third embodiment.

FIG. 20 is a plan view showing a sensor of a fourth embodiment.

FIG. 21 is a sectional view showing a fourth embodiment.

FIG. 22 is a cross-sectional view showing the manufacturing process of the fourth example.

FIG. 23 is a cross-sectional view showing the manufacturing process of the fourth example.

FIG. 24 is a cross-sectional view showing the manufacturing process of the fourth example.

FIG. 25 is a cross-sectional view showing the manufacturing process of the fourth example.

FIG. 26 is a cross-sectional view showing the manufacturing process of the fourth example.

FIG. 27 is a cross-sectional view showing the manufacturing process of the fourth example.

FIG. 28 is a sectional view showing a fifth embodiment.

FIG. 29 is a plan view showing a conventional sensor.

FIG. 30 is a sectional view of a conventional example.

[Explanation of symbols]

10 Weight 14 Cantilever beam 16 P type board 29 Vaginal membrane 18 N type epi layer 23 N type epi layer 19 N+ type diffusion layer 17 SiO2 layer 21 SiO2 layer 25 SiO2 layer 23 PSG film 61 Opening

Claims (1)

[Claims] 1. A first step of forming a first sacrificial layer made of silicon oxide inside a semiconductor substrate;
forming a groove from the surface of the semiconductor substrate, filling the groove with silicon oxide to form a second sacrificial layer, and reaching the predetermined region on the side of the first sacrificial layer; a second step of forming a third sacrificial layer from the surface of the semiconductor substrate; a third step of forming a first semiconductor layer on the semiconductor substrate; a fourth step of forming a groove to reach the sacrificial layer; a fifth step of filling the groove formed in the first semiconductor layer with silicon oxide to form a fourth sacrificial layer; a sixth step of forming a fifth sacrificial layer of silicon oxide in a region on the first sacrificial layer and on the surface of the first semiconductor layer; and a sixth step of forming a second sacrificial layer on the fifth sacrificial layer. an eighth step of forming an opening at a predetermined position of the second semiconductor layer; and a seventh step of forming an opening at a predetermined position of the second semiconductor layer; a ninth step of forming a cavity by etching away the third sacrificial layer, the second sacrificial layer, and the first sacrificial layer; 4. A method for manufacturing a semiconductor acceleration sensor, characterized in that a weight, a beam, and a stopper for regulating displacement of the weight are formed by a cavity formed by etching and removing the fifth sacrificial layer.