JPH04322355A - Information exchange device - Google Patents

Abstract

PURPOSE:To improve the delay of processing due to acquisition and return of a buffer on a shared memory area with respect to message exchange. CONSTITUTION:With respect to an information exchange device which stores a message in the buffer on a shared memory area 10 to transfer it from a transmission-side device and a reception-side device at the time of message exchange between two devices 1 and 2 connected to a system bus 20 in a computer system, each of transmission-side and reception-side devices is provided with a storage means B of its own buffer and a buffer management means A, which performs such management that messages are not concentrated to the buffer of one device, independently of each other.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information exchange device for exchanging information (hereinafter referred to as a message) between two devices connected to a system bus in a computer system.

0002

[Prior Art] As a device for exchanging messages between two devices connected to a system bus in a computer system, a buffer pool (multiple buffers) is stored in a shared memory area that can be read/written by both devices. The device sending the message acquires one buffer in the buffer pool, stores the message, and transmits the address of that buffer to the receiving device. There are some systems that exchange messages by handing over information.

[0003] In such conventional devices, the buffer pool is shared, so when acquiring and returning buffers,
It is necessary to maintain consistent and consistent recognition of used and unused buffers between two devices. Therefore, management information for the buffer pool is placed in a shared memory area, and each device maintains consistent recognition by referring to and manipulating the management information on the shared memory area.

0004

[Problems to be Solved by the Invention] In a conventional configuration in which buffer pool management information is placed in a shared memory area, it is necessary to access (read/write) the shared memory area via the system bus. . However, since access via the system bus is slow, there is a problem in that referencing and manipulating buffer management information in the shared memory area when acquiring and returning buffers causes delays in processing time. Furthermore, in order to access the same management information, it is necessary to perform exclusive control to prohibit access by the other device when one device accesses it, which also causes a delay in processing time.

[0005] The present invention has been made to solve the above-mentioned problems of the conventional example, and although the buffer of the buffer pool is shared in message exchange between two devices, the buffer management information is not shared between the two devices. By making it possible to allocate the required number of buffers for each device from the buffer pool without having to place them in the shared memory area, it is possible to refer to and manipulate buffer management information via the system bus, and to easily manage data between two devices at that time. It is an object of the present invention to provide an information exchange device that eliminates the need for exclusive control and can improve the delay in processing time.

[0006]

[Means for Solving the Problems] In order to achieve the above object, the present invention provides a method for storing information when exchanging information between two devices connected to a system bus in a computer system and each having a CPU. A plurality of buffers are prepared as a buffer pool in the shared memory area of each device, and the sending device stores information in the buffers and passes the buffers to the receiving device, thereby exchanging information between mutual devices. In an information exchange device that performs an exchange, a storage means for storing the address of the buffer so that the receiving device uses the buffer as its own buffer for use at the next opportunity to transmit information, and a buffer owned by each device. Each device is configured to independently have a buffer management means for transferring ownership of a predetermined number of buffers from a device with an excess number of buffers to a device with a small number of buffers if the number of buffers is biased by a certain amount or more.

[0007]

[Operation] The information exchange device according to the present invention configured as described above allows buffer management without going through the system bus, which has a slow access speed, when acquiring and returning buffers, since each device has buffer management information independently. Information can be referenced and manipulated, and exclusive control between two devices is not required.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. (Configuration) FIG. 1 shows an overall system configuration diagram of an embodiment of a computer system to which the present invention is applied.

FIG. 2 shows the overall structure of the buffer pool and buffer management information for message exchange in this embodiment. FIG. 3 shows the structure of buffer management information in the embodiment.

FIG. 4 shows the information structure in the message exchange buffer in this embodiment. FIG. 5 is a schematic flowchart of the operation in the embodiment. FIG. 6 is a processing flowchart at the time of message transmission in the embodiment.

FIG. 7 is a processing flowchart at the time of message reception in this embodiment. FIG. 8 is a flowchart of buffer bias elimination processing in the embodiment. In the figures, the same reference numerals represent the same or equivalent parts.

In FIG. 1, 1 and 2 are devices that exchange information between each other, and 3 and 4 are internal memories of each device in which control programs and data are stored. 5 and 6 are CPUs of the respective devices and execute control programs. 10 is a shared memory area, 11 is a buffer pool, and 20 is a system bus. A is a buffer management means, which is composed of a control program for buffer management, a counter, etc., and B is a storage means, which is composed of a control program for buffer storage, a pointer to the owned buffer, etc., and is composed of an internal memory. 3 and 4 are provided independently.

A shared memory area 10 in which devices 1 and 2, which exchange messages with each other, and a buffer pool 11 are arranged, is connected to a system bus 20 as shown in FIG. Device 1 and Device 2 access (read) the shared memory area 10 via the system bus 20.
(read/write).

The mechanism of the embodiment includes a buffer pool 11 (indicated by buffers 111 to 118 in FIG. 2) formed in the shared memory area 10 as shown in FIG.
Buffer management means A and storage means B in each device for operating the buffer pool 11, and two message queues that serve as communication paths for sending and receiving messages.
12 and 21, and pointers to those two message queues.

(Operation) The operation will be explained below based on FIGS. 2 to 8. An example of a processing procedure when transmitting information between devices is executed as shown in FIG. That is, when the device 1 or 2 is started, the process shown in FIG. 5 is started, and first, in step S1, buffer management initialization process is executed, and then the process moves to step S2, where it is determined whether or not to send. If it is a transmission, the process moves to step S3 and executes the transmission process shown in FIG. 6, and then returns to step S2; if it is not a transmission, the process moves to step S4.

[0016] In this step S4, it is determined whether or not there is reception, and if it is not reception, the process directly proceeds to step S2.
Return to If it is reception, the process moves to step S5 to execute the reception process shown in FIG. 7, and then moves to step S6.

In this step S6, the count value N of the owned buffer number counter 2c in the buffer management means A is
exceeds the preset maximum number of buffers NB, and if N>NB, devices 1 and 2
It is determined that there is a bias in the number of owned buffers among the N
When ≦NB, the process directly returns to step S2.

Each processing step in FIG. 5 will be explained in detail below. (1) Initializing buffer management Divide the shared memory area 10 into multiple buffers of appropriate size, generate multiple buffers, and create a buffer pool 11.
shall be. The buffers are allocated to a predetermined specified number of buffers owned by device 1 and device 2, and registered (buffer addresses are stored) in storage means B in device 1 and device 2, respectively, and the number of buffers owned is also determined. Set in buffer management means A.

In this embodiment, buffers 111 and 112 to be used next are connected in advance to message queues 12 and 21, respectively. (2) Processing when sending a message (see Figure 6) Device 1
When sending a message from device 1 to device 2, in step 101 device 1 sends a message to device
The address of the buffer 113 is acquired from.

At this time, in step 102, the corresponding "pointer to the owned buffer" of the storage means B in the device 1 is set to 0 to register and delete the buffer 113, and in step 103, the number of owned buffers of the buffer management means A is set to 0. Subtract 1 from the contents of counter 1c.

In step 104, the device 1 writes the address of the buffer 113 in the pointer section to the subsequent buffer in the buffer 111 in the message queue 12, according to the information structure in the buffer shown in FIG.
The message section stores the message to be sent. Also, in step 106, the send message queue pointer 1
The address of the buffer 113, which is the last buffer, is stored in d.

[0022] This means that buffer 111 has been sent as a message to send message queue 12, buffer 113 has been acquired for storing the next message, and has been deleted from the buffers it owns. Become.

When transmitting a message from device 2 to device 1, the above-mentioned operations for device 1 and device 2 are performed in reverse for message queue 21. (3) Processing when receiving a message (see Figure 7) (2) above
When device 2 receives the buffer 111 in which a message is stored and transmitted by device 1, the process is as follows.

On the device 2 side, when it detects that a message has been sent, the message is transferred from the buffer 111 pointed to by the received message queue pointer 2e in step 201.
(The detection means is outside the scope of this invention, so a description thereof will be omitted.) Next, in step 202, the address of the buffer 111 after reading the message is registered in the storage means B as a self-owned buffer, and in step 203, the content of the owned buffer number counter 2c of the buffer management means A is set to 1.
Add.

In step 204, the device 2 reads the address of the buffer 113 from the pointer section to the subsequent buffer of the buffer 111 (see FIG. 4), and executes the process in step 2.
At step 05, the received message queue pointer 2e is set as the first message buffer. This causes buffer 1
11 has been moved from device 1 to the buffer owned by device 2.

Step 207 is performed when the type of received message is a buffer return message (see FIG. 4).
That is, it is executed when the buffer imbalance elimination processing program is executed.

When device 1 receives a message from device 2, the operations of device 1 and device 2 described above are performed in reverse for message queue 21. (4) Buffer unbalance elimination process (see Figure 8) Since the buffer is registered in storage means B of either device 1 or 2, the message exchange operations in (2) and (3) above are performed. In this case, there is a risk that the buffers owned by one device will be biased, and the other device will not have any buffers for exchanging messages. In order to solve this problem, the present invention performs the following operations.

The device 2 that received the buffer in step (3) extracts buffer addresses as many as the number in the return buffer counter 2b from the storage means B in step 301, and sends the address information as a message in step 302. In step 303, a code indicating that the message is a buffer return message is stored in the buffer as a message type designation (see FIG. 4), and the code is sent to device 1 according to the buffer sending operation described in (2) above. Send buffer.

At this time, in device 2, step 304
The number of buffers returned is subtracted from the buffer number counter 2c owned by the buffer management means A. Further step 30
In step 5, the registration of the returned buffer is deleted from storage means B (zero is set in the pointer to the owned buffer in FIG. 3).

When device 1 receives this message, in step 206 of the reception processing program, since the message type is designated as a buffer return message (
(See FIG. 4) Step 207 is executed, and the buffer address stored in the message is registered in storage means B, making it a self-owned buffer (see FIG. 7).

[0031] This eliminates the imbalance in owned buffers,
Both the devices 1 and 2 can manage to secure buffers of a certain amount or more in the buffer management means A and the storage means B. When device 1 receives a message from device 2, the above operations of device 1 and device 2 are performed in reverse.

[0032]

[Effects of the Invention] As explained above, in this invention, each device independently has a buffer management means A and a storage means B, so that it is possible to access the system bus when acquiring and returning a buffer on a shared memory area. Also, since the buffer management information in the same area is not accessed, it is possible to manage the buffer pool without exclusive control between devices at the time of access, and therefore it is possible to improve processing time delays in information exchange.

[Brief explanation of drawings]

FIG. 1 is an overall system configuration diagram in an embodiment.

FIG. 2 is an overall configuration diagram of buffer pools and buffer management information in the embodiment.

FIG. 3 is a configuration diagram of buffer management information in the embodiment.

FIG. 4 is a diagram showing the structure of information in a buffer in the embodiment.

FIG. 5 is a schematic flowchart of operations in the embodiment.

[Figure 6] Processing flow when sending a message in the embodiment
It is a chart.

[Figure 7] Processing flow when receiving a message in the embodiment
It is a chart.

[Figure 8] Buffer unbalance elimination processing flow in the embodiment
It is a chart.

[Explanation of symbols]

1, 2 Device 3,4 Internal memory 5,6 CPU 10 Shared memory area 11 Buffer pool 20 System bus A Buffer management means B. Storage means

Claims (1)

[Claims] Claim 1: When exchanging information between two devices connected to a system bus and each having a CPU in a computer system, a plurality of buffers for storing information are stored in a shared memory area of each device as a buffer pool. In an information exchange apparatus that exchanges information between devices, the sending device stores information in the buffer and passes the buffer to the receiving device. A storage means for storing the address of the buffer in order to make it a self-owned buffer used for the occasion of information transmission, and a storage means for storing the address of the buffer to be used for the occasion of information transmission, and a storage means for storing the address of the buffer to be used for the occasion of information transmission, and a storage means for storing the address of the buffer owned by each device. An information exchange apparatus characterized in that each device independently has a buffer management means for transferring ownership of a predetermined number of buffers to a device with a smaller number of buffers.