JPH0431939A - External storage device - Google Patents

Abstract

PURPOSE:To attain the connection to an optional position of the address mapping of an information processor by providing an address space storage means which stores an address space received from the information processor in a working state and an access grant means which grants an access to an address in the address space. CONSTITUTION:The comparators 111 and 112 outputs the comparison signals 113 and 114 every time an information processor has the accesses to the addresses including the head one through the final one. Then an AND circuit 115 outputs an enable signal 116. Under such conditions, the data can be read out via a data bus 109 or written into a memory 117 according to a read or write signal. The interval between the set head and final addresses is decided by the capacity of an external storage.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an external storage device for expansion that is externally connected to the main body of an information processing device or the like.

[Prior Art] Conventionally, in this type of device, only the address signals necessary for connection with the internal memory are connected from the information processing device main body, and the addresses of the external storage devices in the address map are transmitted from the information processing device main body. Access is made possible by decoding the address to be accessed and outputting an enable signal to the external storage device.

[Problem to be solved by the invention] However, in the above conventional example, the address mapping of the information processing device is determined physically, and the address is fixed regardless of the type of external storage device connected to the information processing device. However, the hardware of the information processing device to which the external storage device is connected must also have the same format.

The present invention eliminates the conventional drawbacks and provides an external storage device that can be connected to any address mapping position of an information processing device.

[Means for determining the problem] In order to solve this problem, the external storage device of the present invention:
an external storage device connected to the outside of the information processing device to supply various data or to be used as an additional RAM, address space storage means for storing address space designations when used from the information processing device; and access permission means that allows access to addresses within the address space.

Here, the address space storage means includes receiving means for receiving information representing accessible addresses based on address mapping of the information processing apparatus.

[Operation] In this configuration, the external storage device itself operates by setting addresses based on address mapping from the information processing device to the external storage device.

[Example code] Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram showing the configuration of the external storage device of this embodiment.

In FIG. 1, 101 is the external storage device, 102 is a connector for connecting the external storage device to the main body of the information processing device (not shown), 103 is a latch circuit for setting the start address on the address mapping of the external storage device, A latch circuit 104 sets the final address, and latch circuits 103 and 104 latch data on the data bus 109 using latch signals 105 and 106. 105 is a latch signal for causing the latch circuit 103 to latch the first address; 106 is a latch signal for causing the last address to be latched by the latch circuit 104; 107 is a read signal 1.1o for outputting data when reading data from the memory 117.
8 is a write signal when writing data to the memory 117.

109 is a latch circuit 103, 104-! A data bus for exchanging data with the memory 117, an address bus 110 for transmitting addresses output from the information processing device to each part, and a reference numeral 111 for comparing the start address latched by the latch circuit 103 with the address on the address bus 110; A comparator 112 outputs a signal (high) if the value of the address bus 110 is larger or equal to the value of the address bus 110, and a comparator 112 outputs a signal (high) if the value of the address bus 110 is smaller than or equal to the final address latched by the latch circuit 104. The comparator 115 outputs a high signal (high), and the signal output from the comparators 113 and 114 are both high.
If it is h, it is an AND circuit that outputs the enable signal 116 to the memory 117. 117 is a memory in which data is actually written and read.

The information processing device (not shown) connected to this external storage device outputs the start address for address mapping of this external storage device onto the data bus 109, and outputs the latch signal 10
5 is output and latched into the latch circuit 103. Next, the final address is output to the data bus 109, and the latch signal 1
06 is output and latched into the latch circuit 104. This external storage device has now been address mapped.

Thereafter, each time the information processing device accesses an address from the first address to the last address, the comparator 11
1.112 simultaneously outputs comparison signals 113° and 114,
AND circuit 115 outputs enable signal 116.

At this time, depending on whether the read signal or write signal is used, data may be read from the address on the address bus 110 to the information processing device via the data bus 109, or data may be read from the address on the address bus 110 to the memory 117 via the data bus 109. Can be written. Note that in this case, it is desirable that the interval between the first address and the last address to be set be determined based on the capacity of the external storage device.

[Other examples FIG. 2 is a block diagram showing the configuration of the second embodiment.

201 is an external storage device of this embodiment, 202 is a latch signal for latch for specifying a memory block, 203
204 is a decoder that decodes the latched memory block designation data; 205 is a decoder that decodes the upper bits of address bus 110; 206 is decoder 2;
AND that outputs an enable output only when an address in a block with decoded output from 04 is accessed.
It is an OR circuit.

In this embodiment, an information processing device (not shown) receives data specifying an address block to be mapped to the external storage device from the data bus 109, that is, the upper several bits of address information necessary for dividing into blocks, using a latch signal 202. It is latched into the latch circuit 203.

This data is decoded by a decoder 204, and a block designation signal n (1≦n≦N,
Only 1 (N is the maximum block number) is output. Mapping has now been completed for this external storage device.

The information processing device uses the decoder 20 every time it accesses the memory, etc.
5 decodes the address information output on the address bus 110, and outputs an address decode n when the nth address block is accessed. A
The ND-OR circuit 206 ANDs the block designation signal n and the address decode signal n, and if there is an output here, the enable signal 116 is output and the memory 117 is accessed.

FIG. 3 represents an AND-OR circuit 206.

The block designation signal n is a signal indicating a designated block latched by the latch circuit 203, and the address decode signal n is a signal that is sent to the decoder 20 based on the address information on the address bus 110.
5 is the output signal. In other words, this circuit outputs the enable signal only when the designated block and the address decode signal are the same block. The other operations are the same as in the previous embodiment, except for the method of address mapping of the external storage device.

As explained above, by realizing an external storage device that performs address mapping from the information processing device itself, it is possible to create a more versatile external storage device that is not affected by the hardware or memory mapping of the connected information processing device. becomes.

Furthermore, since address mapping is free, software can add various types of memory to convenient addresses, which has the effect of increasing software development efficiency.

[Effects of the Invention] According to the present invention, it is possible to provide an external storage device that can be connected to any address mapping position of an information processing device.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of the external storage device of the first embodiment, FIG. 2 is a block diagram showing the configuration of the external storage device of the second embodiment, and FIG. 3 is an AND-OR diagram of the second embodiment. FIG. 3 is a diagram showing an example of a circuit. In the figure, 101...external storage device, 102...connector, 103.104...-)99 circuits, 105°10
6... Latch signal, 107... Read signal, 108
...Write signal, 109...Data bus, 110.
... Address bus, 111, 112 ... Comparator, 113.114 ... Comparator output signal, 11
5...AND circuit, 116...Enable signal, 1
17...Memory, 202...Latch signal, 203...
... Latch circuit, 204, 205 ... Decoder, 20
6...AND/OR circuit. Shi゛

Claims (2)

[Claims] (1) An external storage device that is connected to the outside of an information processing device and is used to supply various data or serve as an additional RAM, and is an address space memory that stores address space designations when used from the information processing device. An external storage device comprising: means for accessing an address within the address space; and access permission means for allowing access to an address within the address space. (2) The external storage device according to claim 1, wherein the address space storage means includes receiving means for receiving information representing accessible addresses based on address mapping of the information processing device.