JPH04296173A - Method and device for preventing flicker of monitor in interlace system - Google Patents

Abstract

PURPOSE:To reduce the cost of the device, to decrease the mount area, to make the device immune to the effect of an output level and to employ the color pallet mode. CONSTITUTION:A picture data of an odd number field and a picture data of an even field adjacent to the scanning position of the odd number field are read respectively from an odd number field memory 2 and an even number field memory 3 at a prescribed speed and the picture data are arranged alternately by a multiplexer 6 at a speed twice the read speed, resulting that the double picture data are arranged in a same time interval of a line of the original field. The data is converted into an analog signal by a D/A converter 8 and the frequency is doubled with respect to the frequency of the original field. The analog signal is averaged by a low pass filter 10 and the frequency is restored to the original frequency and a new field line not causing a flicker is generated. The line is outputted to a display device via a buffer amplifier 12 so as to be synchronously with other two-color video signal.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention is applicable to, for example, NTSC
The present invention relates to a flicker prevention method and device used in interlaced monitors such as television receivers.

0002

[Prior Art] NTSC (National Telephone System)
2. Description of the Related Art A television receiver of the vision system committee system employs an interlaced system in which one screen (frame) is alternately interlaced scanned by scanning lines of odd-numbered fields and scanning lines of even-numbered fields. When this interlaced television receiver is used as a monitor to display an image with relatively high vertical resolution, a difference between odd and even fields appears on the screen, causing flickering. was there.

In order to prevent such flickering, the device is equipped with two field memories each storing image data of an odd field and an image data of an even field. The image data of the field is read out and added, and the added image data is averaged. As a result, it is known to take the arithmetic average of adjacent lines (scanning lines) to create new scanning lines for odd and even fields and send them to a display such as a CRT. In this case, conventional methods for adding image data include the following digital addition method and analog addition method.

[0004] In the digital addition method, pixel data of, for example, four pixels in two adjacent lines are simultaneously read out from each field memory, the pixel data of these four pixels are digitally added, and this addition result is added to the lowest order. The image data is averaged by shifting one bit to the bit (LSB) side, and the arithmetic averaged image data is converted into an analog signal by a D/A converter. In this case, for example, red (R), green (G)
, blue (B), and the arithmetic average is calculated for each color.

On the other hand, the analog addition method simultaneously reads out pixel data of, for example, four pixels in two adjacent lines from each field memory.
After each field is converted into an analog signal by a D/A converter, the signals converted by these D/A converters are added in an analog manner, and the added signals are averaged through a low-pass filter. , and send it to the display. Each D/ in this analog addition method
Since the output signals of the A converters are current values, when adding them, simply connect the output terminals of the D/A converters, and the output signals are added.

[0006]

[Problems to be Solved by the Invention] By the way, when displaying an image on a color monitor, the image is displayed on a computer-processed computer, such as VGA (Video Graph).
hics Array), there is a known method that uses the so-called color palette mode, which reduces the types of index data indicating colors by limiting the types of colors that can be expressed at the same time to a certain number. There is. This color palette mode uses image data in which each pixel is expressed as a single number (code) by indexing a lookup table using that number as an address.
One pixel is sent to a display as a set of color components of the three primary colors, for example, RGB, and displayed.

However, in the case of the above-mentioned conventional flicker prevention device, in the digital addition method, image data of adjacent lines is divided into RGB colors and stored in a field memory in advance, and the arithmetic average is calculated for each color digitally. , and it is not possible to digitally arithmetic average image data in which one pixel is represented by one color data, so there is a problem that it cannot be used when adopting the above color palette mode. there were.

On the other hand, in the analog addition method, the arithmetic average is performed in an analog manner for each RGB color and even when the image data of one pixel is represented by one numerical value, so it can also be used when adopting the color palette mode. Can be done. That is, when image data indicating each pixel as one data is stored in memories for each of odd and even fields, and image data read from these memories is subjected to analog conversion, the color palette mode is adopted. That is, by providing a look-up table (LUT) for color palette mode in front of each D/A converter, it can also be used when adopting color palette mode.

However, in the conventional analog addition type flicker prevention device, a D/A converter is required for each of the odd field and even field image data. When two sets of D/A converters are used in this way, there is a problem in that their output levels tend to vary, which affects the displayed image. Also, in general, D/
A. Converters are expensive and have large chip sizes, and a device that uses two sets of such D/A converters has the problems of being expensive, having a large chip mounting area, and being large.

The present invention overcomes the drawbacks of the prior art, makes it possible to adopt a color palette mode even when preventing flicker, and reduces the number of D/A converters. It is an object of the present invention to provide a method and device for preventing flicker in an interlaced system, which reduces the cost and size of the device, and is not affected by the output levels of a plurality of D/A converters.

[0011]

[Means for Solving the Problems] A method for preventing flicker in an interlaced system according to the present invention is a method for preventing flicker in an interlaced system in which an image is displayed for each frame by interlace scanning between odd field image data and even field image data. In a monitor flicker prevention method, odd field image data and even field image data are stored in field memories, respectively, and when the odd field image data is read out from these field memories at a predetermined speed, this field is scanned. Image data of even fields adjacent to the position are simultaneously read out, and the read image data is converted into analog data by alternately arranging odd fields and even fields at twice the reading speed, and this converted image is generated. New odd field image data is created by averaging the data in an analog manner, and when reading even field image data, adjacent to the scan position of this field on a different side from the odd field image data. Read out image data of odd fields at the same time,
These read image data are alternately arranged and converted into analog data at twice the read speed, and the converted image data is averaged in an analog manner to create new even field image data. A feature of the present invention is that the created image data of odd and even fields are displayed on a monitor.

The flicker prevention device according to the present invention also includes a first memory for storing image data of odd fields of interlaced image data, and a first memory for storing image data of even fields of interlaced image data. a second memory for reading the image data of the odd field from the first memory, the image data of the even field adjacent to the scanning position of this field is simultaneously read from the second memory; When reading even-numbered field image data from a field, data reading means simultaneously reads out odd-numbered field image data adjacent to the scanning position of this field, and the image data read by this data reading means is supplied, and the reading speed is increased. a selection means for alternately and selectively outputting image data of odd and even fields read at twice the speed of the selection means; It is characterized by comprising a digital-to-analog conversion means for converting into an analog signal, and a low-pass filter for averaging the analog signal converted by the digital-to-analog conversion means.

In this case, the first memory and the second memory store image data divided into monochromatic colors for each pixel in each field, and the data reading means reads the image data stored in these memories. Each color is read out at a predetermined speed, and the read image data for each color is alternately selected by the selection means at twice the readout speed and sent to the digital-to-analog conversion means and the low-pass filter. It is characterized by taking an arithmetic average.

[0014] Furthermore, the first memory and the second memory are
Image data is stored in one code that is not divided into monochrome colors for each pixel in each field, and the image data stored in the memory is read out at a predetermined speed by a data reading means. The output image data may be alternately selected by the selection means at twice the readout speed and arithmetic averaged by the digital-to-analog conversion means and the low-pass filter. Furthermore, in this case, the conversion means includes a lookup table for limiting the number of colors that can be expressed simultaneously, and converts the image data output from the selection means using this lookup table to convert it into an analog signal.

[0015]

[Operation] According to the flicker prevention method and device for a monitor in an interlaced system according to the present invention, odd field image data read out from the first memory and the second memory at predetermined speeds, and Image data of even-numbered fields adjacent to the field are alternately arranged by the selection means at twice the readout speed. Thereby, the output data of the selection means is arranged in field lines having twice as much image data as the original field at the same time interval as the read speed of the memory. This field line image data is converted into an analog signal by the D/A conversion means at the same speed as its output speed. This analog signal is averaged by a low-pass filter to the same frequency as the original field line to create a new field.

Furthermore, when using the color palette mode, one pixel is stored in the first memory and the second memory as image data of one code that is not divided into single colors, and the D
/A A look-up table is provided for limiting the number of colors that can be expressed simultaneously in the conversion means. As a result, flicker can be prevented while employing the color palette mode.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of a flicker prevention method and apparatus in an interlaced system according to the present invention will be described in detail with reference to the accompanying drawings.

As shown in FIG. 1, the basic structure of the flicker prevention device in this embodiment includes two field memories 2 and 4 for storing image data, and a system for storing image data read out from these field memories 2 and 4. A multiplexer (MPX) 6 that outputs data alternately and selectively, a digital-to-analog converter 8 (hereinafter referred to as a D/A converter 8) that converts the image data output from this multiplexer 6 into an analog signal, and this D/A converter 8 A low pass filter (LPF) 1 that averages the analog signal converted by the converter 8
0, and a buffer amplifier 1 that amplifies the image data output from this low-pass filter 10 and sends it to the display.
2, and a control circuit 14 that controls when image data is read from the field memories 2 and 4 and controls the conversion speed of the multiplexer 6 and the D/A converter 8.

In this embodiment, the anti-flicker device includes:
Each of the above circuits 2 to 12 is red (R), green (G),
It is configured to prepare for each color of blue (B) and perform processing for each color.

Specifically, the odd field memory 2 stores a line N in an odd field of any one color of interlaced R, G, B signals as shown in FIG.
, N+2, N+4, N+6 , . ．． ．． Video RAM (Random Access M
emory). The even field memory 4 has even field lines N+1, N+3, N+5, . . . of the same color as the odd field memory 2. ．． ．． Video RAM that stores
It is. New lines N, N+1, N+2, . ．． ．． is created.

The multiplexer 6 is a 2-input-1-output selection circuit, and outputs input data alternately based on the dot clock supplied from the control circuit 14. In this case, the dot clock supplied to the multiplexer 6 is
The data output from the multiplexer 6 is supplied at twice the speed of the dot clock supplied to the field memories 2 and 4, and the data output from the multiplexer 6 is divided into two parts of the input data at the same time interval.
It will have twice as much image data.

The D/A conversion circuit 8 includes a multiplexer 6
This is a circuit that converts the output data of the converter into an analog signal. A dot clock having the same speed as that of the multiplexer 6 is also supplied from the control circuit 14 to the D/A conversion circuit 8, and analog data having a frequency twice that of the original interlaced field data is output.

The low-pass filter 10 is a circuit that removes a predetermined high frequency component of input data, and averages the data supplied from the D/A conversion circuit 8, that is, input data having a frequency twice that of the original field. This circuit returns the signal to its original field frequency and outputs it.

The buffer amplifier 12 is an amplification circuit that amplifies the input signal to a predetermined level and supplies the amplified signal to the display.

The control circuit 14 controls the odd field memory 2
and sends an address and a dot clock for reading out the image data to the even field memory 4, reads out each image data, and simultaneously sends it to the multiplexer 6 and the D/A conversion circuit 8 at a speed twice as fast as the readout speed of the image data. This is a control circuit that sends out speed dot clocks to perform each process. Specifically, when reading image data from the odd field memory 2, the image data adjacent to the scanning line, for example, the next (
The image data of the even field scanning lines (upper and lower lines of the monitor screen) are controlled to be read out simultaneously from the even field memory 4. After this control is performed sequentially for one field, when image data is subsequently read from the even field memory 4, image data of the odd field line next to the scanning line is simultaneously read out. By sequentially reading out the lines of this even field, one frame is read out, and in the case of a moving image, this operation is repeated. This control circuit 14 simultaneously performs similar control on two other (two color) field memories.

Next, the operation of the flicker prevention device having the above configuration will be explained. First, the control circuit 14 reads out the first line of the odd field. In this case, for example, image data of four pixels (picture elements) of that line and four pixels of an adjacent even field line are read out simultaneously. In detail, as shown in FIG. 3, the image data (Odd Pix
el) ON, ON+1, ON+2 ~ and the image data (Even Pixel) of the even field line adjacent to this odd field line EN, EN+1, EN
+2~ are read dot by dot from the odd field memory 2 and the even field memory 4 in accordance with the dot clock supplied from the control circuit 14 and input to the multiplexer 6.

A clock at twice the speed of the dot clock is applied from the control circuit 14 to the multiplexer 6, and the dots in the odd field are turned on and off as shown in the lower part of FIG.
+1, ON+2~ and even field dots EN, EN
+1, EN+2 ~ are selected so that they are arranged alternately, and D
/A converter 8. As a result, the D/A converter 8 is supplied with data containing twice as much image data as the first line of the odd field in the time interval of the original interlaced field.

Next, a clock that is twice as fast as the dot clock is applied to the D/A converter 8 from the control circuit 14 in the same way as the multiplexer 6.
A. The converter 8 converts the alternately arranged dots ON, ON+1, ON+2 ~ of the odd field and dots EN, EN+1, EN+2 ~ of the even field into 2 clocks of the dot clock.
Convert to analog signal at twice the speed, low pass filter 1
Output to 0. As a result, the low-pass filter 10 has
A signal with twice the frequency of the original field is provided.

The low-pass filter 10 averages this analog signal to the original frequency and outputs it to the buffer amplifier 12. The buffer amplifier 12 outputs this signal to a display (not shown) in synchronization with the other two color signals.

In this way, the image data for 4 pixels of the first line of the odd field is arithmetic averaged with the image data of the even field line adjacent to that line, and is displayed on the display as new odd field image data. Is displayed.

Similarly, image data for four pixels is read out from field memories 2 and 4, and when image data for the first line of an odd field is newly created and sent to the display, a horizontal synchronization period is elapsed. Then, the second line of the odd field is arithmetic averaged with the image data of the even field of the next line, and sent to the display as a new second line of the odd field. Furthermore, the third and fourth lines are repeated in the same way, and when the last line of the odd field is sent out, there is a vertical retrace period, and then the first line of the even field is sent out in the same way as above. The arithmetic mean is taken with the odd field image data of the line and sent to the display as a new even field line. Like the odd field, this even field is repeated in sequence from the second line to the third line, and when the last line is sent out, one frame of the image is displayed on the display.

According to the above embodiment, the image data read out from the field memories 2 and 4 is included in twice the image data at the same time interval using the multiplexer, so one set of D/A conversion is performed for each color. 8 can be used, and has the advantage of not being affected by its output level. Furthermore, the price and mounting area of the device are not affected.

In the above embodiment, processing is performed for each RGB color and new field data is sent to the display for each color, but in the present invention, each color is stored in the field memories 2 and 4. It can also be applied to the case where pixel data is stored as one color data without dividing it into three colors. In this case, as shown in FIG. 4, a look-up table (LUT) 14 and D/ A color palette mode can be used by configuring a D/A conversion means using the A converter 8.

[0034] Since the sampling frequency of a normal NTSC television signal is as low as 4fc, it is relatively easy to construct a D/A converter that performs D/A conversion at twice the speed of the dot clock as described above. can be obtained. Furthermore, the present invention is not limited to the NTSC system, but can also be applied to other television systems.

[0035]

[Effects of the Invention] As explained above, according to the present invention,
The image data of the interlaced odd field and the image data of the even field adjacent to this line are arranged alternately, so that twice as much image data as the line of the original field is included at the same time interval. Each image data is converted into an analog signal by one D/A converter. Therefore, there is no need to provide two sets of A/D converters for odd and even fields.
The present invention has the advantage that it is not affected by variations in their output levels, and does not require an increase in the price or size of the device. Furthermore, when storing image data represented by one code that does not divide the image data into single colors in the field memory, a color palette mode can be used by providing a lookup table in the D/A conversion means.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of an anti-flicker device according to the present invention.

FIG. 2 is an explanatory diagram showing the principle of flicker removal in FIG. 1;

FIG. 3 is an explanatory diagram showing the operation of the multiplexer in FIG. 1;

FIG. 4 is a block diagram showing a modification of the D/A converter in FIG. 1;

[Explanation of symbols]

2, 4 Field memory 6 Multiplexer (MPX) 8 D/A converter 10 Low-pass filter (LPF) 14 Look-up table (LUT) 80 D/A
A Conversion means

Claims (5)

[Claims] 1. A method for preventing flicker on a monitor in an interlaced system in which an image is displayed for each frame by interlacing scanning between image data of an odd field and image data of an even field. Image data is stored in each field memory, and when reading image data of odd fields from these field memories at a predetermined speed, image data of even fields adjacent to the scanning position of the field are simultaneously read out. The converted image data is converted into analog data by arranging odd and even fields alternately at twice the reading speed, and the converted image data is averaged in an analog manner to create new odd field image data. When reading the image data of the even field, the image data of the odd field adjacent to the scanning position of the field is simultaneously read out on a different side from the image data of the odd field adjacent to the scanning position of the field, and the read image data is read out. The image data is alternately arranged at twice the readout speed and converted into analog data, and the converted image data is averaged in an analog manner to create new even field image data, and these created odd and even fields. 1. A method for preventing flicker on a monitor in an interlaced method, characterized by displaying image data on a monitor. 2. A first memory for storing odd field image data of interlaced image data; and a second memory for storing even field image data of interlaced image data. , said first
When reading image data of an odd field from the memory, image data of an even field adjacent to the data is simultaneously read from the second memory, and when reading image data of an even field from the second memory, data reading means for simultaneously reading image data of odd fields adjacent to the data, and image data read by the data reading means being supplied, and reading the image data of odd fields and even fields at twice the reading speed. selection means for alternately and selectively outputting image data;
A digital converter converts the image data outputted through the selection means into an analog signal in synchronization with the output speed of the selection means.
1. A flicker prevention device for a monitor in an interlaced system, comprising an analog converter and a low-pass filter that averages the analog signal converted by the digital-to-analog converter. 3. The flicker prevention device according to claim 2, wherein the first memory and the second memory store image data divided into monochromatic colors for each pixel in each field. , the data reading means reads each color stored in the memory at a predetermined speed, and the selection means alternately reads out the image data for each color at a speed twice the reading speed. A flicker prevention device for a monitor in an interlace system, characterized in that the flicker is selected and arithmetic averaged using a digital-to-analog conversion means and a low-pass filter. 4. The anti-flicker device according to claim 2, wherein the first memory and the second memory have one code that is not divided into monochrome colors for each pixel in each field. Storing image data, reading out the image data stored in the memory at a predetermined speed by the data reading means, and reading out the read image data at a speed twice the reading speed by the selection means. 1. A flicker prevention device for a monitor in an interlaced system, characterized in that a flicker prevention device for a monitor in an interlaced system is characterized in that arithmetic averaging is performed using a digital-to-analog conversion means and a low-pass filter. 5. The flicker prevention device according to claim 4, wherein the conversion means includes a look-up table for limiting the number of colors that can be expressed simultaneously, and converts the image data output from the selection means into a look-up table. An interlaced monitor flicker prevention device characterized by conversion using a lookup table and conversion into an analog signal.