JPH04286157A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the lowering of gate breakdown strength at the end section of a semiconductor thin-film used as the channel region of a thin-film transistor and the deterioration in the electrical characteristics of the thin-film transistor. CONSTITUTION:The gate electrode 3, gate insulating film 4, polycrystalline Si film 5 for forming a channel region and Si3N4 film 6 of a thin-film transistor are formed successively, at least the Si3N4 film 6 is patterned in the shape of the thin-film transistor, and the polycrystalline Si film 5 is oxidized by using the patterned Si3N4 film 6 as an oxidizing mask. An SiO2 film 8 is shaped around the polycrystalline Si film 5, thus preventing the lowering of gate breakdown strength at the end section of the polycrystalline Si film 5. The surface of the polycrystalline Si film 5 in a section covered with the Si3N4 film 6 is not oxidized, and no partial increase of the quantity of oxidation on the surface of the film 5 is generated, thus preventing the deterioration of the electrical characteristics of the thin-film transistor.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and is suitable for application to, for example, manufacturing a complete CMOS type static RAM using a thin film transistor as a load transistor.

0002

[Prior Art] In recent years, complete CMOS devices using thin film transistors (TFTs) as load transistors of memory cells have been developed.
Type static RAM is attracting attention. This complete commercial
The following methods are available for manufacturing TFTs used as load transistors in OS-type static RAMs. That is, as shown in FIG. 3A, an interlayer insulating film 102 is formed on a silicon (Si) substrate 101 on which driver transistors, access transistors, etc. (not shown) constituting a memory cell are formed. A TFT gate electrode 103 and a gate insulating film 1 are placed on top.
04 and polycrystalline Si film 1 for forming channel region of TFT
05, the polycrystalline Si film 105 is patterned into the shape of a TFT by etching. However,
In the vicinity of the end of the polycrystalline Si film 105 formed in this manner and used as the channel region of the TFT, the gate breakdown voltage is likely to deteriorate. Therefore, in order to prevent this gate breakdown voltage from deteriorating, the polycrystalline Si film 105 is oxidized.
As shown in FIG. 3B, a silicon dioxide (SiO2) film 106 is formed around this polycrystalline Si film 105.

0003

[Problem to be Solved by the Invention] It is necessary to add S to around the polycrystalline Si film 105 used as the channel region of the above-mentioned TFT.
Although it is possible to prevent the gate breakdown voltage from deteriorating by forming the iO2 film 106, the following new problem arises in this case. That is, the polycrystalline Si film 105
When oxidizing the polycrystalline Si film 105, the oxidation does not proceed uniformly on the surface of the polycrystalline Si film 105, and as a result, the amount of oxidation locally increases at the boundaries between crystal grains, that is, at the grain boundaries. Crystal S
A recess 105a is formed on the surface of the i-film 105, which may deteriorate the electrical characteristics of the TFT. Therefore, an object of the present invention is to provide a semiconductor device that can prevent deterioration of gate withstand voltage at the edge of a semiconductor thin film used as a channel region of a thin film transistor, and can also prevent deterioration of electrical characteristics of the thin film transistor. The purpose is to provide a manufacturing method.

0004

Means for Solving the Problems In order to achieve the above object, the present invention provides a method for manufacturing a semiconductor device having a thin film transistor.
3), a gate insulating film (4), a semiconductor thin film (5) for forming a channel region of a thin film transistor, and a silicon nitride film (
6) sequentially forming on the semiconductor substrate (1, 2);
At least a step of patterning the silicon nitride film (6) into a predetermined shape, and a step of patterning the silicon nitride film (6) into a predetermined shape.
6) as an oxidation mask to oxidize the semiconductor thin film (5).

[0005]

[Operation] According to the method for manufacturing a semiconductor device of the present invention configured as described above, the silicon nitride film (6) is used as an oxidation mask to oxidize the semiconductor thin film (5). An oxide film can be formed around the semiconductor thin film (5), thereby preventing the gate breakdown voltage from deteriorating at the end of the semiconductor thin film (5). Also,
Since the surface of the semiconductor thin film (5) in the portion covered with the silicon nitride film (6) is not oxidized, when the semiconductor thin film (5) is polycrystalline, the crystal grain boundaries of this polycrystalline semiconductor thin film (5) The amount of oxidation increases locally and this semiconductor thin film (5)
Since no recesses are formed on the surface of the thin film transistor, deterioration of the electrical characteristics of the thin film transistor can be prevented.

[0006]

Embodiments Hereinafter, embodiments of the present invention will be described with reference to the drawings. In both of the following two examples,
This invention is applied to the manufacture of a complete CMOS type static RAM using TFTs as load transistors. In addition, in all the drawings of the embodiment, the same or corresponding parts are given the same reference numerals. In the first embodiment of the present invention, as shown in FIG. 1A, a semiconductor substrate 1 such as a Si substrate, for example, a SiO2 An interlayer insulating film 2 such as a film is formed, and on this interlayer insulating film 2, a gate electrode 3 of a TFT made of, for example, a polycrystalline Si film, a gate insulating film 4 such as a SiO2 film, and a gate electrode 4 for forming a channel region of the TFT are formed. A polycrystalline Si film 5 and a silicon nitride (Si3 N4) film 6 used as an oxidation mask are successively formed. Here, the thickness of the polycrystalline Si film constituting the gate electrode 3 is, for example, 500 mm.
~600 Å, and the thickness of the gate insulating film 4 is, for example, 400 Å.
The thickness of the polycrystalline Si film 5 for forming the channel region is, for example, about 200 Å, and the thickness of the Si3 N4 film 6 is, for example, about 500 Å. Note that the polycrystalline Si film constituting the gate electrode 3 is doped with impurities at a high concentration, and the polycrystalline Si film 5 for forming the channel region is doped with impurities as necessary.

Next, as shown in FIG. 1B, a resist pattern 7 having a shape corresponding to the TFT is formed on the Si3 N4 film 6 by lithography, and then using this resist pattern 7 as a mask, the Si3 N4 film 6 is exposed to a reactive material, for example. Etching is performed in a direction perpendicular to the substrate surface using an ion etching (RIE) method. By this, Si3 N4
The film 6 is patterned into the shape of a TFT. Next, after removing the resist pattern 7, the polycrystalline Si film 5 is thermally oxidized using the Si3 N4 film 6 patterned in the shape of a TFT as an oxidation mask. By this, Figure 1C
As shown in FIG. 2, the portions of the polycrystalline Si film 5 not covered with the Si3 N4 film 6 are selectively oxidized to form the SiO2 film 8, and the polycrystalline Si film 5 takes on the shape of a TFT. Next, the Si3N4 film 6 is removed by, for example, wet etching using hot phosphoric acid.
The state is set as shown in FIG. 1D. Thereafter, a source region and a drain region (not shown) are formed by selectively ion-implanting impurities into the polycrystalline Si film 5, and the target TF
Complete T. In this case, the channel length direction of this TFT is perpendicular to the cross section shown in FIG. 1D. In addition, normally S
After removing the i3 N4 film 6, a hydrogenation process is performed to inactivate the trap levels in the polycrystalline Si film 5.

As described above, according to the first embodiment,
The polycrystalline Si film 5 for forming the channel region is made of Si3N4.
Since the film 6 is used as an oxidation mask for oxidation, Si is formed around the polycrystalline Si film 5 used as the channel region.
By forming the O2 film 8, this polycrystalline Si film 5
In addition to preventing deterioration of the gate breakdown voltage at the edges of the polycrystalline Si film 5, the surface of the polycrystalline Si film 5 in the portion covered with the Si3N4 film 6 is not oxidized, and therefore the amount of oxidation at the grain boundaries is increased. Thereby, there is no possibility that a recess will be formed on the surface of the polycrystalline Si film 5, and deterioration of the electrical characteristics of the TFT can be prevented.

Next, a second embodiment of the present invention will be described. In this second embodiment, first, as shown in FIG. 1A, a gate electrode 3, a gate insulating film 4, a polycrystalline Si film 5, and a Si3N4 film are formed on an interlayer insulating film 2 formed on a semiconductor substrate 1. 6 are formed one after another. Next, as shown in FIG. 2A, a resist pattern 7 having a shape corresponding to the TFT is formed.
is formed on the Si3 N4 film 6, and then, using the resist pattern 7 as a mask, the gate insulating film 4 is etched halfway in the film thickness direction in a direction perpendicular to the substrate surface by, for example, RIE. As a result, the Si3 N4 film 6 and the polycrystalline Si film 5
is patterned into the shape of a TFT. That is, the first
In the example, only the Si3N4 film 6 was patterned, whereas in this second example, the polycrystalline S
The i-film 5 is also patterned. Next, resist pattern 7
After removing the polycrystalline Si film 5, the polycrystalline Si film 5 is thermally oxidized using the Si3 N4 film 6 as an oxidation mask. As a result, as shown in FIG. 2B, only the sidewalls of the polycrystalline Si film 5 that are not covered with the Si3N4 film 6 are selectively oxidized and become Si.
An O2 film 8 is formed. Next, after removing the Si3N4 film 6 by etching to obtain the state shown in FIG. 1D, a source region and a drain region (not shown) are formed in the polycrystalline Si film 5.
is formed to complete the desired TFT.

As described above, according to the second embodiment,
As in the first embodiment, since the polycrystalline Si film 5 is oxidized using the Si3N4 film 6 as an oxidation mask, deterioration of the gate breakdown voltage at the edge of the polycrystalline Si film 5 can be prevented. At the same time, deterioration of the electrical characteristics of the TFT can be prevented.

Although the embodiments of the present invention have been described in detail above, the present invention is not limited to the above-described embodiments, and various modifications can be made based on the technical idea of the present invention. For example, in the embodiment described above, the complete C
Although a case has been described in which the present invention is applied to the manufacture of TFTs used as load transistors in MOS type static RAM, the present invention can generally be applied to the manufacture of various semiconductor devices having thin film transistors.

0012

[Effects of the Invention] As described above, according to the present invention,
Since the semiconductor thin film is oxidized using the silicon nitride film as an oxidation mask, it is possible to prevent deterioration of the gate withstand voltage at the edge of the semiconductor thin film used as a channel region, and to prevent local deterioration on the surface of the semiconductor thin film. Therefore, it is possible to prevent the electrical characteristics of the thin film transistor from deteriorating due to an increase in the amount of oxidation.

[Brief explanation of the drawing]

FIG. 1 is a sectional view for explaining a first embodiment of the invention.

FIG. 2 is a sectional view for explaining a second embodiment of the invention.

FIG. 3 is a cross-sectional view for explaining problems in the conventional manufacturing method of a TFT used as a load transistor in a complete CMOS static RAM.

[Explanation of symbols]

1 Semiconductor substrate 3 Gate electrode 4 Gate insulating film 5 Polycrystalline Si film 6　Si3　N4　film 8 SiO2 film

Claims (1)

[Claims] 1. A method for manufacturing a semiconductor device having a thin film transistor, comprising the steps of: sequentially forming a gate electrode of the thin film transistor, a gate insulating film, a semiconductor thin film for forming a channel region of the thin film transistor, and a silicon nitride film on a semiconductor substrate; A method for manufacturing a semiconductor device, comprising at least the steps of patterning the silicon nitride film into a predetermined shape and oxidizing the semiconductor thin film using the patterned silicon nitride film as an oxidation mask.