JPH04273728A - Selective call receiver - Google Patents

Abstract

PURPOSE:To improve operation convenience by enabling the registration of a routine text desired to be registered by a user himself. CONSTITUTION:A decoder 3 decides whether or not a received selective call code is the one addressed to its own receiver. When it is decided that the selective call code is the one addressed to its own receiver, a microprocessing unit 4 processes a message signal following the selective call code, and stores it in a message memory area in a RAM 7. When the routine text is registered, the microprocessing unit 4 writes a message designated by a function switch 8 out of the messages stored in the message memory area on the routine text regisration area of an EEPROM 6 as the routine text.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a selective call receiver, and more particularly to a fixed phrase registration function of a selective call receiver.

0002

2. Description of the Related Art Conventionally, in this type of selective calling receiver, as shown in FIG.
is demodulated by the radio section 2 and sent from the radio section 2 to the decoder 3 as a demodulated signal c. Here, the radio section 2 performs an intermittent reception operation in accordance with the battery saving control signal b from the decoder 3.

[0003] The decoder 3 converts the demodulated signal c from the radio unit 2 and the EEPRO
M(electrically erasable p
rogrammable read only mem
ory ) 15 and is set and checked against the selective call code of the own receiver. When they match, the decoder 3 notifies the microprocessor 4 that the selective call code has been detected using the interrupt signal d, the address bus e, and the data bus f. After that, the decoder 3 outputs the demodulated signal c
Error correction is performed on the data following the selective call signal within, and only the information bits are transferred to the microprocessor 4 using the interrupt signal d, address bus e, and data bus f. still,
Each selective call receiver is assigned a unique selective call number, and the selective call code converts this selective call number into BCH (BCH).
ose-Chaudhuri-Hocquenghem
) is coded.

When the microprocessor 4 receives the selective call code detection information from the decoder 3, it stores the selective call code detection information in a RAM (not shown) within the microprocessor 4 or in the RAM 7. Also, microprocessor 4
determines whether the data successively sent from the decoder 3 is message information or a selective call code.

If the data from the decoder 3 is message information, the microprocessor 4 stores the data in the RAM within the microprocessor 4 or in the buffer area of the RAM 7. The microprocessor 4 processes this process using the reference clock signal g input from the reference clock 13 via the decoder 3 as an operating clock.

If the data is a selective call code, microprocessor 4 stops receiving data at that point. At the same time, the microprocessor 4 starts the MPU operating clock 14, and the MPU operating clock 14
Process the data stored in the above buffer area using . The data processed by the microprocessor 4 is stored in the message memory area of the RAM 7 as a message (character data). Furthermore, when the microprocessor 4 finds a preset fixed phrase designation character in the data stored in the buffer area, it converts it into the fixed phrase of the number specified by the fixed phrase designation character. This fixed phrase to be converted is written in the EEPROM 15 in advance.

[0007] When the message signal reception processing is completed,
Microprocessor 4 connects speaker 1 through driver 9.
0 and LED (light emitting diode)
e) Drive the vibrator 11 or the vibrator 12 to notify the person carrying the receiver. At the same time, the microprocessor 4 displays the contents of the received message on an LCD (liquid display).
-crystal display) 5. The EEPR determines which of the speaker 10, LED 11, and vibrator 12 to use when notifying the carrying person.
It is determined by a combination of information preset in the OM 15 and the settings of the function switch 8. Note that the message stored in the message memory area of RAM 7 can be read again by the function switch 8.
It can be displayed on D5.

That is, the fixed text function of the conventional selective call receiver is such that when a fixed text designation character is received, the fixed text with the number specified by the fixed text designation character is stored in the EEPROM1.
5 and displayed on the LCD 5. In this case, the fixed phrase is registered in EEPROM15.
Since this is done using the write terminal 16, a write device was required separately from this receiver.

[0009] In such a conventional selective call receiver, since the receiver itself does not have a function for registering fixed phrases, a separate writing device is required to register fixed phrases. This writing device is much more expensive than the receiver itself and is more cumbersome to handle, so there is a problem that it is not suitable for use by end users.

[0010] Therefore, when the end user receives the receiver from the operator, he/she has the operator register his or her favorite fixed phrases in advance. However, if you want to change the fixed phrase, you need to have the operator register it again, which is very inconvenient for the end user.

[0011]

[Object of the Invention] The present invention has been made in order to eliminate the problems of the conventional ones as described above, and allows the user to register a fixed phrase that he/she wants to register, thereby improving the usability of the selective call reception. The purpose is to provide machines.

0012

[Structure of the Invention] A selective call receiver according to the present invention includes determining means for determining whether or not a selective call code is for the own device, and when the detecting means determines that the selective call code is for the own device. a selective call receiver comprising: a message processing means for processing a message code following the selective call code; a message memory for storing messages processed by the message processing means; and a fixed phrase memory for storing fixed phrases. and a registering means for registering the message specified by the specifying means as a fixed phrase in the fixed phrase memory. shall be.

[0013]

[Embodiment] Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In the figure, the selective call receiver according to one embodiment of the present invention is configured by a microprocessor 4 to perform an EEPR
Figure 10 except for registering fixed phrases in OM6
The configuration is similar to that of the conventional example shown in , and the same components are given the same reference numerals. Further, the operations of these same components are also the same as in the conventional example.

When the microprocessor 4 is instructed to register a fixed phrase by the function switch 8, the microprocessor 4
Among the messages stored in the message memory area of 7, the message specified by the function switch 8 is registered in the EEPROM 6 as a fixed phrase. Therefore, the end user can easily register the fixed phrase to be registered in the EEPROM 6 by transmitting the fixed phrase to the selective call receiver from the outside.

FIG. 2 is a block diagram showing the configuration of decoder 3 in FIG. 1. In the figure, a bit synchronization circuit 31 of a decoder 3 generates a reproduced clock m using a demodulated signal c from a radio section 2 and a reference clock signal from an oscillation circuit 39. The bit synchronization circuit 31 sends the generated reproduced clock m to the synchronization control circuit 32, a preamble, and an SC (synchronization signal).
A detection circuit (hereinafter referred to as synchronous signal detection circuit) 33, and a BC
H (Bose-Chaudhuri-Hocqueng
hem) error correction circuit 34 and selective call code detection circuit 3
5 and the baud rate monitoring circuit 36, respectively.

The synchronous control circuit 32 performs battery saving (
This circuit controls intermittent reception. This synchronous control circuit 32 is a POCSAG (Post Office Cod
e Standardization Advisor
y Group ) signal is not being received, the battery is being saved, and when the preamble detection signal i from the synchronization signal detection circuit 33 or the baud rate detection signal k from the baud rate monitoring circuit 36 is received, the continuous reception state is entered. Furthermore, the synchronization control circuit 32 starts the battery saving operation again in response to the synchronization signal detection signal j from the synchronization signal detection circuit 33, and performs reception at the timing of the group to which the own receiver belongs. Furthermore, when the synchronization control circuit 32 receives the selective call code coincidence detection signal o from the selective call code detection circuit 35, it continues to keep the radio unit 2 in the receiving state in order to receive the subsequent message signal. Incidentally, when performing a battery saving operation, the synchronous control circuit 32 outputs a battery saving signal h to the selective call code detection circuit 35, and also outputs a battery saving control signal b to the radio section 2.

The synchronization signal detection circuit 33 is the bit synchronization circuit 3
The demodulated signal c from the wireless section 2 is sampled using the reproduced clock m from 1, and when a preamble signal is detected, a preamble detection signal i is generated and output to the synchronization control circuit 32. Further, when the synchronization signal detection circuit 33 detects a synchronization signal following the preamble signal, it generates a synchronization signal detection signal j and outputs it to the synchronization control circuit 32.

The BCH error correction circuit 34 performs error correction on the demodulated signal c from the radio unit 2, and converts the message data p into M
It is output to the microprocessor 4 via the PU interface circuit 37 and data bus f.

The selective call code detection circuit 35 detects the timing of the battery saving signal h from the synchronous control circuit 32.
The selective calling code in the demodulated signal c from the radio section 2 is checked. When the selective call code in the demodulated signal c matches the selective call code of the receiver itself, the selective call code detection circuit 35 outputs a coincidence detection signal o to the synchronization control circuit 32. At the same time, the selective call code detection circuit 35 outputs a coincidence detection signal o to the microprocessor 4 via the MPU interface circuit 37 and the data bus f. The selective call code of the own receiver is set in the selective call code detection circuit 35 from the microprocessor 4 via the MPU interface circuit 37, the data bus f, and the selective call code setting signal q.

The baud rate monitoring circuit 36 receives the reproduced clock m from the bit synchronization circuit 31 and the demodulated signal c from the radio section 2.
It is determined whether the baud rate is the same as that of the POCSAG signal to be received. The baud rate detection signal k from the baud rate monitoring circuit 36 to the synchronous control circuit 32 is POCSAG.
It is used as a start-up from a battery saving operation in a state where no signal is received to an operation searching for a synchronizing signal, and is also used to cancel the battery saving operation even when a signal other than a preamble signal is received.

When the MPU interface circuit 37 receives the message data p from the BCH error correction circuit 34 or the coincidence detection signal o from the selective call code detection circuit 35, it outputs an interrupt request signal n to the interrupt control circuit 38. . When the interrupt control circuit 38 receives the interrupt request signal n from the MPU interface circuit 37, it outputs an interrupt signal d to the microprocessor 4.

The oscillation circuit 39 outputs the reference clock signal from the reference clock 13 as it is to the bit synchronization circuit 31, and also outputs it to the microprocessor 4 as a reference clock signal g.

FIG. 3 is a flowchart showing the message processing operation by the microprocessor 4 of FIG. The message processing operation of the microprocessor 4 will be explained using FIG. 3.

When the interrupt signal d from the decoder 3 indicates the detection of a selective call code (step 21 in FIG. 3), the microprocessor 4 stores the selective call code detection information from the decoder 3 in the RAM (not shown) in the microprocessor 4. ) or stored in the RAM 7 (step 22 in FIG. 3). Furthermore, when the interrupt signal d from the decoder 3 indicates reception of a message signal (step 23 in FIG. 3), the microprocessor 4
The data from the decoder 3 is sent to the R in the microprocessor 4.
It is stored in the buffer area of AM or RAM 7 (step 24 in FIG. 3). At this time, the microprocessor 4 processes the above-described process using the reference clock signal g input from the reference clock 13 via the decoder 3 as an operating clock.

Furthermore, the microprocessor 4 determines if the interrupt signal d from the decoder 3 does not indicate the reception of a message signal (step 23 in FIG. 3), that is, if the interrupt signal d from the decoder 3 indicates the detection of a selective call code. , at that point, data reception is stopped and the MPU operation clock 14 is activated (step 25 in FIG. 3). After this,
The microprocessor 4 uses the MPU operation clock 14 to process the data stored in the buffer area (
Figure 3 step 26). The microprocessor 4 stores the processed data as a message (character data) in the message memory area of the RAM 7.

FIG. 4 is a time chart showing the operations of the decoder 3 and microprocessor 4 in FIG. 1. In the figure, (a) shows the timing of the battery saving control signal b when there is no selective call signal of the own receiver in the received POCSAG signal. (b) is the received POC
It shows the timing of the battery saving control signal b when the selective calling signal in the SAG signal is the selective calling signal of the own receiver.

Further, (c) shows the timing of the interrupt signal d after receiving the selective call signal of the own receiver. The microprocessor 4 reads the message data from the decoder 3 at this timing and stores it in the RAM within the microprocessor 4 or the buffer area of the RAM 7.

Furthermore, (d) is the MPU operation clock 14
This is the oscillation timing. This oscillation timing indicates that the clock is oscillating when it is at a high level. At this timing, the microprocessor 4 uses the MPU operation clock 14 as an operation clock to process the data stored in the buffer area, and stores the processed data in the message memory area of the RAM 7 as a message (character data).

FIG. 5 is a diagram showing a fixed phrase registration area in the EEPROM 6 of FIG. In the figure, in the fixed-form sentence registration area 6a in the EEPROM 6, fixed-form sentences are registered in areas corresponding to fixed-form sentence numbers. In other words, the boilerplate number “
01” is the area corresponding to “CALL OFFICE”.
” has been registered. In addition, the fixed phrase number “
02" is the area corresponding to "URGENTRY CON
A fixed phrase called "TACT" has been registered. In addition, in the area corresponding to the fixed phrase number “03”, “PLEASE P
A fixed phrase "ICK UP AT" is registered. No fixed phrases are registered in the areas corresponding to fixed phrase numbers "04", "05", . . . .

FIG. 6 is a diagram showing an example of conversion of a fixed phrase. The figure shows an example of conversion when a fixed phrase as shown in FIG. 5 is registered in the fixed phrase registration area 6a in the EEPROM 6. As shown in FIG. 6(a), when the received character string "--01" is received, the microprocessor 4
refers to the fixed phrase number “01” in the fixed phrase registration area 6a in the EEPROM 6, and displays the fixed phrase “CALL OFFICE” on the LCD 5.

Furthermore, as shown in FIG. 6(b), "--0
3 YOKOHAMA STATION", the microprocessor 4
Refer to the fixed phrase number “03” in the fixed phrase registration area 6a in M6 and select “PLEASE PICK UP AT YOK”
OHAMA STATION” is displayed on LCD5.
to be displayed.

FIG. 7 is a diagram showing a fixed phrase registration operation according to an embodiment of the present invention, and FIG. 8 is a flowchart showing the operation of an embodiment of the present invention. The operation of an embodiment of the present invention will be explained using FIGS. 1 to 8.

When the display on the LCD 5 is off and the own receiver is in the standby state (step 41 in FIG. 8), when SW3 of the function switch 8 (hereinafter referred to as switch SW3) is pressed, the microprocessor 4 reads data from the RAM 7. The latest message is read out and displayed on the LCD 5 [see FIG. 7(a)] (step 42 in FIG. 8). The message number 1 is assigned to the beginning of this latest message. In other words, the LCD 5 displays "1: YOURNEXT APP".
The message "OINTMENT ISAT 9:00" is displayed. When the message is displayed on the LCD 5, the receiver enters a display waiting state (step 43 in FIG. 8).

In this state, each time the switch SW3 is pressed, a continuous screen is displayed on the LCD 5 (step 45 in FIG. 8). Furthermore, since messages are stored in the message memory area of the RAM 7 in the order of reception, if there is no screen to continue, the next message will be displayed on the LCD 5 by pressing the switch SW3 [see Figure 7(b)].
FIG. 8 step 44). In other words, the LCD 5 displays "2: PL
EASE RETURN TO YOUR OFFIC
The next message "E" will be displayed. Furthermore, SW2 of the function switch 8 (hereinafter switch SW2
), the previous message is displayed on the LCD 5 (step 46 in FIG. 8). At this time, when a timeout occurs, the display on the LCD 5 turns off and the receiver enters a waiting state (step 41 in FIG. 8).

When a message is displayed on the LCD 5, if SW1 of the function switch 8 (hereinafter referred to as switch SW1) is pressed, a menu (MENU) is displayed on the LCD 5 [see FIG. 7(c)]. 8
Step 47). At this time, the own receiver waits for menu selection (step 48 in FIG. 8).

[0037] At this point, press the switch SW3 to switch to LC.
Move the cursor on the screen of D5 (step 49 in Figure 8)
), when the cursor is at the DELETE position, press switch SW2 to enter the DELETE mode. Further, when the cursor is at the PROTECT position, pressing the switch SW2 switches to the PROTECT mode. Furthermore, if you press switch SW2 when the cursor is at the PROGRAM position, the registration mode (P
ROGRAM MODE) [see Figure 7(d)] (
FIG. 8 step 50). At this time, if switch SW1 is pressed or a timeout occurs, LCD5
The display becomes off, and the receiver becomes in a standby state (step 41 in FIG. 8).

When the registration mode is entered, the microprocessor 4 reads the standard sentence with the standard sentence number "01" from the RAM 7, and displays the standard sentence along with the standard sentence number on the second line of the LCD 5 [FIG. 7(e) reference]. That is, on the second line of the LCD 5, a fixed phrase "1: CALL OFFICE" is displayed. Here, the fixed phrase is stored in the fixed phrase registration area 6a of the EEPROM 6, but the EEPROM
Microprocessor 4 because the read speed from 6 is slow.
copies the fixed phrase and fixed phrase number from the fixed phrase registration area 6a of the EEPROM 6 to the RAM 7 when the receiver is powered on. When the fixed phrase and the fixed phrase number are displayed on the LCD 5, the receiver waits for the fixed phrase to be registered (step 51 in FIG. 8).

In this state, each time the switch SW3 is pressed, the fixed phrase stored in the fixed phrase registration area 6a is displayed on the LCD 5 (step 52 in FIG. 8). Incidentally, if no fixed phrase is registered in the fixed phrase registration area 6a, only the fixed phrase number is displayed on the LCD 5 [see FIG. 7(f)].

[0040] When only this fixed phrase number is displayed on the LCD 5, by pressing the switch SW2, the L
“PLEASE RETU” displayed on the first line of CD5
RN TO" is an unregistered standard message number "RN TO".
04" [see FIG. 7(g)] (step 53 in FIG. 8). That is, when the switch SW2 is pressed, the microprocessor 4 reads the message displayed on the first line of the LCD 5 from the message memory area of the RAM 7, and stores the message in the fixed phrase registration area 6a and the fixed phrase registration area of the RAM 7. Write. However, LCD
When the fixed phrase is displayed on the second line of 5, press switch S.
When W2 is pressed, the message currently displayed on the first line of the LCD 5 is overwritten on the registered part in the fixed phrase registration area 6a. At this time, if the switch SW1 is pressed or a timeout occurs, the display on the LCD 5 is turned off and the receiver enters a waiting state (step 41 in FIG. 8).

As a result of the above-described processing operation, "PLEASE" is placed at the position of the fixed phrase number "04" in the fixed phrase registration area 6a.
If the received character string "--04YOUR HOME" is received after the fixed phrase "RETURN TO" is registered, the microprocessor 4
6, refer to the fixed phrase number "04" in the fixed phrase registration area 6a, and select "PLEASE RETURN TO YOURH."
OME” is displayed on the LCD 5 [Figure 7 (
See h)].

FIG. 9 shows the P used for calling the selective calling receiver.
FIG. 3 is a diagram showing the format of an OCSAG signal. Figure 9 (
In a), the POCSAG signal is “101010...
” pattern, a synchronization signal (SC) for synchronizing code words, a selective call signal indicating a selective call code, a message signal in which the message to be transmitted is BCH coded, and a batch signal. It is composed of:

In FIG. 9(b), a batch includes a 32-bit synchronization signal (SC) provided at the beginning, and code words divided into eight groups that are intermittently received in each group by each selective call receiver. It consists of CW1 to CW16. Note that there are two types of codewords: address codewords (calling number) and message codewords (message data).

In FIG. 9(c), the code word has the most significant bit (MSB).
Bit) side to the least significant bit (LSB)
On the Significant Bit) side, 21 information bits, 10 check bits, and parity bits are arranged.

[0045] Regarding this POCSAG signal, "
STANDARD MESSAGE FORMATS F
OR DIGITAL RADIO PAGING”
[Post Office Code Standard
dissation Advisory Group (
POCSAG), Autumn. 1980]. This POCSAG is a time-sharing system, and each selective call receiver side performs a battery saving operation in which the receiving circuit is turned on only in the group to which it belongs, and the receiving circuit is turned off in groups other than the group to which it belongs.
Efforts are made to reduce current consumption.

In this manner, when the decoder 3 determines that the selective call code is for the own receiver, the microprocessor 4 processes the message signal following the selective call code and stores it in the message memory area of the RAM 7. Among the messages stored in the message memory area, the message specified by the function switch 8 is stored as a fixed text in the fixed text registration area 6 of the EEPROM 6.
By registering in ``a'', it is possible to register a message sent by the user himself, that is, a message that the user himself wants to register as a fixed phrase. Therefore, it is possible to easily register fixed phrases that suit the user's usage, and it is possible to improve usability.

[0047]

As explained above, according to the present invention, when it is determined that the selective call code is for the own device, the message signal following the selective call code is processed and stored in the message memory; By registering a specified message among the messages stored in the message memory as a fixed phrase in the fixed phrase memory,
Users can register the fixed phrases they wish to register, which has the effect of improving usability.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a block diagram showing the configuration of the decoder in FIG. 1.

FIG. 3 is a flowchart showing message processing operations by the microprocessor of FIG. 1;

FIG. 4 is a time chart showing operations of the decoder and microprocessor in FIG. 1;

FIG. 5 is a diagram showing a fixed phrase registration area in the EEPROM of FIG. 1;

FIG. 6 is a diagram showing an example of conversion of a fixed phrase.

FIG. 7 is a diagram showing a fixed phrase registration operation according to an embodiment of the present invention.

FIG. 8 is a flowchart showing the operation of an embodiment of the present invention.

[Figure 9] POCSAG used for calling selective calling receiver
FIG. 3 is a diagram showing a signal format.

FIG. 10 is a block diagram showing the configuration of a conventional example.

[Explanation of symbols]

2 Radio section 3 Decoder 4. Microprocessor 5 LCD 6 EEPROM 6a Fixed phrase registration area 7 RAM 8 Function switch

Claims (1)

[Claims] 1. Determination means for determining whether the selective call code is for the own device; and a message signal following the selective call code when the detection means determines that the selective call code is for the own device. A selective call receiver having a message processing means for processing a message, a message memory for storing a message processed by the message processing means, and a fixed phrase memory for storing a fixed phrase, the message memory storing a fixed message stored in the message memory. A selective call receiver comprising: a designating means for designating one of the messages; and a registering means for registering the message designated by the designating means as a fixed phrase in the fixed phrase memory.