JPH04265034A - Rejection processing system in atm network - Google Patents

Abstract

PURPOSE:To eliminate the need of a retransmission processing and to prevent the inconvenience which follows a delay of data by validating the final data of a cell which precedes a missing cell and using it as an alternate data of the missing cell. CONSTITUTION:A received cell is given to a memory 5 and a cell header check part 1. The check part 1 checks the header of the received cell, and gives a result of decision to a write control part 2. The control part 2 writes the cell in the memory 3 only in the case the result of decision is effective. The data stored in the memory 5 is read out by a read-out control part 4, whether the cell number is stored successively or not is checked by a number inquiry part 5, and in the case it is missing, the final data of the preceding cell becomes effective. In such a way, complication of a circuit configuration of a terminal machine, and the processing procedure is avoided without deriving the retransmission of rejection data, and also, a processing of receiving data can be executed in real time.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to ATM (Asynchr)
(Transfer Mode) network.

0002

2. Description of the Related Art An ATM network is a communication network based on a statistical multiplexing system, and as shown in FIG.
, 10c are connected to terminals 11a, 11b, 11c. The terminal device 11a etc. encodes the data to be transmitted, divides it into a large number of cells, and sends it to the statistical multiplex conversion device 10a etc. The statistical multiplex conversion device 10a etc. stores this in a buffer memory and transmits it to the transmission line 1.
While controlling so that more than a certain amount of cells do not flow above 0,
Send a cell. Receiving side statistical multiplexing device 10b
etc. receive this, store it in a buffer memory, and provide it to the connected terminal 11b, etc., and the terminal 11b separates the cell addressed to itself from the received data and decodes it to obtain the original data. In such an ATM network, cell discard processing is unavoidable due to overflow from the transmitting/receiving buffer memory or due to waiting delay. That is, if a cell overflows from the buffer memory, it will not be transmitted or, if received, will not be decoded. Furthermore, due to the restriction on the number of cells flowing on the transmission path 10, if a waiting period occurs for a certain period of time or more, the cell is discarded as data that cannot be transmitted.

[0003] When a cell is discarded, inconveniences due to data defects naturally occur, and for example, in the case of image signal communication, this leads to deterioration in the quality of the received image. As a countermeasure against this, the receiving side terminal 11b etc. can know the occurrence of discard from the number assigned to identify the cell, so the transmitting side terminal 11a etc.
There is a method of requesting data retransmission.

0004

[Problem to be solved by the invention] However, in order to make such a retransmission request, the circuit configuration becomes complicated.
There is a problem that the data processing procedure becomes complicated. In some cases, retransmission causes a delay in the data, making it useless. The present invention was made to solve this problem, and eliminates the need for retransmission processing by using the last value of the cell preceding the discarded cell as data to replace the discarded cell. , and also to propose a disposal method that eliminates the inconveniences associated with data delays.

[0005]

[Means for Solving the Problems] FIG. 1 is a diagram illustrating the principle of the system of the present invention. Received cell number (time stamp)
are ■, ■, ■, ■... as shown in the figure, and if the cell with number ■ is missing, the restored data uses the last data of cell ■ as data to replace the missing cell ■. It is.

[0006]

[Operation] By doing so, the circuit configuration and data processing procedure are significantly simplified compared to the case where a retransmission request is made. In the case of image data transmission, successive cells have data of adjacent areas. These data have a strong correlation and are often similar. Therefore, even if the last data of the preceding cell is used, there is no significant deterioration in image quality.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to drawings showing embodiments thereof. FIG. 2 is a block diagram schematically showing the configuration of a terminal used to implement the method of the present invention. The received cell is F
The signal is applied to a memory 3 consisting of an IFO and a cell header check section 1. The cell header check section 1 checks the header (described later) of the received cell, determines whether it is valid or invalid, and provides the determination result to the write control section 2 . If the determination result is valid, the write control unit 2 causes the cell to be written into the memory 3, and if the determination result is invalid, the write control unit 2 does not allow the cell to be written.

FIG. 3 is a block diagram schematically showing the structure of the memory 3, and FIG. 4 is a clock timing chart showing the cell format. As shown in FIG. 4, a cell consists of a header consisting of a code indicating its source, destination, etc. and a cell number TS, and data to be transmitted, for example, an image signal, and the memory 3 has a FIFO 31 for storing data and a cell number The write clock CLK2 is synchronized with the input timing of the cell number TS.
Write the cell number TS to the FIFO32 with
Transmission data is written to IFO31. Reading of the data stored in the memory 3 is performed by the read control unit 4, but the number matching unit 5 checks whether or not the cell numbers are stored sequentially. The last data is valid.

FIG. 5 is a block diagram showing the configuration of the readout control section 4 and number verification section 5. As shown in FIG. The cell head signal CH ((6) in FIG. 6, which is synchronized with the cell reception timing) generated by the terminal device is given to the number matching unit 5 as a counting enable signal, and the reference clock CLK also generated by the terminal device is given as a counting enable signal. A counter 51 is provided to count up (FIG. 6(1)). Figure 6 (7) shows the count contents.

Read clock C generated by read control unit 4
LK4 (FIG. 6(3)) is applied to the FIFO 32 of the memory 3, whereby the data of the cell number TS is sequentially read out (FIG. 6(5)), and is applied to the latch 52 of the number matching unit 5. The data of this cell number TS is taken into the latch 52 using the reference clock CLK, and the count contents of the counter 51 and the latch data are compared in the comparator 53, and when they match, the signal becomes high level (Fig. 6 (8) ) is output. This signal is connected to the AND gate 41 of the read control unit 4,
Given to 42. The other input to the AND gate 41 is the reference clock CLK, and its output is output as the clock CLK3 for detecting transmission data (FIG. 6 (2)), which is applied to the FIFO 31 of the memory 3 to read the transmission data. Close.

This clock CLK3 is also applied as a latch signal to a latch circuit 6 provided on the input side of the D/A (digital/analog) converter 7, and latches the read transmission data. The AND gate 42 is a three-input AND gate, and the other two inputs are the aforementioned reference clock CLK and the cell head signal CH, from which the aforementioned clock CLK4 is generated. Latch circuit 6
The latched data is converted into an analog signal by the D/A converter 7, and this data is output to, for example, a monitor.
It will be displayed here.

With the above configuration, the FIFO 32 of the memory 3
If the cell numbers TS are stored normally in sequence, the counter 51 is incremented and the transmission data of each cell is sequentially read out. On the other hand, if the cell number TS is missing, that is, if it is discarded, Fig. 6 (5) and (7)
As shown in FIG.
8)), its output changes to low level and the clock C
LK3 and CLK4 are not output. Therefore, the next data is not read out, and the D/A converter 7 is connected to the latch circuit 6.
The data latched in the cell, that is, the last data of the preceding cell, is directly D/A converted.

Next, the cell head signal CH and the reference clock CLK are applied, and when the counter 51 is incremented, if there is one missing cell, the content of the latch 52 that is not updated matches the content of the counter 51. Then, the clocks CLK3 and CLK4 can be obtained again.

[0014]

[Effects of the Invention] As described above, the present invention uses the data of the preceding cell without requesting retransmission of the discarded data (in the example of Fig. 1, the data of cell number This avoids complication and allows real-time processing of received data. Furthermore, when used for transmitting image data, the present invention exhibits excellent effects such as virtually no deterioration in image quality.

[Brief explanation of the drawing]

FIG. 1 is a diagram explaining the principle of the method of the present invention.

FIG. 2 is a block diagram of a terminal according to the present invention.

FIG. 3 is a block diagram of a memory.

FIG. 4 is a clock timing chart.

FIG. 5 is a block diagram of a read control section and a number matching section.

FIG. 6 is a timing chart of a number matching section.

FIG. 7 is an explanatory diagram of an ATM network.

[Explanation of symbols]

2 Write control section 3 Memory 4 Read control section 5 Number verification section

Claims (1)

[Claims] [Claim 1] Divide data into cells on the transmitting side,
This cell is sent to the transmission path according to statistical processing, and the receiving side restores the original data from the received cell.In the discard processing method when a cell is detected on the receiving side of an ATM network, the missing cell is A discard processing method characterized in that a plurality of data of preceding cells are used as valid data as substitute data for a missing cell.