JPH0425116A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make it possible to ash a photoresist without generation of photoresist residue by a method wherein a photoresist layer is heated up while ultraviolet rays are being projected or merely heated before impurities are implanted. CONSTITUTION:A silicon oxide film layer 2 is formed on a substrate 1, and after the wafer, having the photoresist layer 3 formed on the layer 2, has been heated up while ultraviolet rays are being projected or by conducting a simple heating, impurities are implanted, and then a hardened layer 5 and a photoresist heating layer 4 are ashed. To be more precise, before impurities are implanted, the photoresist heating layer 4 is formed by heating the photoresist layer 3 while ultraviolet rays are being projected or by conducting heating only. As a result, the trouble of scattering of the photoresist layer 3 can be eliminated, a high-speed ashing by a high power can be made possible, and the improvement in quality and in productivity can also be achieved.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a semiconductor device.

[Existing requirements of the invention]

1) In a method for manufacturing a conductor device, the photoresist layer serving as a mask is heated while being irradiated with ultraviolet rays or simply heated before impurity implantation, thereby causing ashing of the photoresist without generating photoresist residue. It was made so that it could be done.

[Conventional technology]

The conventional manufacturing method of semiconductor devices is shown in Fig. 2 +al to Fdl.
The photoresist was ashed after impurity implantation by the method shown in . Figure 2 (al is the result of forming photoresist residue 3 on the salethane silicon oxide film layer 2-1- formed on the substrate 1) Figure 2 (bl is the result of impurity implantation in Figure 2 (δ)) In this step, a hardened layer 5 is formed on the surface of the photoresist layer 3.
1 is in the middle of the ashing process of FIG. The ashing process is further advanced.Here, the photoresist scattered in FIG. When M3 loses zCj, it floats above the substrate and remains on the substrate without ashing.

[Problem to be solved by the invention]

However, in the conventional semiconductor device manufacturing method, when the fluorine resist is ashed after impurity implantation, the fluorine resist carbide and hardened layer remain on the lens 1 as residual fluorine resist.

[Means to resolve the problem] 1. In order to solve the problem described above, in the invention, before implanting impurities, the resist layer is heated with ultraviolet rays for a period of η1. Alternatively, a photoresist heating layer is formed by heating to 1i to prevent the generation of resist residue.

[Effect]

], it is possible to eliminate the generation of resist residue when the fumetre resist is ashed after impurity implantation.

(Examples) Examples of the invention will be described below based on the drawings.
Figures (a) to fQ) are sequential cross-sections 1 showing the method for manufacturing a semiconductor device of the present invention. FIG. 1(-1) shows a silicon oxide film layer 2 formed on a substrate 1.
A resist layer 3 is formed thereon. Figure 1 fbl is
As shown in FIG. 1(8), a fluorine resist heating layer 4 is formed by heating while irradiating ultraviolet rays or by simply heating. Here, the heating temperature is higher than the normal boss I/hake temperature, and the temperature needs to be high enough to harden the fumetresist. The temperature is approximately 120° C. or higher as a guideline, but the higher the temperature, the higher the effect, and the optimum temperature varies depending on the type of Fumetres 1-, so only the temperature as a guideline is described here.

Figure 1 FCI is the result of impurity implantation in Figure 1 (bl).At this time, a hardened layer 5 is formed on the surface of the fumetrenst layer. [Here] The first resist heating layer 4 has a small undercut with respect to the hardened layer 5, and therefore, if the ashing process is continued as it is, the hardened layer 5 will lift off and float away from the substrate. The problems caused by the conventional method, such as the blaster potential becoming floating during the ashing process and the ashing not progressing, have been solved.In addition, the foot resist ashing trapped in the hardened layer 5 has been solved. The phenomenon of scattering to the outside does not occur because the foot resist heating layer 4 is sufficiently hardened.The problem of flying λI and resist residue 3 is caused especially during high-temperature, high-power iodization treatment. This tends to occur, and if a low-temperature, low-power ashing treatment is performed to prevent this, a problem arises in that the hardened layer 5 is no longer ashed.

In the invention of , - Sootrenst Ka91. Each time the H layer 4 is formed, the above problem is solved, and high-speed ashing at high temperature and high power becomes possible, which contributes to not only quality improvement but also productivity improvement. The ashing process of Figure 1 (el, Figure 1 fd) is proceeding further. Hardened layer 5 and fluorine;
・Lettuce 1-Scattered matter 6 is carbonized and then washed/7I
Even at -1- level? However, this invention does not have the same problem as described above.

In this way, - ζ impurity implantation + ii + is not irradiated with ultraviolet rays and then υ (' 31 for every 4 times, So AI after impurity implantation - / Sos 1 at 3 iodine)・1/Sosu h remaining?n's release/-1 was able to be eliminated.

〔Effect of the invention〕

According to the present invention, semiconductor devices can be manufactured with high yield by eliminating resist residues during foot resist ashing after impurity implantation, as described below.

[Brief explanation of drawings]

FIG. 1 (01) is a step-by-step cross-sectional view of the semiconductor device manufacturing method of the present invention, and FIG. 2 (ta+-(dl) is a step-by-step cross-sectional view of the conventional semiconductor device manufacturing method. ], 11.Resist layer, hardened heating layer, hardened layer, 1 to 1, resist layer, carbide impurity implantation layer,

Claims (2)

[Claims] (1) A step of heating or simply heating a wafer consisting of a silicon oxide film layer formed on a substrate and a photoresist layer formed on the silicon oxide film layer while irradiating it with ultraviolet rays, and implanting impurities after the heating. and a step of ashing the hardened layer and the photoresist heating layer after the impurity injection. (2) The first heating temperature of the wafer is 120°C or higher.
A method for manufacturing a semiconductor device according to section 1.