JPH0421892B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a functional/logical language processing device, in particular,
It is a dedicated processing device such as a so-called Lisp machine or a Trolog machine, and when processing functional or logical languages, a language processing processor handles the scheduling and trapping of a process given as a language processing unit. The present invention relates to a functional/logical language processing device that performs processing, garbage collection, etc. using a general-purpose sequential processing processor.

[Conventional technology and problems]

Recently, research on artificial intelligence has become active, and functional languages such as Lisp and logical languages such as Prolog are attracting attention as programming languages. Various specialized processing devices have been developed to efficiently process these languages.

Figure 6 shows an example of a conventional back-end Lisp machine system.

In FIG. 6, 1 is a host processing unit made of a general-purpose computer, 2 is a console display, 3 is an external storage device such as a magnetic disk device, 4 is a channel interface device such as a channel coupling device,
5' represents a main memory for language processing, and 6' represents a processor for language processing.

Operator communication with the system is via the console display 2 of the host processor 1. For example, when a request is made to execute a program written in Lisp prepared in advance in the external storage device 3, the host processing device 1 transfers the program to the main memory 5' via the channel interface device 4. Then, the language processing processor 6' is requested to execute it.

The language processing processor 6' interprets and executes the Lsip language under microprogram control, and sends the processing results via the channel interface device 4.
The host processing device 1 is notified.

The control operations of the language processing processor 6' are defined by Lisp functions and microprograms, but when processing multiple processing requests from the host processing device 1, each processing request must be scheduled. An operating system is required. Furthermore, it is necessary to perform various types of trap processing and so-called garbage collection processing for recovering unnecessary areas on the main memory 5' in connection with the main memory 5'.

Conventionally, the language processing processor 6' has been configured to perform processing request scheduling and various trap processing, etc., according to its instruction system.
The operating system must be written using Lisp functions and microprograms,
I had the following problem.

If garbage collection occurs during scheduling or trap processing, control information may be lost, so Lisp functions that are subject to garbage collection cannot be used, and the functions that can be used are limited. be done.

The part written by the microprogram is
If debugging is difficult and a bug occurs,
It is difficult to detect and correct the error location.

In particular, it is difficult to take measures against garbage collection, and when expanding the functionality of an operating system, the command system that can be executed by the language processor 6' is not suitable for writing an operating system. It takes a lot of man-hours.

[Means for solving problems]

The present invention aims to solve the above problems by providing a processor dedicated to scheduling and trap processing.
Conventionally, language processing processors perform processing equivalent to the operating system functions.
By having the newly installed processor execute it, the processing load on the language processing processor is reduced, and at the same time, a hardware stack is provided in the language processing processor where registers, etc. are automatically saved when a trap occurs. This prevents processing inconsistencies caused by processing trap processing and the like outside the language processing processor. That is, the functional/logical language processing device of the present invention manages a language processing unit as a process in a functional/logical language processing device that processes a list-processable functional language or a logical language. a process control processor that schedules execution of the above processes and executes trap processing including garbage collection; a language processing processor that executes processing using a functional language or a logical language regarding each of the above processes under microprogram control; The processor includes a main memory in which virtual memory is managed and an area is allocated to each process, and a memory for an interface between the process control processor and the language processing processor related to process control. A system hardware stack is provided in which internal state information is saved when an occurrence occurs, and the process control processor is configured to notify the language processing processor of process environment information to be processed via the interface memory. It is characterized by being below,
An embodiment will be described with reference to the drawings.

〔Example〕

FIG. 1 is a system configuration diagram of an embodiment of the present invention, FIG. 2 is an internal processing configuration diagram of the process control processor shown in FIG. 1, FIG. 3 is an explanatory diagram of the system hardware stack, and FIG. FIG. 5 is a diagram for explaining control when a trap occurs, and FIG. 5 is an explanatory diagram of processing when an interrupt occurs.

In FIG. 1, numerals 1 to 4 correspond to FIG. 6,
5 is a main memory, 6 is a language processing processor, 7 is a process control processor that executes process scheduling and trap processing, etc., 8 is a local memory, 9 is a queue terminal, 10-1 and 10-2 are A process management table, 13 is a high-speed memory, 14 is a usage flag indicating the register saving state to the high-speed memory 13, 15 is a system hardware stack, 16 is a hardware stack used by the language processing processor 6 for language processing, 1
Reference numeral 7 represents a control memory (CS) in which a microprogram is stored, 18 represents an arithmetic unit, and 19 represents various registers in the language processing processor including a register file.

The software interface with the host processing device 1 may be considered to be similar to the conventional example shown in FIG. That is, the conventional software in the host processing device 1 can be used as is. The main memory 5 is managed by virtual memory, and a resource allocation unit called a process is associated with each Lisp language processing request unit from the host processing device 1, and an area of the main memory 5 is allocated to each process. .

The hardware stack 16, control memory 17, arithmetic unit 18, and various registers 19 of the language processing processor 6 can be considered to be the same as those of a conventional Lisp machine. That is, the language processing processor 6 executes microinstructions prepared in advance in the control memory 17 by the arithmetic unit 18 using the register 19 to process the Lisp language. The hardware stack 16 is
Used to inherit information from Lisp functions.

In the case of the present invention, the language processing processor 6 includes:
In particular, a system hardware stack 15 is provided. System hardware stack 15
is a memory circuit in which internal state information in the language processing processor 6, such as the contents of various registers 19, is automatically stored when a trap or interrupt request that interrupts the execution of the language processing processor 6 occurs. System hardware stack 1
5 is a pointer section 21 as shown in FIG. 3, for example.
and a register storage section 22, and the register storage section 22 is divided into blocks corresponding to each process. The pointer section 21 is accessed by a process number PNO that uniquely identifies a process,
Indicates an area of the register storage section 22 where register information and the like of the process is stored.

The process control processor 7 is a device that fetches and executes instructions prepared in advance in the local memory 8, and is realized by, for example, a mini computer or a micro computer. The process control processor 7 performs operating functions that were conventionally handled by the language processing processor 6.
Dedicate processing equivalent to the system. That is, process control based on requests from the host processing device 1, trap processing that occurs in conjunction with virtual memory management of the main memory 5, and the like are executed by sequentially processing machine language instructions. Information regarding each process is provided by the process management table 10-1,...
managed, process management table 10-1,...
are queued from the queue terminal 9 and managed according to the order of processing requests and waiting status.

The high-speed memory 13 is a cache memory for interfacing the process control processor 7 and the language processing processor 6. For example, when switching the process processed by the language processing processor 6, the register information saved in the system hardware stack 15 is saved in the high-speed memory 13, and the register information etc. of the process to be newly executed is The data is transferred from the process control processor 7 to the language processing processor 6 via the high-speed memory 13. The use flag 14 indicates that the contents of the system hardware stack 15 are in the high-speed memory 13.
This is a flag for notifying the process control processor 7 whether or not the data has been stored.

The internal processing configuration of the process control processor 7 is, for example, as shown in FIG. When a trap or normal interrupt occurs, control is transferred to the interrupt analysis section 30, which analyzes the cause of the interrupt and activates various processing sections corresponding to the interrupt.

If the cause of activation of the interrupt analysis section 30 is, for example, a memory-related trap, the trap processing section 31 is called, and the trap processing section 31 performs the following operations.
Perform the processing requested by the trap. Also,
For garbage collection, the garbage
Collector 32 is started and garbage collector 3
2 executes processing to recover areas on the main memory 5 that are no longer needed. The processing of the trap processing unit 31 and garbage collector 32 is performed using microinstructions and
It does not need to be written using Lisp functions or the like, and a language used by ordinary general-purpose computers can be used, so it can be created relatively easily.

When the cause of activation of the interrupt analysis unit 30 is inter-process communication, a processing request from the host processing device 1, etc., the scheduler 33 is activated. The scheduler 33 performs process control as follows depending on the specific content of the processing request. If the request is a process establishment request from the host processing device 1, the LOGON processing unit 37 is called, a process management table is created, and a new process is generated. Also, if it is a process termination request,
The TSSEND processing unit 34 is called to execute processing to delete the process.

For example, when a notification event occurs to a process, such as the completion of an input/output command, the POST processing unit 36 is called, the process is released from a waiting state, and the process is requeued to an executable state.
On the other hand, when a process issues a request to wait for an event occurrence, the WAIT processing unit 35 sets the process to a waiting state.

When a state is reached in which other processes can be executed, control is transferred to the sleep processing unit 38. The sleep processing unit 38 refers to the process management table, selects an executable process, and passes control to the main memory environment setting unit 39. The main memory environment setting unit 39 configures the main memory 5 related to the selected process.
Execute the process to prepare the virtual memory environment above. Next, the timer-related control unit 40 switches time information related to the processing time and the like of the process. Then, the process switching unit 41 is activated. The process switching unit 41 extracts register information and the like from the process management table of the newly executed process, stores the contents in the high speed memory 13, and sets the process environment. Then, a processing request is issued to the language processing processor 6. As a result, a new process will be processed by the language processing processor 6.

Next, control when a trap occurs will be explained with reference to FIG.

When a trap occurs, the processing in the language processing processor 6 is interrupted, and register information and the like currently used by the language processing processor 6 is saved in the system hardware stack 15.

At the same time, a trap request is transmitted to the process control processor 7, and the process control processor 7 executes processing corresponding to the trap request. The trap switching flag 50 indicates whether the trap is a normal trap or a garbage trap.
This flag indicates whether a trap requests collection. When this flag is ON, garbage collection is executed by the garbage collector 32. Note that garbage collection targets the area of the user process where the garbage collection request occurred, and during its execution, the language processing processor 6
can handle other user processes by process switching.

When the trap processing is completed, the process control processor 7 notifies the language processing processor 6 of the completion.

When the language processing processor 6 receives the trap completion notification, it loads the saved register information and the like into the system hardware stack 15.

Then, execution of the trapped process is resumed. In addition, the process control processor 7
In the trap processing, if a swap-in/swap-out of a program, etc. on the main memory 5 occurs, the process is switched in the same manner as the interrupt processing described later, and the processing of another executable process is executed. .

If an interrupt other than a trap occurs,
It is controlled as shown in FIG.

The language processing processor 6 saves register information and the like in the high speed memory 13 in response to an interrupt request. Note that while register information, etc. is being saved to the high-speed memory 13, the use flag 14 is set to ON, and when the saving is completed, the use flag 14 is turned OFF.

At the same time, the process control processor 7
analyzes the interrupt request and sends it to scheduler 3.
Process scheduling and dispatch processing according to step 3 are performed.

When using the register information of the language processor 6 in the dispatch process, the use flag 14 is referred to to check whether the save has been completed. If it is finished,
The register information and the like are set in the process management table related to the interrupt.

Next, obtain the register information of the process to be newly executed from the process management table,
Set in high-speed memory 13.

Then, the language processing processor 6 is notified of the end of scheduling by interrupt. The process control processor 7 then waits for a scheduling opportunity such as the next interrupt.

When the language processing processor 6 receives the scheduling completion notification from the process control processor 7, it loads register information and the like related to the new process from the high speed memory 13.

By setting the register information of the new process to the language processing processor 6, the language processing processor 6 will thereafter execute the processing of the switched process.

In the above embodiment, the language processing processor 6 is described as one that handles the Lisp language, but the process control processor 7 can also be used for other processing devices dedicated to language processing, such as a so-called Prolog machine. Needless to say, various types of trap processing and process scheduling processing can be executed.

〔Effect of the invention〕

As explained above, according to the present invention, it becomes possible to execute trap processing and scheduling processing, which have been difficult with the instruction processing system of a language processing processor, using the instruction processing function of a normal computer. . Therefore, development becomes easier, debugging becomes easier, and function changes and expansions can be dealt with flexibly. Furthermore, since the processing load on the language processing processor is reduced, processing performance is improved.

[Brief explanation of drawings]

FIG. 1 is a system configuration diagram of an embodiment of the present invention, FIG. 2 is an internal processing configuration diagram of the process control processor shown in FIG. 1, FIG. 3 is an explanatory diagram of the system hardware stack, and FIG. FIG. 5 is a diagram for explaining control when a trap occurs, FIG. 5 is an explanatory diagram of processing when an interrupt occurs, and FIG. 6 shows an example of a system of a conventional back-end Lisp machine. In the figure, 1 is the host processing unit, 2 is the console
a display, 3 an external storage device, 4 a channel interface device, 5 a main memory, 6 a language processing processor, 7 a process control processor, 8 a local memory, 9 a queue terminal, 10-1 to 10-2 is a process management table, 13 is a high-speed memory, 14 is a usage flag, 1
5 is a system hardware stack, 16 is a hardware stack, 17 is a control memory, 18
1 represents an arithmetic unit, and 19 represents a register.

Claims (1)

[Scope of Claims] 1. In a functional/logical language processing device that processes a functional language or a logical language capable of list processing, the language processing unit is managed as a process, and the execution of the process is scheduled.
A process control processor that executes trap processing including garbage collection, a language processing processor that executes processing using a functional language or logical language regarding each of the above processes under microprogram control, and virtual memory management is performed for each process. and a memory for interfacing between the process control processor and the language processing processor related to process control, and the language processing processor saves internal state information when a trap occurs. The process control processor is configured to notify the language processing processor of process environment information to be processed via the interface memory. function type/
Logical language processor.