JPH04196688A - Video signal processing circuit - Google Patents

Abstract

PURPOSE:To allow the correct reproduction of a DC level by substituting the output of a CCD image sensor with the potential equal to an optical black level in the period when unnecessary signals exclusive of video signals are outputted from the CCD-image sensor. CONSTITUTION:A resistor R, a capacitor C2 and an operational amplifier 5 constitute a sample-hold circuit and the optical black potential held in the capacitor C2 is inputted to one input terminal of a changeover switch 6. The video signal which is the output of a correlation double sampling circuit is inputted to another input terminal. The changeover switch 6 outputs the optical black potential when a BLK is an H level and output the video signal when the BLK is an L level. Then, the signal output by the unnecessary charge during a vertical blanking period is substd. with the optical black level and even if the input signal to an AGC amplifier 3 is DC-cut by a capacitor C1, the DC level is prevented from receiving a fluctuation even at an input point. Normal DC reproduction is possible in this way.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a video signal processing circuit for a video camera using a CCD area image sensor.

[Prior Art] Signal processing in a conventional video camera was performed by a circuit shown in FIG. In the figure, 1 is a CCD image sensor, 2 is a correlated double sampling circuit that samples and holds the six-power signal of CCD image sensor 1 while reducing noise, C4 is a capacitor for DC cut, and 3 is a variable gain amplifier 3a1 clamp. This is an AGC amplifier that develops a switch 3b and a voltage source 3c for clamping.

The variable gain range of the AGC amplifier 3 is normally about O to 18 dB, and when the gain is O dB, the white-black level potential difference is set to about 160 to 200 mV.

It is. Since the video signal output from the correlated double sampling circuit 2 contains low frequency components up to about 60 Hz in NTSC, it is ideal that it is input to the AGC amplifier through direct DC connection.

However, the circuit scale of the AGC amplifier section is large, and the I
C version is used, and the maximum gain is 18dB.
Because of the large size, it is difficult to match the DC potential with the external circuit. Therefore, in this signal processing circuit, capacitor C1
After cutting the DC component with The potential is adjusted to match the potential of the amplifier in the AGC section.

[Problems to be Solved by the Invention] Since a CCD image sensor performs vertical transfer using a vertical video blanking period, depending on the sensor driving method, output that is not necessary for the original video signal during the blanking period may be generated. A signal may appear. For example, when driving a CCD image sensor in a shutter mode that equivalently shortens the accumulation time in the photodiode, unnecessary charges in the sensor are swept out by driving the vertical register at high speed during the vertical blanking period. , when this transfer is performed in the forward direction, that is, towards the horizontal CCD register, unnecessary charge is output through the horizontal CCD register during the period during which this sweeping operation is performed (approximately 8 to 16H period), and the sensor output becomes saturated output (normally (approximately 1.0Vp-p) may occur. When such a sensor output is obtained, the output of the correlated double sampling circuit is as shown in FIG. However, AGC amplifier 3
Since the white level input to is about 20 mV when the gain is 18 dB, when unnecessary charges are swept out, the correlated double sampling circuit outputs a significantly larger signal than during the video signal output period. This large output signal is input to the AGC amplifier via the capacitor C1, but its signal level gradually decreases due to the discharging action of the variable gain amplifier 3a via the input impedance. As a result, the DC potential immediately after the vertical blanking period ends tends to drop, causing a sinking phenomenon in the image called "vertical sag." This phenomenon is caused by the optical black clamp circuit when inputting to the AGC amplifier. Although this can be improved to some extent by reproducing the noise, it is actually difficult to completely eliminate it due to the impedance components of the clamping switch and voltage source.

Furthermore, noise from vertical transfer pulses is superimposed on the output signal during the vertical blanking period. This noise level is several tens of mV, which is lower than the noise level due to unnecessary charges mentioned above, but when the gain of the AGC amplifier is the maximum of 18 dB, the influence of this noise cannot be ignored.

[Means for Solving the Problems] In order to solve the above-mentioned problems, the video signal processing circuit of the present invention correlates the output of the CCD area image sensor with 2
Regarding a video signal obtained by double sampling, there is a sample-and-hold circuit that samples and holds the potential of the optical black level period in this video signal or a period corresponding to it, and the potential obtained by this sample-and-hold circuit and the video signal. and a changeover switch configured to output the potential obtained by the sample and hold circuit during at least most of the vertical blanking period of the video signal.

[Embodiments] Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram showing one embodiment of the present invention, and FIG.
The figure is a timing chart of pulses used in this circuit.

In Fig. 1, 1 is a CCD image sensor, 2 is a correlated double sampling circuit, 3 is an AGC amplifier, 4 is a sample switch controlled by an optical black clamp pulse 0BCP, 5 is an operational amplifier, and 6 is controlled by a blanking pulse BLK. selector switch, 7
is a buffer amplifier.

The sample switch 4 is turned on during the optical black output period by 0BCP which becomes H level during this period, and transmits the optical black potential to the capacitor C2 via the resistor R. The resistor R1, the capacitor C2, and the operational amplifier 5 constitute a sample-and-hold circuit, and the optical black potential held in the capacitor C2 is input to one input terminal of the changeover switch 6 via a voltage follower by the operational amplifier 5 for impedance conversion. be done. The video signal which is the output of the correlated double sampling circuit is input to the other input terminal of the switching switch 6, and these two input signals become H level at the same time as the start of the horizontal blanking period and the end of this period. Switching is performed by a blanking pulse BLK which goes to the L level a little earlier, and goes to the H level at the same time as the start of the vertical blanking period, and goes to the L level about IH earlier than the end of the vertical blanking period. That is, the changeover switch 6 outputs an optical black potential when BLK is at H level, and outputs a video signal when BLK is at L level.

With this circuit, the signal output due to unnecessary charges during the vertical blanking period described above is replaced with the output potential of the operational amplifier, which is the optical black level, and is no longer input to the AGC amplifier 3. Therefore, even if the input signal to the AGC amplifier is DC cut by the capacitor C□, the DC level at the input point of the variable gain amplifier 3a will not be fluctuated, and by clamping the replaced optical black level, the normal state will be maintained. C playback begins.

FIG. 3 is a circuit diagram showing another embodiment of the present invention;
The figure is a timing chart of pulses used in this circuit.

The difference between the circuit of this embodiment and the circuit shown in FIG. They are connected points.

In this embodiment, the blanking pulse BLK' is a pulse that becomes H level only during a part of the vertical blanking period, and the clamp switch 3b is controlled by the optical black clamp pulse 0BCP (this point is (This is the same as the conventional example shown in the figure).

In the previous embodiment, since the blanking pulse BLK, which is at H level during the horizontal blanking period, was used as the control signal for the changeover switch 6, the video signal was replaced with the optical black level during the horizontal blanking period as well. In this embodiment, the output of the correlated double sampling circuit 2 is replaced by the optical black level only during the unnecessary charge output period within the vertical blanking period.

With the above configuration, this embodiment can also achieve the same effects as the previous embodiments.

[Effects of the Invention] As explained above, the present invention provides that during the period when unnecessary signals other than video signals are output from the CCD image sensor,
Since the output of the CCD image sensor is replaced with a potential equal to the optical black level, according to the present invention, fluctuations in potential due to unnecessary signals can be suppressed, and processing such as DC cut using a capacitor can be avoided. Even if you do so, you can correctly reproduce the DC level.

Further, in a CCD image sensor, noise of vertical transfer pulses is superimposed on the output signal during the vertical blanking period, but according to the present invention, the influence of this noise can also be suppressed.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing an embodiment of the present invention.
FIG. 3 is a circuit diagram showing another embodiment of the present invention; FIG. 4 is a pulse timing chart used in the circuit of FIG. 3; FIG. 5 is a circuit diagram of a conventional example, and FIG. 6 is an output waveform diagram of a correlated double sampling circuit when unnecessary charges are swept out and transferred during vertical blanking. DESCRIPTION OF SYMBOLS 1... CCD image sensor, 2... Correlation double sampling circuit, 3... AGC an7'', 3
a... Variable gain amplifier, 3b... Clamp switch, 3c... Voltage source, 4... Sample switch, 5... Operational amplifier, 6... Changeover switch, 7-9... Buffer amplifier , CI...DC
Capacitor for cutting, C2...Capacitor for maintaining optical black level.

Claims (1)

[Scope of Claims] A sample and hold circuit that samples and holds a potential during an optical black level period of a video signal obtained from the output of a CCD image sensor, the video signal and the output signal of the sample and hold circuit being input, and at least A video signal processing circuit comprising: a changeover switch that outputs the output signal of the sample hold circuit during most of the vertical blanking period and outputs the video signal during the other periods.