JPH04188919A - Spread spectrum modem - Google Patents

Abstract

PURPOSE:To simplify a spread spectrum demodulator at a reception side by providing a bit inserting device, and turning the code length of a generated spread code and an inverse spread code to 2N bit. CONSTITUTION:This equipment is equipped with a multiplying equipment 4 which prepares a spread clock by 2N (N is a positive integer) multiplying the clock of transmitted data, PN code generator 5 which generates an M series code by receiving the spread clock, and a bit inserting device 7 which inserts a preliminarily decided 1 bit code into the specific position of the M series code generated by this PN code generator 5. Then, when the code length is changed after changing the number N of steps of the shift resistor of the PN code generator 5, a spreading speed is changed at the 2N, so that everything can be executed only by dividing the output of one voltage control oscillator 20. Thus, the constitution of the demodulator can be simplified.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a spread spectrum modulation/demodulation device, and more particularly to a spread spectrum modulation/demodulation device using a direct sequence modulation method having a spreading rate switching function.

[Conventional technology]

FIG. 2 is a block diagram of an example of a conventional spread spectrum modulation/demodulation device of this type, and FIG. 2(a) shows the modulation device,
FIG. 2(b) shows the demodulator.

The modulation device shown in FIG. 2(a) includes a PN code generator 5a that generates an M-sequence code, a multiplier 4a that generates a spreading clock by multiplying the transmission clock 2, and a PN code generator 5.
an exclusive OR gate 3 that calculates the exclusive OR of the M-sequence code generated in a and the transmission data l; and a balanced mixer 8 that modulates the output of the local oscillator 9 with two-phase PSK using its output.
and a switch 6 for switching the number of stages of the M-sequence code.

0M, an M-sequence code is generally used as a spreading code.
If the number of stages of the shift register of the PN code generator 5a that generates the sequence code is N, the code length of the generated M sequence code is 2N-1 bits, and the multiplication number of the multiplier 4a is usually 2N.
-1 is selected. PN code generator 5a by switch 6
When switching the number of stages N of the shift register, the 5 multiplier 4
The configuration is such that the multiplier of a is also changed at the same time to switch the diffusion rate.

Next, the operation of the demodulator shown in Section 2 (b) will be explained. The received signal subjected to spread spectrum modulation is first branched into three parts by a distributor 10, and each is split into three parts by a mixer 11 to
13, the signal is subjected to despreading processing using the M sequence code from the PN code generator 22a. The output of the mixer 11 that has undergone the despreading process is applied to the PSK demodulator 2N, where it is demodulated and the received data 30 and the received clock 31 are output.

On the other hand, the output of the mixer 12.13 is the bandpass filter 1
The signal is inputted to a detector 16.17 via a detector 4.15, and its output is supplied to a difference detector 18. The output of the differentiator 18 passes through a low-pass filter 19 and k voltage-controlled oscillators 20a,
20b... is input. Here, the value of k is the number of switching stages of the M-sequence code, that is, the number of switching stages of the despreading rate.

The outputs of the voltage controlled oscillators 20a, 20b...
One of them is selected by the selector 32 and input to the PN code generator 22a. The output of the PN code generator 22a is distributed by the code distributor 23 into three phases. mixer 1
Based on the despreading signal 26 added to mixers 12 and 1B, the despreading signals 27 and 28 added to mixers 12 and 1B are:
They are distributed so that one side advances by 172 bits of the despreading clock and the other lags by 1/2 bit.

The output of the mixer 12.13 processed with the despreading signal shifted forward and backward by 1/2 bit in this way is detected by the detector 16.17 to obtain the correlation coefficient, and the D for despreading tracking that synchronizes the phase of the spreading M-sequence code and the despreading M-sequence code on the receiving side.
It forms an LL (DelayLock Loop) loop.

Note that the number of stages N of the shift register of the PN code generator 22a is
The switching of the selector 23 and the switching of the selector 23 for selecting the corresponding voltage controlled oscillator are performed by the switch 24.

Here, the voltage controlled oscillator is required to have high frequency stability. This is because if the stability is poor, the center frequency will drift, and the bandwidth of the DLL loop must be widened accordingly.However, widening the bandwidth of the DLL loop increases the noise in the loop, which increases the phase jitter. The S/N of the demodulated signal deteriorates, and the bit error rate after demodulation deteriorates.

In other words, the loop bandwidth of the DLL cannot be widened, so
A highly stable voltage controlled oscillator must be used; if a highly stable one is used, the range of frequency variation due to voltage control will be narrowed. Therefore, when the number of stages of the M-sequence code is made variable, the correlation between the clock frequencies of the M-series codes with different numbers of stages is not an integral multiple, so the voltage control as described above is performed by the number of switching stages as shown in Fig. 2(b). In conventional spread spectrum modulation/demodulation equipment, when the number of stages of the M-sequence code is switched, the frequency of the 17 bits for spreading is not an integral multiple of 2, so a number of voltage-controlled oscillators corresponding to the number of switching stages is required on the receiving side. Therefore, there is a drawback that the device becomes large-scale.

SUMMARY OF THE INVENTION An object of the present invention is to provide a variable spreading rate spread spectrum modulation/demodulation device which eliminates the above drawbacks and is simple in scale.

[Means to solve the problem]

The spread spectrum modulation device according to claim 1 of the present invention comprises:
In a direct-sequence modulation type spread spectrum modulation device that has a function of switching the code length of the M-sequence code generated by a PN code generator and switching the spreading rate, the clock of the transmission data is multiplied by 28 (N is a positive integer). a multiplier for generating a spread clock; and a multiplier for receiving the spread clock;
It is comprised of a PN code generator that generates a sequence code, and a bit inserter that inserts a predetermined 1-bit code into a specific position of the M sequence code generated by the PN code generator.

Further, the spread spectrum demodulation device according to claim 3 of the present invention is a spread spectrum demodulation device using a direct spread modulation method, which has a function of switching the code length of the M-sequence code generated by the PN code generator and switching the despreading rate. , the center frequency corresponds to the highest despreading rate.
one voltage controlled oscillator whose frequency is an integer multiple of the frequency, and a frequency divider that divides the output of this voltage controlled oscillator into 1,/2'' (m is O or a positive integer) to reproduce the despread clock. and P which receives the direct despread clock and generates the M-sequence code.
It is comprised of an N code generator and a bit inserter that inserts a predetermined 1-bit code into a specific position of the M sequence code generated by the PN code generator.

Furthermore, the inventions of claims 2 and 4 are each claimed as claim 1.
In the third aspect of the present invention, a read-only memory is used in place of the PN code generator and the bit inserter.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG.
) shows a modulator, and FIG. 1(b) shows a demodulator.

The modulation device of this embodiment shown in FIG. 1<a> is different from the conventional modulation device shown in FIG. ) The other configurations are the same except that the operation of the N code generator 5 is slightly different.

A multiplier 4 multiplies the transmission clock 2 by 2 degrees in accordance with the spreading speed set by the switch 6, and supplies the multiplier to the PN code generator 5 as a spreading clock.

The bit inserter 7 counts the number of clocks from the multiplier 4, and when the counted value reaches 2N-1, it stops the clock supply from the multiplier 4 to the PN code generator 5 by one clock, and “0” is added to the M-sequence code generated in the code generator 5.
” or 1 bit is inserted, and as a result, a spreading code with a code length of 2N bits is output.

Next, the demodulator will be explained. The difference between the demodulator of this embodiment shown in FIG. 1(b) and the conventional demodulator shown in FIG. 2(b) is that the circuit for regenerating the despreading clock is a 1flll voltage controlled oscillator 20 and a frequency divider. 21, the output frequency of the voltage controlled oscillator 20 is divided by the frequency divider 21 to ]/2m to generate a despreading clock, and the PN code generator 22 is equipped with a bit inserter 25. It is configured to insert 1 bit into the generated M-sequence code to obtain a 2° bit-long despreading code.

The output voltage of the low-pass filter 19 of the DLL loop is controlled by one voltage-controlled oscillator 20 whose center frequency corresponds to the highest usable diffusion rate, and whose output is divided into 1 by a frequency divider 21.
．． The despreading clock is obtained by dividing the frequency by /2m. Like the bit inserter 7 of the modulation device, the bit inserter 25 counts the number of clocks from the frequency divider 21, and when the count value is 2''
-1, the clock supply from the frequency divider 21 to the PN code generator 22 is stopped by one clock, and the generated M-sequence code is set to the same "0" or "1" as on the modulation device side.
Insert bit. As a result, the PN code generator 22 obtains a despreading code with a code length of 2N bits, which is the same as the spreading code generated by the modulation device.

As explained above, when bit inserters are provided on both the modulator side and the demodulator side, and the code length is changed by changing the number of shift register stages N of the PN code generator, the spreading rate is 2.
Since it is configured to vary by N, all can be corrected by frequency dividing the output of one voltage controlled oscillator, and the configuration of the demodulator can be simplified.

Note that switching the number of stages N of the shift register of the PN code generator 22 and the number of divisions (1/2") of the corresponding frequency divider 21
) is set by the switch 24. The value of 0m is m=Q when the diffusion speed is the highest (the value of N is maximum), and is incremented by 1 each time the number of shift register stages is decreased by one stage.

In the above description, the center frequency of the voltage controlled oscillator 2o is set to be the frequency corresponding to the maximum diffusion rate, but it may be an integral multiple of that frequency, and the value of <-m may be changed accordingly.

In the embodiment described above, the spreading code and the despreading code are generated by the PN code generator and the bit inserter, but in a communication system with a low spreading speed, the PN code generator and the bit inserter are used to generate the spreading code and the despreading code. Read-only memory (instead of
ROM), which further simplifies the device.

〔Effect of the invention〕

As explained in detail above, the spread spectrum modulation and demodulation device of the present invention is equipped with a bit inserter and generates a spreading code and a despreading code with a code length of 2N bits, thereby improving the spread spectrum demodulation device on the receiving side. This has the effect of simplifying things.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of an example of a conventional spread spectrum modulation/demodulation device. 1...Transmission data, 2...Transmission clock, 3...Exclusive OR gate, 4, 4a...
...-Multiplier, 5.5a, 22, 22a--PN code generator, 6.24...Switch, 7, 25-
...Bit inserter, 8, 11-13...
Mixer, 9-...Local oscillator, 10...
Divider, 14.15 - Double bandpass filter, 16.1
7...-Detector, 18...Differentiator, 19
...low-pass filter, 20.20a. 20b... Voltage controlled oscillator, 21-...
Frequency divider, 22...Selector, 23...Code distributor, 26-28...Despreading code, 2N
...PSKflL adjuster, 30... Reception data, 31... Reception clock.

Claims (1)

[Claims] 1. In a spread spectrum modulation device using a direct spread modulation method, which has a function of switching the code length of an M-sequence code generated by a PN code generator and switching the spreading rate, the clock of transmission data is set to 2^N. a multiplier that generates a spread clock by multiplying (N is a positive integer); a PN code generator that receives the spread clock and generates an M-sequence code;
1. A spread spectrum modulation device comprising: a bit inserter for inserting a predetermined 1-bit code into a specific position of an M-sequence code generated by a code generator. 2. The spread spectrum modulation device according to claim 1, wherein a read-only memory is used in place of the PN code generator and bit inserter. 3. In a spread spectrum demodulation device using a direct spread modulation method, which has a function of switching the code length of the M-sequence code generated by the PN code generator and switching the despreading rate,
One voltage-controlled oscillator whose center frequency is an integer multiple of the clock frequency corresponding to the highest despreading rate, and the output of this voltage-controlled oscillator is divided into 1/2^m (m is 0 or a positive integer). a frequency divider for regenerating a despread clock; a PN code generator for receiving the despread clock and generating an M-sequence code; and a frequency divider for regenerating a despread clock; A spread spectrum demodulator comprising: a bit inserter for inserting a bit code. 4. The spread spectrum demodulator according to claim 3, wherein a read-only memory is used in place of the PN code generator and bit inserter.