JPH0416025A - Double sign device of two phase coaded data and method - Google Patents

Abstract

PURPOSE: To prevent inaccurate data reading at improper timing by detecting the edge sections of pulses forming a bit stream and deciding the time interval between the edge sections, and then, decoding encoded data by decoding a bit sequence in the bit stream from the time interval. CONSTITUTION: When the key of a remote transmitter(RTTB) 7 and signals which execute prescribed control are generated as infrared signals composed of a bit stream, the signals are received by means of a remote reception module(RRM) 3 and filtered. Then the filtered signals are impressed upon the interruption port of a microcomputer 1 and the leading edge of the pulse of the bit stream is detected. In this case, the bi-phase code impressed upon the falling edge interruption port of the microcomputer 1 only exists at the time interval between edges in a prescribed state due to the characteristic property of the bi-phase code. When another time interval is detected, the interval indicates an error.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates generally to the decoding of digital codes, and more particularly to means for receiving and decoding biphasically encoded data.

BACKGROUND OF THE INVENTION Generally speaking, so-called bi-phase encoding technology is a kind of digital encoding means, which has recently been widely used as a data modulation method. There is also a Manchester code called the pi-phase L method as a modulation method equivalent to the bi-phase code.

Bi-phase codes are widely used in the digital communications area and are used as remote codes for European television or for household appliances.

In the well-known method of receiving and decoding the bi-phase code using a remote receiver, i.e. recognizing the received code using a microcomputer, the decoding method for recovering the original data is based on a periodic timing check. This is done by executing ``and checking for changes in the state of the edges of the biphase code.''

However, such decoding methods that detect the edge conditions of a biphase code at each time interval require accurate timing information to be able to detect the code.

Additionally, timing period difficulties add cost, making the device expensive, and inaccurate timing makes it susceptible to inaccurate readings of data.

Therefore, the less error margin a device has, the more expensive it tends to be.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a generally improved apparatus for decoding biphase code data.

According to one aspect of the invention, first means for receiving a bitstream of biphase coded data; and second means for detecting edges of pulses forming the bitstream received by the first means. , third means for determining a time interval between said edges, and fourth means for decoding a sequence of bits of a bitstream from said time interval determined by said third means. An apparatus is provided for receiving and decoding encoded data.

Preferably said second means are arranged to detect edges that are either all falling edges or all rising edges.

preferably arranged to receive and decode data having a period of bits of 2t, said third means having a period of bits of 2t;
Adapted to identify 3t and 4t time intervals.

Preferably said fourth means are arranged to decode said sequence of bits not only from said time interval but also from the logic value of the last detected bit.

Preferably, the device includes a register arranged to be incremented by the number of bits decoded by the fourth means and checks whether the count in the register is equal to the expected number of bits in the bitstream. including the means to do so.

Preferably, the device is arranged to receive and decode data encoded with a Vesta code.

Preferably, the device
Two leading bits are arranged to receive and decode data having a predetermined logic value.

The device includes a microcomputer for controlling the operation of the device; a remote receiver for remotely receiving coded data transmitted over a distance and transmitting this data to the microcomputer; at least one remote transmitter for remotely transmitting said coded data to a remote receiver in response to key information; and at least one peripheral device arranged to be controlled by a microcomputer in response to said coded data. .

The invention also extends to a television or video device comprising a device according to an aspect of the invention.

In another aspect, the invention provides biphase coding comprising the steps of detecting edges of pulses forming a bitstream, determining time intervals between the edges, and decoding a sequence of bits of the bitstream from the time intervals. Provides a method for decoding a bitstream of data.

Such means may further consist of one or more of the steps or features disclosed in this specification and/or claims and/or the accompanying drawings.

Embodiments In order to understand the present invention more clearly, embodiments according to the present invention will be described below with reference to the drawings.

Referring to FIG. 1, a boat fishing bi-phase code data structure is shown. According to this figure, each waveform A, B,
C, D and E are the logic “0” of the bi-phase coding logic.
” and each different stream of bits indicated by “1”.

Assuming that the bit period is T, waveforms A-E each have a coded logic transition change at time T/2 (T/2=t). For example, if the logic of a bit is "0", its coding logic changes from logic "high" to "low" at time t, and if the logic of a bit is "1", its coding logic changes from logic "high" to "low" at time t. The logic changes from "low" to "high" at t.

The illustrated scheme uses bit logic to detect the falling edges of a changing bi-phase coded bitstream and measure the time interval between the falling edges, as shown in waveforms A-E in Figure 1. Decode phase code.

Assuming that the pit period is period T for the waveform shown in FIG. 1, there are two t's (t=T/2) in one bit period. Therefore, for the biphase code, the waveform A shown in FIG.
There are no two consecutive bits that do not grow one configuration of -E.

In the scheme shown, the code is decoded by detecting successive edges of a given state and the time intervals between the edges of a given state, as shown in FIG. The time intervals 2t, 3t and 4t represent the only possible sequences of two or three bits in the biphase coded bitstream. The time interval 4t is only one possibility. , the sequence r010 J. The time interval 3t represents the sequence "01" or "10", and the time interval 2t represents the sequence "00" or "11".0 Referring to FIG. The remote receiving module (hereinafter referred to as RRM) 3 logicalizes the code data received as infrared rays, filters the waveform, and applies the output to the microcomputer 1.

a first remote transmitter (
(hereinafter referred to as RTTP) 5 generates a pulse position modulation (PPM) code. A second remote transmitter (hereinafter referred to as RTTB) 7 arranged to transmit to PPM 3 generates a bi-phase code in response to pressing the l or more keys. On the other hand, the tuner 92 display device 11 and servo 13 operate under the control of the microcomputer 10. Furthermore, the key matrix 15 is used to input key data into the microcomputer 1.

Before explaining an example of the operation of the above device, first, the Vesta code format used in a remote control device for European TV sets and VTRs will be explained with reference to FIG.

Vesta code is configured as a bi-phase code,
As shown in FIG. 3, the first bit is the start bit. Such a bit always has a logic value of "1" and is the code that leads to the input of the next incoming code data.

When the key of the RTTB 7 shown in FIG. 2 is pressed and a signal for executing a predetermined control is generated as an infrared signal consisting of a bit stream having the data structure shown in FIG. 3, this signal is received by the RRM 3 and is , which is then applied to the interrupt port of the microcomputer 1 and used to detect the falling edge of the pulse of the bit stream.

In this case, the VESTA code, ie the biphase code applied to the falling edge interrupt port of the microcomputer I, is only present during the time interval mentioned above in FIG. 1 due to the inherent characteristics of the biphase code. If another time interval is detected, this indicates an error case. Furthermore, in the Vesta code format as described above, the first bit is a start bit and always has the condition of logic "1".

The microcomputer 1 that applies the biphase code of FIG. 3 to the falling edge interrupt port first checks whether the input code is a valid besta code in step 4 of FIG.
Check with 1.

The microcomputer 1 checks for an abnormal condition using the start bit in FIG. Data register IBO that initializes SEQ to count 2 and stores data temporarily.
and starts the internal timer TrM.

At this point, the start point of internal timer TIM is
It starts operating when the signal AP of FIG. 3 is applied.

In step 45, as shown in FIG.
When detecting P, the microcomputer 1 checks the value of the timer. If the start bit of the Vesta code is always rN, then the value of the timer in step 45 is such that the first two bits of the bitstream are either '1' or '1', as shown in Figure 1B or Figure 1C, respectively. rIOJ
It has either the value 2 or 3t depending on whether it is .

In the example of FIG. 3, the first two bits of the Vesta code are "IO". Therefore, in step 45, it is found that the timer value is 3t, and the microcomputer 1 proceeds to step 47.

In step 47, the microcomputer l takes the bit value "10" into the internal data register IBO, clears the timer, and starts counting again.

Next, in step 48, the microcomputer 1
When the next falling edge signal, signal CP in the illustrated example, is detected, the value of the timer is checked again.

- For boat fishing, the timer may have one of the values 2t, 3t or 4t. This means that the last leading bit is “0”.
” (which is the last bit of the first two bits “10” of the Vesta code), Figures 1A and 1D, respectively.
1E, with an initial bit value of "0", the measurement time intervals between subsequent falling green signals are 2t and 3t, respectively.
Depending on whether t or 4t, the bit sequences roOJroll J and roloJ are possible, respectively.

In the example of FIG. 3, the second to fourth bits of the coat have the sequence ro10J, so the measured time interval between the falling edge signals BP and CP is 4t.

The microcomputer l then proceeds to step 53 where the pit sequence "lO" is added to the internal data register IBO.

At this point, the detected time interval of 4t shows the pit sequence of rol and OJ, but since the leading "0" has already been taken into register IBO as the final bit in step 47, this sequence is stored in register IBO in step 53. Note that it may be necessary to capture only the last two bits of .

Internal sequence register SEQ is data register IB
Maintains a count of the number of bits of Vesta code recorded in O. In both steps 47 and 61, data register I
BO is the first sequence of 2 bits, i.e. rlOJ
(Step 47) The statement records which of rllJ (Step 61), so in Step 43 the count is initialized to decimal 2. Then, after step 53, the sequence register SEQ is incremented by the number of additional bits read into the data register IBO, in this case two further bits. At this point, the count in sequence register SEQ is 4 decimal.

In step 57, microcomputer 1 checks whether the count in sequence register SEQ is equal to decimal 10. In this embodiment, the count is simply 4 in decimal at this stage, so the microcomputer 1
is the last bit recorded in data register IBO or r
Step 5 to test whether OJ or “1”
Proceed to step 8.

In this embodiment, the last recorded bit is "0", and therefore the microcomputer 1 returns to execute step 48 again, where the value of the timer is checked again at the time of pressure detection of the next falling green signal.

Continuing the example of FIG. 3, after another time interval of 4t, corresponding to another bit sequence of rol(N, the next falling green signal DP is detected. Therefore, the microcomputer 1 again steps Proceeding to step 53, the next two bits r IOJ are read into the data register IBO. Then, in step 55, the sequence register SEQ is incremented by two counts to give a total count of 6, and the timer is started again. Cleared and counting resumes.

In step 57, the count in sequence register SEQ is checked again to see if it is equal to decimal 10. The current count in the example of FIG. 3 is decimal 6, representing the 6 bits already recorded in data register IBO. Therefore, the microcomputer I returns to step 58 to check the value of the last recorded bit.

Once again, the last recorded bit has the value roj, so the microcomputer 1 returns again to step 48,
Here, the timer value at the next detected falling green signal BP is checked.

The time interval between the two falling green signals DP and EP is 2t, which corresponds to the pit sequence "00". The microcomputer I therefore proceeds from step 48 to step 49, where an additional single bit "0" is recorded in the data register IBO.

Step 55 is then executed to increment the sequence register by just one count to represent the total of 7 bits recorded. The timer is cleared and started again.

In step 57, the count in the sequence register SEQ is not yet equal to the decimal number lO. Or, Step 5
8 is repeated and the last recorded bit is again a "0", so step 48 is executed once again.

In the embodiment of FIG. 3, the next falling green signal FP occurs at a time interval 2t after the preceding signal EPO, which again corresponds to the pit sequence "00j. Therefore, steps 49, 55 .
57 and 58 are executed again, while the count in the sequence register SEQ is incremented to a total of 8, after which step 48 is executed once again.

In the embodiment of FIG. 3, the last falling green signal GP or the preceding signal FP corresponding to the last pit sequence r010J
occurs at a time interval 4t after . Thus, step 53
．． 55 and 57 are executed again.

At this time, the sequence register SEQ is incremented by another two bits to bring the total count to 10 decimal. Thus, at step 57, the test indicates a positive result so that microcomputer 1 proceeds to step 59.

In this particular example, the besta code shown has a total of 10 bits in its bitstream, so step 5
A positive result to 7 indicates that a complete bitstream has been received and the value of the bitstream, i.e. data r l0IO10
Indicates that 0OIOJ has been accumulated in data register IB0.

Thus, in step 59, sequence register SEQ is cleared and timer TIM is stopped.

The contents of data register IBO are microcomputer 1.
The microcomputer registers the data register I.
The bitstream read from the BO executes a function, for example by controlling the tuner 9, the display 11 and/or the servo 13t, in response to a corresponding command.

In the embodiment of FIG. 3, the second bit is "0" and each "last bit" recorded in data register IBO is always "0". However, bit streams of the type shown in Figure 3 may of course have different sequences of bits (and in the more general case different numbers of bits).

If the second bit in the lO bit pulse train is a logic "1", the time interval between the first two falling edges will be 2t, as shown in FIG. 1B. Therefore, the microcomputer 1 proceeds from step 45 to step 61, where the first two bits "11" are stored in the data register IBO. As in the example described above, the sequence register SE
The initial value of Q is already set to decimal 2 at this stage.

The timer is cleared and restarted in step 61, and then the value of the timer at the next falling green signal is checked again in step 62. In this case, since the last recorded bit is ``1'', the timer is activated depending on whether the bit sequence is ``11'' or rlOJ, as shown in FIGS. 1B and 1C, respectively. The only possible values for would be 2 or 3t.

If step 62 indicates a timer value of 21, step 6
3, data bit rlJ enters the data register, and steps 55 and 57 are performed as before.

In this alternative example, if the first bitstream of rill J was recorded, then in step 55 the count in sequence register SEQ is 3 decimals, so that after step 57 microcombiator 1
Proceed to step 8.

Continuing with this same example, the last recorded bit is a "1", which causes microcomputer 1 to
The process then proceeds to step 62 and is repeated.

This time, when the timer test at step 62 results in a value of 3t, this indicates the bit sequence of r_IOJ. Therefore, step 65 is executed to store a fourth bit '0' in data register IBO.

Steps 55, 57 and 58 are executed again, while the count in the sequence register SEQ is incremented to decimal 4. At this point, the last recorded bit is “
0'', the microcomputer 1 proceeds from step 58 to step 48.

By way of example, if the next measured time interval is 3t, as shown in FIG. The count is incremented to decimal 6.

Since the last recorded bit is again NJ, microcomputer 1 proceeds from step 58 to step 62.

The procedure is then repeated along the lines shown in the example above until the count in the sequence register SEQ again reaches decimal 10, at which point step 59 is executed;
The control function indicated by the detected pressure foot is executed under the control of the microcomputer 1.

The above device recognizes bi-phase coats by simple means and can be applied to all devices using pulse position modulation (PPM) and Vesta codes, so the benefits of using an improved value-added product, and hybrid remote control. The advantages of using a control device are obtained.

A particular advantage of the embodiments illustrated and/or described above is that they continue to operate reliably despite changes in the timing of the received waveform. for example,
The timing of the falling edge is approximately ±10% of the period T of 1 bit.
The device operates accurately in response to changes in

Although preferred embodiments of the invention have been particularly illustrated and described,
At the same time, those skilled in the art will appreciate that changes may be made without departing from the spirit and scope of the invention.

Although the illustrated Vesta code shows a 10-bit bit stream with a logical "1" start bit, alternative codes having different numbers of bits and different start bits may be decoded with similar apparatus and methods modified accordingly. Similarly, although logical values and devices are described and illustrated herein, complementary values and devices may alternatively be employed.

The rising edge of the pulse may be detected instead of or in addition to the falling edge.

Attention is drawn to all texts and documents filed contemporaneously with or prior to this specification and published with this specification, the contents of which are hereby incorporated by reference.

All features disclosed in this specification and the drawings and/or all steps of a disclosed method or process may be combined, except in combinations in which at least some of such features and/or steps are mutually exclusive. Can be combined.

Each feature disclosed in this specification and the drawings may be replaced by alternative features serving the same, equivalent or similar purpose, unless stated otherwise. Thus, unless stated otherwise, each feature disclosed is one example only of a generic series of equivalent or similar features.

The invention is not limited to the details of the previous embodiments. The invention may extend to new or novel combinations of the features disclosed in the present specification and drawings or to novel or novel combinations of the steps of such methods or processes disclosed.

[Brief explanation of the drawing]

Figure 1 is a general diagram of the biphase code data structure.
FIG. 2 is a block diagram of an embodiment of an apparatus embodying the present invention for decoding bi-phase coded data, and FIG. 3 is a block diagram of one embodiment of a bi-phase code data format used in the embodiment of FIG. FIG. 4 is a flowchart showing an example of the operation of the apparatus shown in FIG. 2. l... Microcomputer, 3... Remote communication module, 5.7... Remote transmitter, 9... Tuner, 1
1... Display device, 13... Servo, 15... Key matrix, AP, BP, CP, DP, EP, FP. GP... Falling green signal, IBO... Data register, SEQ... Sequence register, TIM... Timer.

Claims (10)

[Claims] (1) first means for receiving a bitstream of biphasically encoded data; second means for detecting edges of pulses forming the bitstream received by the first means; receiving and decoding biphasically encoded data, comprising third means for determining a time interval; and fourth means for decoding a sequence of bits of a bitstream from the time interval determined by the third means. device to do. 2. The apparatus of claim 1, wherein said second means is arranged to detect edges that are either all falling edges or all rising edges. (3) arranged to receive and decode data having a bit period of 2t, the third means adapted to identify time intervals of 2t, 3t and 4t to identify different sequences of bits of the bit stream; Claim 1
or the device described in 2. (4) The fourth means is arranged to decode the sequence of bits not only from the time interval but also from the logic value of the last detected bit. The device described. (5) a register arranged to be incremented by the number of bits decoded by the fourth means and checking whether the count of the register is equal to the expected number of bits in the bitstream; Apparatus according to any one of claims 1 to 4, comprising means. (6) A device according to any one of claims 1 to 5, arranged to receive and decode data decoded with a Vesta code. 7. The apparatus of claim 1, wherein at least one leading bit of the bitstream is arranged to receive and decode data having a predetermined logical value. (8) a microcomputer that controls the operation of the device;
a remote receiver that receives encoded data transmitted far away and transmits this data to a microcomputer; remotely transmits the encoded data to the remote receiver according to key information input by the user at the transmitter; 8. Device according to any one of the preceding claims, comprising: at least one remote transmitter for transmitting data; and at least one peripheral device arranged to be controlled by a microcomputer in response to the encoded data. (9) A television or video device comprising a device according to any one of claims 1 to 8. (10) bits of biphasically encoded data comprising the steps of detecting edges of pulses forming a bitstream, determining time intervals between the edges, and decoding a sequence of bits of the bitstream from the time intervals; How to decode the stream.