JPH04150563A - Image processor - Google Patents

Abstract

PURPOSE:To execute multilevel gradation processing without impairing the effect of anti-aliasing processing by prohibiting the multilevel gradation processing when a target picture element is an edged part picture element, and executing prescribed multilevel gradation processing when the target picture element is not the edge part picture element. CONSTITUTION:The page memory 206 of a PDL(Page Description Language) controller is used as an edge part information storage mans which stores edge part information representing whether or not the picture element of picture data is the edge part picture element. Also, a gradation processing part 408 which performs the multilevel gradation processing is provided. The gradation processing part 408 inputs the image data and the edge part information, and performs no multilevel gradation processing when the target picture element is the edge part picture element, and executes the prescribed multilevel gradation processing when it is not the edge part picture element. Thereby, it is possible to execute the multilevel gradation processing without impairing the effect of the anti-aliasing processing.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image processing device that converts density-modulated or brightness-modulated image data into multi-level gradation data by anti-aliasing processing.

[Conventional technology]

In the field of computer graphics, when displaying an image on a CRT, which is an output medium, a technique called anti-aliasing processing is used to make the displayed image more beautiful. This process is performed on the jagged parts (called aliases) on the stairs as shown in Figure 21(a).
Figure 21(b) visually displays the displayed image by applying brightness modulation to
It is used to smooth the surface as shown in the figure.

On the other hand, a publishing system using a personal computer,
With the spread of so-called DTP (desk top publishing), image forming systems that print vector images such as those used in computer graphics have come into wide use.

For example, Adobe's Post
There is a system using scripts. PostScript is a page description language (Page Descripti).
It belongs to a language genre called on Language (hereinafter referred to as PDL), and describes the contents of a single document, including the text (letter part), graphics, and their arrangement and format. It is a programming language for describing included forms, and such systems use vector fonts as character fonts. Therefore, even if characters are scaled, the print quality can be significantly improved compared to systems that use bitmap fonts (for example, conventional word processors, etc.). It has the advantage that it is possible to print a mixture of both.

However, the resolution of the multilevel laser printers used in these image forming systems is only 240 dp.
Many of them are in the range of i to 400 dpi, and similar to CRT displays of computer graphics, there is a problem in that aliasing occurs due to the low resolution. For this reason,
Even when printing using a multilevel laser printer, in order to improve the quality of the printed image, anti-aliasing processing is applied to the image data using a predetermined graphic processing device.
Furthermore, multi-level gradation processing (dither method, error diffusion method, etc.) is performed via an image processing device, and in combination with several stages of power modulation or pulse width modulation, the desired number of gradations is achieved. .

[Problem to be solved by the invention]

However, in conventional image processing devices, image data that has been subjected to anti-aliasing processing is unconditionally subjected to multi-value gradation processing and then output to a multi-value laser printer. There is a problem in that the edge pixels that have been removed are not printed accurately, in other words, the effect of anti-aliasing processing may be lost.

The left edge portion of the figure shown in FIG. 22(a) (the portion where the vector data forms the left end of the image portion) will be specifically explained below as an example.

When the approximate area ratio k of each pixel shown in Figure (a) is calculated by the 3*3 sub-vixel division method, as shown in Figure (b), pixel A is O1 pixel, pixel C is 1/9, and pixel C is 8/9. 9. Pixel density is 9/9.

Assuming that this figure is painted with the highest density, the image data in (b) in the image processing device is converted as shown in (c) in the image processing device. is input to the multi-value gradation processing section.

The multi-level gradation processing unit 260 is configured as shown in FIG. The value is compared with the dark value in the multilevel dither matrix determined by the value of the sub-scanning counter 262, and the LUT
The gradation processing is performed according to the contents of the (multi-valued gradation processing unit 260).

That is, as shown in FIG. 22(e), the referenced threshold value differs depending on the position (x, y) where the image data to be processed (pixel in this case) exists.

For example, if the figure in FIG. 22(a) is compared with the threshold value at the position a3 in FIG. 23
It becomes like a fence). Here, the density of the edge portion pixels (pixel B and pixel C) whose density has been modulated by anti-aliasing processing is accurately processed.

However, the figure in Figure 22(a) is Bayer type 3×3.
When compared with the threshold value at the position shown in FIG. 24(a) in the multilevel dither matrix, the result is shown in FIG. 24(c), and even though the density has been modulated by anti-aliasing processing, Step-like jaggedness occurs at the boundary between pixel B and pixel C.

The present invention has been made in view of the above, and it is an object of the present invention to be able to perform multi-value gradation processing without impairing the effects of anti-aliasing processing.

[Means to solve the problem]

In order to achieve the above object, the present invention inputs image data that has been subjected to anti-aliasing processing to smoothly express jagged edges (aliases) in the output image, performs multi-value gradation processing, and performs multi-value gradation processing. In an image processing device that outputs to an output device such as a printer, an edge section information storage means for storing edge section information indicating whether or not each pixel of image data is an edge section pixel; Data and edge information are input, and if the target pixel is an edge pixel, multi-value gradation processing is not performed; if the target pixel is not an edge pixel, predetermined multi-value gradation processing is performed. The present invention provides an image processing apparatus including a multi-value gradation processing means.

Further, in the above-described configuration, when the target pixel is an edge pixel, it is preferable that the multilevel gradation processing means converts the image data into a format compatible with the output device.

[Function] In the image processing device of the present invention, the multilevel gradation processing means:
Input image data and edge information, and if the target pixel is an edge pixel, do not perform multi-value gradation processing; if the target pixel is not an edge pixel, perform predetermined multi-value gradation processing. .

〔Example〕

Hereinafter, an image forming system to which the image processing apparatus of the present invention is applied is taken as an example, and the following describes: ■ Overview of multi-value gradation processing, ■ Block diagram of the image forming system, ■ Configuration and operation of PDL controller, ■ Images of the present invention. Configuration and operation of processing equipment, ■
The configuration and operation of a multivalued color laser printer will be explained in detail in the following order: 1. Multivalued drive of the driver.

■Overview of multi-value gradation processing The image processing device of the present invention has an edge information storage that stores edge information indicating whether or not each pixel of image data is an edge pixel. In multi-value gradation processing, inputting image data and edge part information, if the target pixel is an edge part pixel, multi-value gradation processing is not performed, and if the target pixel is not an edge part pixel , a predetermined multi-value gradation process is executed.

In this embodiment, in order to simplify the configuration, P as described later is used as an edge part information storage means for storing edge part information.
Although the page memory 206 of the DL controller 200 is used, it is no different from an image processing apparatus in which an edge portion information storage means is provided inside the image processing apparatus.

First, edge section information will be explained.

Edge part information is information indicating whether each pixel is a pixel forming an edge part of a figure, in other words, whether it is an edge part pixel. For example, as shown in FIG. In the case of a figure as shown in , the pixels through which the vector data passes correspond to the edge pixels of the figure.

Therefore, the edge part information is as shown in FIG. 1(b).
Data indicating that the pixel is an edge pixel (indicated by "1" in the figure) is stored at a position corresponding to the pixel through which the vector data passes. The details will be explained later, but the edge part information is on P.
Edge section information storage memory section 2 of DL controller 200
06b.

Next, the gradation processing unit 408 that performs multi-value gradation processing will be described with reference to FIG. 1(C). In this embodiment, the gradation processing section 40B is composed of an LUT, and receives image data (here, 6 bits) sent in synchronization with the line synchronization signal and pixel clock, the count value of the main scanning counter 408a, and the sub-scanning counter 408a. The page memory 20 is synchronized with the count value of the counter 408b, the line synchronization signal, and the pixel clock.
The edge portion information sent from 6 is input and output as 3-bit image density data.

Here, in the LUT (gradation processing section 408), the 4
Data calculated in advance based on the flowchart is stored. In other words, it is determined whether the pixel is density-modulated by anti-aliasing processing (whether it is an edge pixel or not), and if it is not an edge pixel, it is processed using normal gradation processing (5102). If it is a sub-pixel, normal gradation processing is not performed, and in the case of the m*m sub-pixel division method, a value obtained by rounding off (input pixel density) 7m2 is used as image density data (S103).
.

For example, no matter where the figure in FIG. 26(a) is located, pixel B and pixel C are as follows: Pixel B: 7/9=0.77L:, 1 pixel C: 5
Image density data is stored in the LUT so as to be processed as follows: 6/9=6.22ζ6.

Therefore, in FIG. 1(a), the gradation processing section 408
If the edge information is “1” (for edge pixels),
Using 6-bit image data as input pixel density, the corresponding 3-bit image density data is output from the LUT. on the other hand,
If the edge information is "0" (not an edge pixel), use 6-bit image data as the input pixel density, and
Based on the multivalued dither matrix determined by the count value of the main scanning counter 408a and the count value of the sub-scanning counter 408b, the corresponding 3-bit image density data is output from the LUT.

In this example, as shown in the flowchart of FIG. 1(b), in the case of pixels in the middle and dark areas, the value obtained by rounding off 7 m2 (input pixel density) is calculated without performing normal gradation processing. Although it is used as image density data, in the case of edge pixels, the same result can be obtained even if the count value of the main scanning counter 408a and the count value of the sub-scanning counter 408b are ignored and processing is always performed using a fixed threshold value. It is clear that the effect can be obtained.

■Block diagram of the image forming system The image forming system of this embodiment uses the Page Description Language output from DTP (Desk Top Publishing).
e: hereinafter referred to as PDL language)) and image information read by an image reading device. The configuration of the image forming system of this embodiment will be described below with reference to FIG.

The image forming system includes a host computer 100 that creates a document written in PDL language (Bost script language is used in this embodiment);
The PDL controller 200, which applies anti-aliasing processing to the PDL language sent in pages from an image reading device 300 that reads image information via the PDL controller 20;
0. Alternatively, an image processing device 400 (image processing device of the present invention) that inputs the image output from the image reading device 300 and performs multi-value gradation processing, etc., and an image processing device 4
A multi-value color laser printer 500 that prints the multi-value image data output by 00, a PDL controller 200, an image reading device 3001, an image processing device 400.
and a system control section 600 that controls the multivalued color laser printer 500.

■Configuration and operation of PDL controller FIG. 3 shows the configuration of the PDL controller 200, which includes a receiving device 201 that receives the PDL language sent from the host computer 100, and storage control and control of the PDL language received by the receiving device 201. A CPU 202 that executes anti-aliasing processing, an internal system bus 203, a RAM 204 that stores PDL language to be transferred from the receiving device 201 via the internal system bus 203, and a ROM 205 that stores anti-aliasing programs and the like.
and multivalued RC,B with anti-aliasing processing
a page memo IJ 206 that stores image data;
It is composed of a transmitting device 207 that transfers RGB image data stored in the page memory 206 to the image processing device 400, and an I10 device 208 that transmits and receives data to and from the system control unit 600.

Here, the CPU 202 receives the P received by the receiving device 201.
The DL language is stored in the RAM 204 via the internal system bus 203 according to the program stored in the ROM 205. After that, you will receive one page of PDL language,
Once stored in the RAM 204, the graphic elements in the RAM 204 are subjected to anti-aliasing processing based on a flowchart to be described later, and the multivalued RGB image data is stored in the brain memory section of the page memory 206.

Note that the page memory 206 has R, R, and R, as shown in FIG.
It consists of a G, B brain memory section 206a, and an edge section information storage memory section 206b that stores information as to whether each pixel is an edge section pixel or not.

The data in the page memory 206 is then transferred to the transmitter 2
07 to the image processing device 400.

Hereinafter, with reference to FIGS. 5(a) and (b), PDL: 7
The operation of the controller 200 will be explained.

FIG. 5(a) shows a flowchart of processing performed by the CPU 202. As described above, the PDL controller 200 performs anti-aliasing processing on the PDL language sent page by page from the host computer 100, and converts it into three-color images of red (R), green (G), and blue (B). expand.

In the PDL language, graphics and characters are all described using vector data, and as the name "page description language" indicates, image information is processed in units of pages. Furthermore, one page is made up of at least one path, with each path being made up of one or more elements (graphic elements and text elements).

First, when PDL language is input, it is determined whether the element is a curved vector, and if it is a curved vector, it is approximated to a straight line vector and registered as a straight line element (line) in the work area. This is performed for all graphic and character elements within one path, and linear elements are registered in the work area for each path (process 1).

Then, the linear elements of the work area registered in this path unit are sorted by the starting X coordinate of the straight line (Processing 2
).

Next, in process 3, while updating the X coordinate one by one,
Performs filling processing using scanning lines. For example, in Figure 5 (
When performing the path filling process shown in b), the elements of the side across which the scanning line yc to be processed and the real value of the X coordinate across the scanning line yc (XI
3 X4) and AET (＾active Edge Ta
ble: Register in the table (table for recording the X coordinate of the edge portion appearing on the scanning line). Here, the order of the elements registered in the work area is the order in which they were registered in process 1, so they are not necessarily registered in order of decreasing X coordinate across the scanning line yc. For example, in process 1, if a straight line element passing through scanning lines yc and x3 in FIG. 5 is processed first, then the X coordinate of the edge portion appearing on scanning line yc is X! is first registered with AET. Therefore, after registering AET, the elements of each side in AET are
Sort in ascending order of coordinates. Then, pair the first two elements of AET and fill in the space between them. Anti-aliasing processing is achieved by adjusting the density and brightness of pixels in the edge portion in accordance with the approximate area ratio in this filling processing. Then remove the processed edge from AET and update the scan line (update the X coordinate)
In other words, 1 until all edges in AET are processed.
The same process is repeated until all elements in one path are processed.

The above processing 1, processing 2. The work in process 3 is executed pass by pass and repeated until all passes for one page are completed.

Next, the anti-aliasing process executed during the scan line filling process of process 3 described above will be described in detail with reference to the flowchart in FIG. 5(C).

Here, for example, in process 1 of FIG. 5(a),
), this figure has the following elements.

(B) Five line vectors AB, BC, CD, DE, and EA (represented by real numbers) (El) Color and brightness values inside the figure This figure is created as shown in Figure 6(b) by the above-mentioned operation. , into seven straight line vectors (expressed as real numbers) extending in the main scanning direction. At this time, in this embodiment, the following information is added to the starting points and ending points of the seven straight line vectors. That is, (c) Starting point coordinate values (real number expression) of the vector elements ((a) above) that constitute the starting point and ending point of the straight line vector (d) Slope information of the vector elements that constitute the starting point and ending point of the straight line vector ( Reference) Characteristic information of the start point and end point of a straight line vector (right edge, left edge, end point of a figure, line of 1 dot or less, intersection of straight lines, etc.) When an edge pixel is detected in the scan line filling process, Anti-aliasing processing shown in the flowchart of FIG. 5(C) is executed.

First, in sub-vixel filling processing, a filling area for each sub-vixel is calculated using a 3*3 sub-pixel division method (S401). This process is repeated for all vectors that cross the scanning line (S402).

Next, in the density determination process, the approximate area ratio of each pixel is calculated in order from the first pixel of the target scanning line using a uniform averaging method (anti-aliasing processing method) filter (S403).

Next, each color of the shape (
The gradation values (densities) of the four colors BK, R, G, and B are calculated (S404).

Thereafter, in page memory drawing processing, the gradation values of each color are written to the brain memory section 206a of the page memory 206, and the edge section information is written to the edge section information storage memory section 206b (S405).

Furthermore, the processes from 5403 to 5405 described above are repeatedly executed for all pixels of one line (5406).

The CPU 202 repeats the above processing up to the last pixel of the scanning line (y coordinate), and at the same time updates the contents of (c) above with the information of (d) above. The approximate area ratio of the figure in FIG. 6(a) obtained by the anti-aliasing process in this way has a value as shown in FIG.

Here, for example, if the figure in FIG. 6(a) has a white background color (
The figure color is red (maximum brightness: 25) on top of (maximum brightness: 255)
5), from the approximate area ratio k (see Figure 7), the brightness values for each color of the figure are (red), (red), (
Green L Kb (blue) is obtained based on the following formula.

K, - □Xk + KR2X(1k)K* = K
c+Xk + Kcmx(1-k)Kb = K11
Xk 1KIZX (1-k) However, K□, KGl,
K□ is the color of the figure given in (b) above (
K RZ ,
K c, z , K * z indicate the brightness value of each previously painted color. In addition, K * z, K c 2
．． K-7 refers to data in each brain memory section corresponding to RGB in the page memory 206.

The brightness value obtained in this way! , 1K91, are stored as ROB image data in the corresponding brain memory section 206a of the page memory 206, as shown in FIGS. 8(a), 8(b), and 8(c).

Further, edge information is stored in the edge information storage memory section 206b, as shown in FIG. 8(d).

(2) Configuration of Image Processing Apparatus The configuration of the image processing apparatus f400 will be explained with reference to FIG.

The image processing device 400 is a CC in the image reading device 300.
The three-color image signals read by D7r, 7g, and 7b are converted into black (BK), yellow (Y), magenta (M), and cyan (C) recording signals necessary for recording. Also, the ROB image data given from the PDL controller 200 described above is similarly black (BK).
, yellow (Y), magenta (M) 1 and cyan (
C) into each recording signal. Here, the mode for inputting an image signal from the image reading device 300 is a copying machine mode,
The mode in which R(1,B image data is input from the PDL controller 200) is called a graphics mode.

The image processing device 400 includes CCDs 7r, 7g, and 7b.
The color gradation data obtained by A/D converting the output signal of
a shading correction circuit 401 that performs correction for sensitivity variations, etc. of internal terminal elements of 7r, 1g, and 7b;
a multiplexer 402 that selectively outputs either the color gradation data output from the shading correction circuit 401 or the color gradation data (RGB image data) output from the PDL controller 200 according to the above-described mode;
A γ correction circuit 40 receives the 8-bit data (color gradation data) output from the multiplexer 402, changes the gradation according to the characteristics of the photoreceptor, and outputs it as 6-bit data.
3, (R) and green (G) output from the γ correction circuit 403.
), 6-bit gradation data indicating the gradation of blue (B) and their respective complementary colors, cyan (C) and magenta (M).

A complementary color generation circuit 405 converts into yellow (Y) gradation data (6 bits), and a masking processing circuit 406 performs predetermined masking processing on each Y, M, and C gradation data output from the complementary color generation circuit 405. , a UCR processing/black generation circuit 407 that inputs Y, M, and C gradation data after masking processing and executes UCR processing and black generation processing;
Y and M output from the UCR processing/black generation circuit 407.

Each 6-bit gradation data of C1 and BK is converted into 3-bit gradation data Yl, M1 . Convert to C1 and BKI,
It is comprised of a gradation process 408 that outputs to the laser drive processing section 502 inside the multivalued color laser printer 500, and a synchronization control circuit 409 for synchronizing each circuit of the image processing apparatus 400.

Although details will be omitted, the γ correction circuit 403 has a configuration in which the gradation can be arbitrarily changed using an operation button on the console 700.

In addition, the gradation processing unit 408 is composed of an LUT as described above, and performs UCR processing in synchronization with the line synchronization signal and the pixel clock.
6-bit Y, M, C, and BK gradation data output from the processing/black generation circuit 407, the count value of the main scanning counter 408a, the count value of the sub-scanning counter 408b, and the line synchronization signal The edge section information storage memory section 206 of the page memory 206 is synchronized with the pixel clock.
The edge portion information sent from the edge part information sent from the data source b is inputted, converted into 3-bit gradation data Yl, Ml, CI, and BKI and output.

In this embodiment, the gradation processing unit 408 uses a Bayer type 3×3 multivalued dither matrix shown in FIG. Therefore, the number of gradations of the multilevel color laser printer 500 is 3 x 3 area gradation and 3 bit (
In other words, it is a product of multivalue levels of 8 stages), and becomes 3X3X8=72 (gray levels).

Next, the processing of the masking processing circuit 406 and the tJcR processing/black generation circuit 407 will be explained.

Generally, the arithmetic expression for masking processing of the masking processing circuit 406 is as follows: Y, , M, , C,: masking processing cylinder data Yo, Mo
, Co: Data after masking processing Also, the arithmetic expression of the UCR processing of the UCR processing/black generation circuit 407 is generally expressed as follows.

Therefore, in this embodiment, new coefficients are obtained from these equations using the product of both coefficients.

In this embodiment, a new coefficient (such as "at t") that performs this masking processing and UCR processing simultaneously is calculated and obtained in advance, and further, using the new coefficient, the masking processing circuit 4
06 scheduled input value Y i + M i.

Output value (Yll', etc.) corresponding to C5 (6 bits each): This is the calculation result of the UCR processing/black generation circuit 407 [)
is calculated and stored in a predetermined memory in advance.

Therefore, in this embodiment, the masking processing circuit 406 and U
The CR processing/black generation circuit 407 is composed of a set of ROMs, and the data at the address specified by the inputs Y, M, and C of the masking processing circuit 4060 is given as the output of the UCR processing/black generation circuit 407.

In addition, for boat fishing, the masking processing circuit 406 performs Y and M according to the characteristics of the spectral reflection wavelength of the toner for forming a recorded image.
, C signals, and the UCR processing/black generation circuit 407 performs correction for color balance in overlapping toners of each color. UCR processing/black generation circuit 4
07, black component data BK is generated by combining the input three color data of Y, M, and C, and the output Y,
The M and C color component data are corrected to values obtained by subtracting the black component data BK.

In the above configuration, the γ correction surface! 403 executes processing based on the γ correction conversion graph shown in FIG. 10, and complementary color generation circuit 405 executes processing based on the complementary color generation conversion graph shown in FIGS. 11(a), (b), and (C). Assume that the masking processing circuit 406 and the UCR processing/black generation circuit 407 execute processing based on the following equation, as shown in FIG. 7(a).

The RGB image data shown in (b) and (C) is T
Correction circuit 403. Complementary color generation circuit 405. Masking processing circuit 406. Then, through the UCR processing/black generation circuit 407, it is converted as shown in FIGS. 12(a), (b), (C), and (d).

Furthermore, when the gradation processing unit 408 uses the Bayer-type 3×3 multilevel dither matrix shown in FIG. 13, Y in FIGS. ,M
.

The data for C and BK are shown in Fig. 14(a) and l (
C) Converted to the data shown in (d).

■Configuration of multivalued color laser printer First, the 15th
The schematic configuration of the multilevel color laser printer 500 will be described with reference to the control diagram shown in the figure.

A photoreceptor development processing unit 501 uniformly charges the surface of a photoreceptor drum (described later), exposes the charged surface to a laser beam to form a latent image, develops the latent image with toner, and transfers it to recording paper. The details will be explained later, but the development and development of BK data is
A black developing/transfer section 501bk that performs transfer, a cyan developing/transfer section 501C that develops and transfers C data,
A magenta developing/transfer section 50 that develops/transfers M data.
1m, and a yellow developing/transfer section 501y that develops and transfers Y data.

The laser drive processing unit 502 includes the image processing device 4 described above.
The laser beam is output by inputting the 3-bit data of Y, M, C, and BK output from 00 (in this case, image density data). Input buffer memory 503)', 503
m, 503c, and a laser diode 504y that outputs laser beams corresponding to Y, M, C, and BK, respectively.
, 504m, 504c, and 504bk, and drivers 505y, 505m, and 505c that drive the laser diodes 504y, 504m, 504c, and 504bk, respectively.
505b.

The combination of the black developing/transfer section 501bk of the photoreceptor development processing section 501, the laser diode 504bk of the laser drive processing section 502, and the driver 505bk is called a black recording unit BKtJ (see FIG. 16). It is called. Similarly, the cyan developing/transfer section 501c,
Laser diode 504c, driver 505
c, and a combination of high sofa memory 503C, cyan recording unit CU (see Figure 16), magenta developing/transfer section 501m, laser diode 504m,
The combination of the driver 505m and the buffer memory 503m is a magenta recording unit MU (see FIG. 16), the yellow developing/transfer section 501)', the combination of the laser diode 504y, the driver 505y, and the buffer memory 503y is a yellow recording unit. 1-YU
(See Figure 16). Each of these recording units is
As shown in the figure, a black recording unit BKU,
Cyan recording unit CU, magenta recording unit M
U and yellow recording unit YU are arranged in this order.

Due to this arrangement of each recording unit, the laser diode 5 for black exposure starts exposure first.
04bk, and the laser diode 504y for yellow exposure starts exposure last. Therefore,
There is a time difference in the order of exposure start between each laser diode,
Data recorded during the time difference (output of the image processing device 400)
In order to hold the data, the laser drive processing unit 502 includes the three sets of buffer memories 503y, 503m, and 503c described above.
is provided.

Next, the configuration of the multivalued color laser printer 500 will be specifically explained with reference to FIG.

The multilevel color laser printer 500 includes a conveyor belt 506 that conveys recording paper, and recording units YU, MU, and YU arranged around the conveyor belt 506 as described above.
Paper feed cassette 50 containing CU, BKU, and recording paper
7a, 507b, and paper feed rollers 508a, 508 that feed the recording paper from paper feed cassettes 507a, 507b, respectively.
b, and a registration roller 509 that aligns the recording paper sent out from the paper feed cassettes 507a and 507b.
The recording units BKU, CU,
It is composed of a fixing roller 510 that sequentially transports MU and YU and fixes the transferred image on the recording paper, and a paper discharge roller 511 that discharges the recording paper to a predetermined discharge section (not shown). Here, each recording unit YU, MU, CU, BKU
are photosensitive drums 512)', 512m, 512c, 5
12bk and photoreceptor drums 512F and 512m, respectively.
.

Charger 513) that uniformly charges 512c and 512bk
', 513m, 513c, 513bk, and polygon mirrors 514y, 514m for guiding the laser beam to the photosensitive drums 512y, 512m, 512c, 512bk.
, 514c, 514bk and motor 515y, 515m
, 515c, 515bk, and photosensitive drums 512y, 5
Toner developing devices 516y, 516m, 516c, and 516bk that develop the electrostatic latent images formed on 12m, 512c, and 512bk using toners of corresponding colors, and a transfer charging device that transfers the developed toner images to recording paper. Vessel 51
7y, 517m, 517c, 517bk, and photosensitive drums 512y, 512m, 512c, 512bk after transfer.
A cleaning device 518 for removing toner remaining on the
It consists of y, 518m, 518c, and 518bk.

Note that 519y, 519m, 519c, and 519bk are photosensitive drums 512)', 512m, 512C, and
A CCD line sensor for reading a predetermined pattern provided on the 512bk is shown, and the details are omitted, but
As a result, the process status of the multivalued color laser printer 500 is detected.

In the above configuration, the operations of the yellow recording unit YU will be explained using exposure, development, and transfer as examples.

Figures 17(a) and (b) show yellow recording unit YU.
The configuration of the exposure system is shown. In the figure, a laser beam emitted from a laser diode 504y is reflected by a polygon mirror 514y, passes through an f-theta lens 520y, and then passes through a mirror 521y.

522y and is irradiated onto the photosensitive drum 512y through the dustproof glass 523y. At this time, since the polygon mirror 514y is rotated at a constant speed by the motor 515y, the laser beam moves in a direction along the axis of the photosensitive drum 512y (main scanning direction). Furthermore, in this embodiment, a photosensor 524y is provided to detect the base point for tracking the scanning position of the main scan, so that the laser beam at the non-exposed position is detected. The laser diode 504y outputs recording data (
Since the photoreceptor drum 504y is activated to emit light based on the 3-bit data from the image processing device 400, multivalue exposure corresponding to the recording data is performed on the surface of the photoreceptor drum 504y. The surface of the photosensitive drum 504y is uniformly charged in advance by the charger 513y as described above, and an electrostatic latent image corresponding to the original image is formed by the exposure. The electrostatic latent image is developed by a yellow developing device 516y to become a yellow toner image. This toner image is transferred from the cassette 507a (or 507b) to the paper feed roller 50, as shown in FIG.
8a (or 508b), and is transferred by registration rollers 509 onto a recording sheet conveyed by a conveyor belt 506 in synchronization with the toner image formation in the black recording unit BKU.

The other recording units BKU, CU, and MU have similar configurations and perform similar operations, but the black recording unit BKU is equipped with a black toner developing device 516bk and forms and transfers a black toner image, and the cyan recording unit C
U includes a cyan toner developing device 516c, which forms and transfers a cyan toner image, and a magenta recording unit M.
U includes a magenta toner developing device 516m, which forms and transfers a magenta toner image.

■The multi-value drive drivers 505y, 505m, 505c, and 505b are as follows:
Y sent from the image processing device 400.

Based on the 3-bit data of M, C, BK, the corresponding laser diodes 504)', 504m, 504c, 5
It performs control for multi-value driving of 04bk,
As the driving method, power modulation, pulse width modulation, etc. are generally used.

Hereinafter, the multivalue drive by power modulation applied in this embodiment will be explained in detail with reference to FIGS. 18(a), (b), (C), and (5). In addition, driver 505y, 505m5
05c, 505b, and laser diode 504y
, 504m, 504c, and 504bk have the same configuration, so here, the driver 505y and laser diode 504y will be explained as an example.

As shown in FIG. 18(a), the driver 505y turns the laser diode 504y on and off based on a predetermined LD drive clock.
n10ff circuit 550 and 3-bit image density data (
Here, the D/A converts Y data) into an analog signal.
From a converter 551 and a constant current circuit 552 that inputs an analog signal based on the image density value from the D/A converter 551 and supplies a current (LD drive current) Id for driving the laser diode 504y to the laser diode on10ff circuit 550. configured.

Here, the LD drive clock is defined as '1' to be on and '0' to be off, as shown in FIG. 18(b).
The laser diode on10ff circuit 550 turns off the laser diode 504y accordingly.

Furthermore, since the LD drive current Id and the laser beam power are in a proportional relationship, by generating the LD drive current 1d based on the image density data value, the laser beam power output corresponding to the image density data value can be obtained. become. For example, as shown in Figure 18 (°C), the image density data value is 4.
” (data N-1 in the same figure), the constant current circuit 5
52 supplies the corresponding LD drive current Id, and the laser beam power of the laser diode 504y becomes level 4. Also, the image density data value is ’°7” (
In the case of data N) in the figure, the corresponding LD drive current td is supplied by the constant current circuit 552, and the laser beam power of the laser diode 504y becomes level 7.

Next, referring to FIG. 18(C), laser diode on10ff circuit 550. A specific circuit configuration of the D/A converter 551 and the constant current circuit 552 is shown. The laser diode ON10[f circuit 550 includes TTL inverters 353 and 554, differential switching circuits 555 and 556 that perform onloff toggle operation, and VG
When I>VO20, the differential switching circuit 555 is on.
, differential switching circuit 556b<of f, VG
When I<VO20, the differential switching circuit 555 is off.
f.

Resistors Rz and R form a voltage dividing circuit that generates VO2 that satisfies the conditions for the differential switching circuit 556 to be turned on.
It consists of 3. Therefore, when the LD drive clock is 1'', the output of the inverter 554 generates VGI,
The above condition (VGl>VO2) is satisfied, the differential switching circuit 555 is on, and the differential switching circuit 556 is turned on.
turns off and turns on the laser diode 5o4y.

On the other hand, when the LD drive clock is at o'', there is no output from the inverter 554, so the above condition (VGI<V
C, 2) is satisfied, and the differential switching circuit 555 is
ff, the differential switching circuit 556 is onL, turning off the laser diode 504y.

The D/A converter 551 has a latch 5 that latches the input image density monitor while the LD drive clock is "1".
57, and the maximum output value ■. v02 generator 55 giving ,
8 and a 3-bit D/A converter 559 that outputs analog data Vd based on the image density data and the maximum output value v, . Note that the relationship between Vd, image density data, and maximum output value V rot is expressed by the following equation.

The constant current circuit 552 includes the laser diode 504 in the laser diode ON10ff circuit 550 as described above.
y current, and the transistor 560
, and resistors R, , R, and . The analog output Vd of D/A converter 551 is applied to the base of transistor 560 to determine the voltage applied to resistor R4.

In other words, the current flowing through the resistor R4 is the current flowing through the transistor 5.
60, the current 1d flowing through the laser diode 504y is controlled by Vd.

FIG. 18(b) shows the output of the latch 557 mentioned above.

5 is a timing chart showing the relationship between VGI, Vd, and Id. Here, Vd is v or so based on image density data (3 bit data: 8 gradation data from O to 7). t
X takes a value in 8 stages from O/7 to 7/7, and Id is based on this VdO value. ~I, indicating the level of 08 stages. The laser diode 5゜4y lights the first one on the photoreceptor drum 512y according to the eight levels of this Id (■. = level 0゜1, = level..., ■, level 7).
A latent image as shown in FIG. 9 is formed.

In the image forming system to which the anti-aliasing processing and the device of the present invention are applied, the toner image shown in FIG. 20 is finally created for the pentagon ABCDE shown in FIG. 6(a) by the above-described configuration and operation. Formed on recording paper. As is clear from the illustration, the jagged parts (aliases) on the stairs that appear in the diagonal lines of the figure are visually smoothed by the anti-aliasing process, and the effect of the anti-aliasing process is reliably reproduced without fading. There is.

Further, in this embodiment, multi-value driving using power modulation is applied, but it goes without saying that similar effects can be obtained by using multi-value driving using pulse width modulation.

〔Effect of the invention〕

As explained above, the image processing apparatus of the present invention inputs image data that has been subjected to anti-aliasing processing to smoothly express jagged edges (aliases) of an output image, and performs multi-value gradation processing. In an image processing device that outputs to an output device such as a multilevel printer, an edge information storage means stores edge information indicating whether or not each pixel of image data is an edge pixel. input the image data and edge information, and if the target pixel is an edge pixel, do not perform multivalue gradation processing,
If the target pixel is not an edge pixel, it is equipped with a multi-value gradation processing means that performs predetermined multi-value gradation processing, so that it can perform multi-value gradation processing without impairing the effect of anti-aliasing processing. can do.

[Brief explanation of drawings]

1(a) to 1(a) are explanatory diagrams showing an overview of multi-value gradation processing in the image processing apparatus of the present invention, FIG. 2 is an explanatory diagram showing the configuration of the image forming system of the present embodiment, and FIG. Figure 3 is PD
An explanatory diagram showing the configuration of the L controller, FIG. 4 is an explanatory diagram showing the edge section information storage memory section, and FIG. 5(a) is an explanatory diagram showing the PDL.
Flowchart showing the operation of the controller, Figure 5)
5(C) is an explanatory diagram showing path filling processing, FIG. 5(C) is a flowchart showing anti-aliasing processing, and FIG.
Figures (a) and (b) are explanatory diagrams showing linear vector division of a figure, Figure 7 is an explanatory diagram showing the approximate area ratio after anti-aliasing processing, and Figure 8 (a), (b), (
C) is R stored in the brain memory section of the page memory.
An explanatory diagram showing GB image data, FIG. 8(d) is an explanatory diagram showing edge part information stored in the edge part information storage memory section, FIG. 9 is an explanatory diagram showing the configuration of the image processing device, and FIG. 11A, 11B, and 11C are explanatory diagrams showing the conversion graph for T correction of the γ correction circuit, FIGS.
Figures (a), (b), (C), and (d) are shown in Figure 8 (a).
), (b), and (C) are explanatory diagrams showing the state in which the RGB image data shown in FIG. Explanatory diagram, Figure 14 (a), (b),
(c), (d) are Fig. 12 (a), (b) (C),
An explanatory diagram showing the state in which the Y, M, C, and BK data in (d) are converted by the gradation processing section, Fig. 15 is a control block diagram showing a multi-value color laser printer, and Fig. 16 is a multi-value color laser printer. An explanatory diagram showing the configuration of a color laser printer, FIGS. 17(a) and (b) are explanatory diagrams showing the configuration of the exposure system of the yellow recording unit, and FIGS. 18(a) and (b)
, (c), (d) are explanatory diagrams showing Hower modulation Nyor multi-value drive, Fig. 19 is an explanatory diagram showing the state of latent images depending on the level of power modulation, and Fig. 20 is shown in Fig. 6 (a). Explanatory diagram showing the final toner image of the pentagon ABCDH, 2nd
FIGS. 1A and 1G are explanatory diagrams showing anti-aliasing processing, and FIGS. 22 to 24 are explanatory diagrams showing problems in gradation processing of a conventional image processing apparatus. Explanation of symbols 100--Host computer 200--PDL controller 201--
--- Receiving device 202--- CPU203--
...-Internal system bus 204--RAM 205--ROM
206--Page memory 206a--Brain memory section 206b--Edge section information storage section (edge section information storage means) 207--...Transmission device 208--... -I/
O device 300 --- Image reading device 400 --- Image processing device 408 --- Gradation processing section (multi-valued gradation processing means) 50
0.--Multi-value color laser printer 600-.
−=−・・・System control unit

Claims (2)

[Claims] (1) Input image data that has been subjected to anti-aliasing processing to smoothly express jagged edges (aliases) in the output image, perform multi-value gradation processing, and output to an output device such as a multi-value printer. In an image processing device, an edge section information storage means for storing edge section information indicating whether or not each pixel of the image data is an edge section pixel; and the image data and the edge section pixel. When inputting information, if the target pixel is an edge pixel, multi-value gradation processing is not performed.
An image processing apparatus comprising: multi-value gradation processing means for performing predetermined multi-value gradation processing when a target pixel is not an edge pixel. (2) The image processing device according to claim 1, wherein the multilevel gradation processing means converts the image data into a format compatible with the output device when the target pixel is an edge pixel. .