JPH04140828A - Random number generating device - Google Patents

Abstract

PURPOSE:To generate the pseudo random number having reproducibility being suitable especially for the use for a computer game by generating the random number by adding combination data of a prescribed address signal and a prescribed data signal. CONSTITUTION:In the case of generating random number data, first of all, set random number data is outputted to a data bus from a CPU, and a data selector 3 selects the set random number data inputted through the data bus and outputs it to a latch 4. The latch 4 latches the set random number data, outputs it as first random number data through a buffer 5, and also, outputs it to an adder 2, as well. The adder 2 adds the random number data from the latch 4 and combination data of an address signal and a data signal latched by a latch 1, and outputs a result of addition to the data selector 3. The selector 3 selects the result of addition from the adder 2, and latches it a the next random number data to the latch 4. In such a way, the pseudo random number having reproducibility being especially for the use for a computer game can be generated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a random number generator, and particularly to a random number generator used in computer games.

[Prior Art] Computer games have traditionally been enjoyed by the general public as entertainment, but in recent years, both the software and hardware of computer games have become more sophisticated and complex in order to meet the demands of consumers.

In computer games, in order to increase the interest of the game, for example, the positions and frequency at which enemies appear may be randomly changed, and random numbers are generated internally and used for control. Conventionally, random numbers have been generated using internal registers of a CPU or by a program.

[Problem to be solved by the invention] When a computer game is constructed according to a certain story, it is preferable that the random numbers used are not completely pure random numbers in a mathematical sense, but pseudo-random numbers that have reproducibility. . However, the random numbers generated by conventional methods do not take into account that they are particularly suitable for computer games, so for example, the amount of change in the random numbers is too large.
Sometimes there were problems where enemies would appear too often during the game, and sometimes enemies would hardly appear during the game.

An object of the present invention is to provide a random number generator capable of generating reproducible pseudorandom numbers particularly suitable for use in computer games.

[Means for Solving the Problems] The above object is to generate combination data of a first latch that latches generated random number data, a predetermined address signal in an address bus, and a predetermined data signal in a data bus. , a second latch that latches in synchronization with a predetermined control signal in the control bus, and an addition that adds the random number data latched in the first latch and the combination data latched in the second latch. This is achieved by a random number generating device, which has a random number generator, and latches the addition result of the adder in the first latch as random number data.

[Operation] According to the present invention, since random numbers are generated by adding the combination data of a predetermined address signal and a predetermined data signal, the reproducibility is particularly suitable for use in computer games. It is possible to generate some pseudo-random numbers.

[Example] A random number generator according to an example of the present invention is shown in FIGS.
This will be explained using figures. FIG. 1 is a block diagram of the random number generator, and FIG. 2 is a time chart showing the operation of the random number generator.

The random number generator according to the present embodiment latches combination data, which is a combination of an address signal in an address bus of a CPU and a data signal in a data bus, in synchronization with a control signal, and outputs the latched combination data. Random numbers are generated by adding them.

The latch 1 is input with, for example, an address signal line of the lower two bits of the address signal ADR3 transmitted by the address bus, and a data signal line of, for example, the lower three bits of the data signal DATA transmitted by the data bus.

In latch 1, the 2 bits of the address signal ADR3 are the upper 2 bits, and the 3 bits of the data signal DATA are the lower 3 bits.
It is latched as 5-bit combination data.

The reason why the lower two bits of the address signal ADR8 are used as the upper two bits of the combination data is because the lower two bits of the address signal ADR3 fluctuate minutely, so the combination data fluctuates greatly.

The data strobe signal DS of the control bus is input to the latch 1, and the data strobe signal DS
The combination data is read in synchronization with the rising edge of .

The reason why the combined data is latched in synchronization with the rise of the data strobe signal DS is that, as shown in FIG. 2, both the address signal ADR3 and the data signal DATA are reliably output at the rise of the data strobe signal DS. This is because

Adder 2 adds 5-bit combination data latched by latch 1 and 16-bit random number data latched by latch 4, which will be described later.

The data selector 3 receives the addition result (16 bits) added by the adder 2 and the set random number data (16 bits) sent from the CPU (not shown) via the data bus.
Select one of these and output.

The latch 4 latches the data output from the data selector 3 as random number data. Latch 4 has latch 1
Similarly, a data strobe signal DS of the control bus is input, and random number data is latched in synchronization with the rise of the data strobe signal DS. The random number data latched in latch 4 is returned to adder 2, and
is added to the combined data.

The random number data latched in the latch 4 is output to the data bus via the buffer 5.

The operation of this embodiment will be explained.

When generating random number data, the CPU first outputs set random number data to the data bus, and the data selector 3 selects the set random number data input via the data bus and outputs it to the latch 4.

The latch 4 latches the set random number data and outputs it as the first random number data via the buffer 5.
Also output to.

The adder 2 adds the random number data from the latch 4 and the combination data of the address signal and data signal latched by the latch 1, and outputs the addition result to the data selector 3.

The data selector 3 selects the addition result from the adder 2 and latches it into the latch 4 as the next random number data.

Thereafter, by repeating the above-described operations, pseudo-random number data can be generated by sequentially adding random combination data of an address signal and a data signal to the initial setting random number data.

In this way, according to this embodiment, pseudo-random numbers are generated by adding random 5-bit combination data to the initial 16-bit setting data, so that the generated random numbers can be used by the computer without significantly changing. Suitable for use in games.

In addition, the initial value of the random number can be set, and since the combined data using the address signal and data signal is added, the same program can reproduce and generate the same pattern of pseudo-random numbers. can. Furthermore, if the program is interesting, it is possible to generate pseudo-random numbers of different patterns.

The present invention is not limited to the above embodiments, and various modifications are possible.

For example, in the above embodiment, the combined data is configured as the lower 2 bits of the address signal as the upper 2 bits and the lower 3 bits of the data signal as the lower 3 bits. The number of bits and the combination of bits that result in a positive result may be used.

Further, in the above embodiment, the combination data is latched at the rising edge of the data strobe signal, but it may be latched in synchronization with other control signals such as a memory request signal, a bus cycle signal, an IO request signal, etc.

[Effects of the Invention] As described above, 1. According to the present invention, pseudorandom numbers with reproducibility particularly suitable for use in computer games can be generated6.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a random number generator according to an embodiment of the present invention, and FIG. 2 is a time chart of a random number generator according to an embodiment of the present invention. In the figure, 1... Latch 2... Adder 3... Data select 4... Latch 5... Buffata Applicant SEGA Enterprises Co., Ltd. Agent Patent attorney Yoshi Kitano Personal special procedure amendment (Method) % formula % Display of the case 1990 Patent Application No. 264474 Name of the invention Random number generator corrector Relationship with the case Patent applicant SEGA Enterprises Co., Ltd.

Claims (1)

[Claims] 1. A first latch that latches generated random number data; and a first latch that latches the generated random number data; and a first latch that latches the generated random number data; a second latch that latches in synchronization with a predetermined control signal; and random number data latched in the first latch and the second latch.
an adder for adding combination data latched to a latch, and latching the addition result of the adder to the first latch as random number data. 2. The random number generator according to claim 1, further comprising a selector that selects the set random number data from the data bus and the addition result of the adder and outputs the selected random number data to the first latch, A random number generation device characterized in that an initial value of a random number to be generated is set by selecting random number data.