JPH04106530A - Liquid crystal display device - Google Patents

Liquid crystal display device

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Publication number
JPH04106530A
JPH04106530A JP2224739A JP22473990A JPH04106530A JP H04106530 A JPH04106530 A JP H04106530A JP 2224739 A JP2224739 A JP 2224739A JP 22473990 A JP22473990 A JP 22473990A JP H04106530 A JPH04106530 A JP H04106530A
Authority
JP
Japan
Prior art keywords
liquid crystal
common
electrodes
electrode
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2224739A
Other languages
Japanese (ja)
Other versions
JP3062552B2 (en
Inventor
Yojiro Matsueda
洋二郎 松枝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP22473990A priority Critical patent/JP3062552B2/en
Publication of JPH04106530A publication Critical patent/JPH04106530A/en
Application granted granted Critical
Publication of JP3062552B2 publication Critical patent/JP3062552B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

PURPOSE:To allow the correction of a defective point by an electrical inspection in the stage before sealing of a liquid crystal and to assure reliability by insulating common capacity electrodes by each scanning line or signal line. CONSTITUTION:A selection pulse signal is impressed from the scanning line Y to the gate of a TFT 11 to selectively conduct the TFT. A video signal is inputted to the source of the TFT 11 conducted from the signal line X and is applied to and held in a liquid crystal 12 for one picture element via a picture element electrode 14. A holding capacity 13 is provided in order to suppress the voltage drop of the electrode 14 by a parasitic capacity. One end thereof is connected to the picture element electrode 14 and the other end to common capacity electrodes C1, C2, C3.... The electrodes C1, C2, C3... are insulated from each other and are separately impressed with common potentials VC1, VC2, VC3,.... The common capacity electrodes C1, C2, C3... are insulated without being shorted to each other in such a manner and, therefore, if a disconnection or shorting arises in any thereof, this disconnection or shorting is easily detected by the electrical inspection.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明は、アクティブマトリクス型の液晶表示装置に関
する。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to an active matrix type liquid crystal display device.

(従来の技術) 従来のアクティブマトリクス型液晶表示装置として、「
ジャパン・デイスプレィ”89、p。
(Conventional technology) As a conventional active matrix liquid crystal display device,
Japan Display” 89, p.

418−421Jに掲載されたものがある。この装置の
画素部分における等価回路を第4図に示す。
There is one published in 418-421J. FIG. 4 shows an equivalent circuit in the pixel portion of this device.

信号線Xi、X2.・・・が列方向に、走査線YIY2
.・・・が行方向にそれぞれ複数本配線されている。各
信号線Xと走査線Yとの交点には、薄膜トランジスタ(
以下、TPTと称する)11かマトリクス状に配置され
ている。TFTllのゲートが走査線Yに、ソースが信
号線Xに接続され、ドレインは画素電極14に接続され
ている。また各々の対向電極15には、共通電位V。o
Mが印加されている。走査線Yから選択パルス信号がT
PTllのゲートに印加されて選択的に導通し、信号線
Xより導通したTFTIIのソースに映像信号が入力さ
れる。入力された映像信号は、画素電極14を介して一
画素分の液晶12に与えられて保持される。
Signal lines Xi, X2. ... is the scanning line YIY2 in the column direction.
.. A plurality of ... are wired in the row direction. At the intersection of each signal line X and scanning line Y, a thin film transistor (
(hereinafter referred to as TPT) 11 are arranged in a matrix. The gate of TFTll is connected to the scanning line Y, the source to the signal line X, and the drain to the pixel electrode 14. Further, a common potential V is applied to each counter electrode 15. o
M is applied. The selection pulse signal is T from the scanning line Y.
A video signal is applied to the gate of PTll to selectively make it conductive, and a video signal is input from the signal line X to the source of TFTII, which is made conductive. The input video signal is applied to the liquid crystal 12 for one pixel via the pixel electrode 14 and held there.

またソース・ドレイン間に寄生する容量によって、TF
TIIがオフする瞬間に画素電極14の電位が降下する
のを抑制するために、液晶12と並列に保持容jil1
3が設けられている。この保持容量13は各画素毎に設
けられており、一端は画素電極14に、他端は各走査線
Yl、Y2.Y3゜・・・毎に平行に設けられた共通容
量電極CI、2゜C3・・・に接続されている。
In addition, due to the parasitic capacitance between the source and drain, the TF
In order to suppress the potential of the pixel electrode 14 from dropping at the moment TII is turned off, a holding capacitor jil1 is installed in parallel with the liquid crystal 12.
3 is provided. This storage capacitor 13 is provided for each pixel, with one end connected to the pixel electrode 14 and the other end connected to each scanning line Yl, Y2, . Each Y3°... is connected to a common capacitor electrode CI, 2°C3... provided in parallel.

(発明が解決しようとする課題) しかし従来の装置では、各々の共通容量電極CI、C2
,C3,・・・同志は短絡された状態で、共通電位vc
oMが印加されていた。従って、この共通容量電極CI
、C2,C3,・・・間に、短絡あるいは断線が存在し
ていても、その不良箇所を電気的に検出することは不可
能であった。このためTPT基板と対向基板との間に液
晶を封入し、装置として動作させるまで検査できず、不
良箇所に修正を施すと液晶の配向を乱すなどのおそれが
あった。
(Problem to be Solved by the Invention) However, in the conventional device, each common capacitance electrode CI, C2
, C3, . . . are short-circuited and have a common potential vc
oM was being applied. Therefore, this common capacitance electrode CI
, C2, C3, . . . even if a short circuit or disconnection exists between them, it has been impossible to electrically detect the defective location. For this reason, inspection cannot be performed until the liquid crystal is sealed between the TPT substrate and the counter substrate and the device is operated, and there is a risk that the orientation of the liquid crystal may be disturbed if a defective portion is repaired.

本発明は上記事情に鑑みてなされたもので、共通容量電
極の断線等の不良を、電気的に容易に検出することが可
能で、信頼性及び歩留まりの向上に寄与し得る液晶表示
装置を提供することを目的とする。
The present invention has been made in view of the above circumstances, and provides a liquid crystal display device that can easily electrically detect defects such as disconnection of a common capacitor electrode, and that can contribute to improving reliability and yield. The purpose is to

〔発明の構成〕[Structure of the invention]

(課題を解決するための手段) 本発明の液晶表示装置は、第1の絶縁基板上に複数の走
査線と信号線とが配置され、走査線により走査され信号
線により信号を人力されるTPTが走査線と信号線との
交点にマトリクス状に配置され、この各々のTPTの出
力を人力される画素電極がマトリクス状に配置されてお
り、第1の絶縁基板に対向して設けられ対向電極が配置
された第2の絶縁基板表面との間に液晶が挟持された装
置であって、走査線又は信号線毎に共通容量電極が設け
られ、この共通容量電極と画素電極との間に各画素毎に
保持容量が配置されており、共通容量電極は相互に絶縁
された状態にあることを特徴としている。
(Means for Solving the Problems) The liquid crystal display device of the present invention has a TPT in which a plurality of scanning lines and signal lines are arranged on a first insulating substrate, the scanning lines are scanned, and the signal lines are manually inputting signals. are arranged in a matrix at the intersections of scanning lines and signal lines, pixel electrodes to which the output of each TPT is manually input are arranged in a matrix, and counter electrodes are provided facing the first insulating substrate. A device in which a liquid crystal is sandwiched between a second insulating substrate surface on which a pixel electrode is arranged, a common capacitance electrode is provided for each scanning line or signal line, and a common capacitance electrode is provided for each scanning line or signal line, and each A storage capacitor is arranged for each pixel, and the common capacitor electrodes are insulated from each other.

また第1の絶縁基板上に、走査線又は信号線を駆動する
ドライバ回路を有し、このドライバ回路は通常動作時に
は共通容量電極の全てに所定の電位を印加し、共通容量
電極の欠陥を検査する時には共通容量電極に別々に所定
の電位を印加するものであってもよい。
Further, on the first insulating substrate, there is a driver circuit that drives the scanning line or the signal line, and during normal operation, this driver circuit applies a predetermined potential to all of the common capacitor electrodes and inspects the common capacitor electrodes for defects. In this case, predetermined potentials may be separately applied to the common capacitor electrodes.

(作 用) 共通容量電極が短絡されている場合には、配線間の短絡
や断線を第1の基板のみの段階で電気的に検出すること
ができず、第1の基板と第2の基板との間に液晶を封入
し動作させる必要があるため、修正を施すと液晶の配向
を乱すなどの信頼性の低下を招くが、共通容量電極同志
が絶縁されているため、液晶を封入する前の段階で電気
的に検出し不良箇所を修正することが可能であり、信頼
性を確保することができる。
(Function) If the common capacitance electrodes are short-circuited, it is not possible to electrically detect short-circuits or disconnections between the wirings only on the first substrate, Since it is necessary to operate the liquid crystal by sealing it between the electrodes, any modification will disturb the alignment of the liquid crystal and reduce reliability.However, since the common capacitance electrodes are insulated from each other, It is possible to electrically detect and correct defective parts at this stage, ensuring reliability.

第1の絶縁基板上にドライバ回路を有する場合には、装
置として通常の動作を行わせる時は共通容量電極の全て
に所定の電位を印加して保持容量として機能させ、検査
する時には各共通容量電極に別々に所定の電位を印加す
ることで、迅速かつ容易に検査を行うことができる。
When the driver circuit is provided on the first insulating substrate, a predetermined potential is applied to all of the common capacitor electrodes to function as a holding capacitor during normal operation of the device, and each common capacitor is used for inspection. Testing can be performed quickly and easily by applying predetermined potentials to the electrodes separately.

(実施例) 以下、本発明の一実施例について図面を参照して説明す
る。先ず、第1の実施例による液晶表示装置の構成を第
1図に示す。第4図に示された従来の装置と比較し、共
通容量電極C1,C2゜C3,・・・同志が相互に絶縁
されており、別々に共通電位VCI、 VO2,VO2
,・・・が印加され得る状態にある。他の従来の装置と
同一の構成要素には、同一の番号を付して説明を省略す
る。
(Example) Hereinafter, an example of the present invention will be described with reference to the drawings. First, FIG. 1 shows the configuration of a liquid crystal display device according to a first embodiment. Compared to the conventional device shown in FIG. 4, the common capacitance electrodes C1, C2, C3, . . . are insulated from each other, and the common potentials VCI, VO2, VO2 are separately applied
, . . . can be applied. Components that are the same as those of other conventional devices are given the same numbers and descriptions thereof will be omitted.

このように、共通容量電極CI、C2,C3・・・同志
が短絡されずに絶縁されているため、いずれかに断線や
短絡が生じている場合には、電気的な検査で容易に検出
することができる。そしてこの検査は、TPT基板と対
向基板との間に液晶を封入する前に、TPT基板のみの
段階で行うことができるため、レーザトリミングで短絡
箇所を切断するなどの処置を施すことができる。これに
より、液晶の配向等の特性に悪影響を及ぼす虞れがなく
、信頼性の確保及び歩留まりの向上に寄与することがで
きる。
In this way, the common capacitance electrodes CI, C2, C3... are insulated without being short-circuited, so if any of them is disconnected or short-circuited, it can be easily detected by electrical inspection. be able to. Since this inspection can be performed on only the TPT substrate before sealing the liquid crystal between the TPT substrate and the counter substrate, it is possible to take measures such as cutting off short circuits with laser trimming. Thereby, there is no risk of adversely affecting properties such as alignment of the liquid crystal, and it is possible to contribute to ensuring reliability and improving yield.

次に、本発明の第2の実施例による液晶表示装置につい
て、その構成を示した第2図を用いて説明する。第1の
実施例では、走査線Yを駆動するYドライバと、信号線
Xを駆動するXドライバは、いずれも装置外部に設けら
れている。これに対し本実施例では、Xドライバ23と
Xドライバ21とを内蔵している点が異なっている。
Next, a liquid crystal display device according to a second embodiment of the present invention will be described with reference to FIG. 2 showing its configuration. In the first embodiment, the Y driver that drives the scanning line Y and the X driver that drives the signal line X are both provided outside the device. On the other hand, this embodiment is different in that an X driver 23 and an X driver 21 are built-in.

Xドライバ21は、クロックパルスCLXの周期に同期
してスタートパルスDXを1ビツトずつ右方向ヘシフト
していき、TPTから成るスイッチング要素SW1.S
W2.・・・を順次オンさせて、映像信号vIDを各画
素へ書き込んでいく。このXドライバ21の構成は、従
来の装置で一般に用いられているものと同様である。
The X driver 21 shifts the start pulse DX to the right one bit at a time in synchronization with the period of the clock pulse CLX, and switches the switching elements SW1. S
W2. . . are turned on one after another, and the video signal vID is written to each pixel. The configuration of this X driver 21 is similar to that commonly used in conventional devices.

Xドライバ23には、TPT基板の段階で検査するとき
と、液晶を封入し組み立てた後に装置として動作させる
ときとで、各共通電極C1,C2゜C3,・・・に印加
する電圧を変える必要があるため、新たな構成要素が付
加されている。このYドライバの入出力信号のタイミン
グチャートを第3図に示す。通常動作時における動作波
形は第3図(a)のようであり、検査を行うときの波形
は第3図(b)のようである。
In the X driver 23, it is necessary to change the voltage applied to each common electrode C1, C2, C3, etc. when inspecting the TPT substrate stage and when operating the device after filling the liquid crystal and assembling it. Because of this, new components have been added. A timing chart of input and output signals of this Y driver is shown in FIG. The operating waveform during normal operation is as shown in FIG. 3(a), and the waveform during inspection is as shown in FIG. 3(b).

通常動作時と検査時に共通し、シフトレジスタ24にス
タートパルスDYとシフトクロックCLYとが入力され
る。シフトクロックCLYの周期に同期してスタートパ
ルスDYが1ビツトずつ下方へ向かってシフトされ、走
査線Yl、Y2゜Y3.・・・に順次出力されていく。
A start pulse DY and a shift clock CLY are input to the shift register 24 in common during normal operation and inspection. The start pulse DY is shifted downward one bit at a time in synchronization with the cycle of the shift clock CLY, and the scanning lines Yl, Y2, Y3, . ... will be output sequentially.

この結果、走査線Yl、 Y2. Y3.・・・のレベ
ルは図に示されるように、時間Tの間、順次ハイレベル
になる。
As a result, scanning lines Yl, Y2 . Y3. As shown in the figure, the level of ... becomes high level sequentially during time T.

そして各走査線Y毎に、NAND回路NRとインバータ
INVとが検査用に新たに設けられている。NAND回
路NRの二人内端子のうち、一方にはテスト信号TYが
入力され、他方には各々の走査線Yl、Y2.Y3.・
・・が接続されて、シフトされたスタートパルスDYが
入力される。ここで、テスト信号TYは通常動作時には
ハイレベルにある。この場合には、スタートパルスDY
のレベルに拘らず、インバータINVからはハイレベル
の信号が出力される。これにより、共通容量電極C1,
C2,C3,・・・には一定レベルの共通電位VCI、
 VO2,VO2,・・・が印加されて、保持容量13
としての機能が発揮される。
For each scanning line Y, a NAND circuit NR and an inverter INV are newly provided for inspection. Of the two terminals of the NAND circuit NR, one inputs the test signal TY, and the other inputs the respective scanning lines Yl, Y2 . Y3.・
... are connected, and the shifted start pulse DY is input. Here, the test signal TY is at a high level during normal operation. In this case, the start pulse DY
Regardless of the level of , a high level signal is output from the inverter INV. As a result, the common capacitance electrode C1,
C2, C3, . . . have a common potential VCI at a constant level,
When VO2, VO2,... is applied, the holding capacity 13
functions as.

検査時には、テスト信号TYはロウレベルになる。イン
バータINVからは、シフトクロックCLYに同期した
信号が出力される。これにより、各共通容量電極C1,
C2,C3、・・・に短絡、あるいは断線があるか否が
かが検出される。このように、第2の実施例によれば、
検査用に新たに設けた簡易な構成により、殆どコストを
上昇させることなく検査を行うことができる。第1の実
施例のように、Yドライバを内蔵せずにプローバー等を
用いて検査する場合よりも、高速かつ確実に不良箇所を
突き止めることができる。
During inspection, the test signal TY becomes low level. The inverter INV outputs a signal synchronized with the shift clock CLY. As a result, each common capacitance electrode C1,
It is detected whether there is a short circuit or disconnection in C2, C3, . . . . Thus, according to the second embodiment,
With the simple configuration newly provided for inspection, inspection can be performed with almost no increase in cost. As in the first embodiment, the defective location can be located faster and more reliably than in the case of inspection using a prober or the like without a built-in Y driver.

上述した実施例はいずれも一例であり、本発明を限定す
るものではない。例えば、実施例では各走査線毎に平行
に共通容量電極が配置されているが、信号線毎に配置さ
れたものであっても同様な効果が得られる。
The embodiments described above are merely examples and do not limit the present invention. For example, in the embodiment, the common capacitor electrodes are arranged in parallel for each scanning line, but the same effect can be obtained even if the common capacitor electrodes are arranged for each signal line.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明の液晶表示装置によれば、各
々の共通容量電極同志が絶縁されているため、液晶を封
入する前の段階で電気的に検出し不良箇所を修正するこ
とが可能であり、液晶の配向を乱すなどのおそれが回避
され、高信頼性を確保することができる。
As explained above, according to the liquid crystal display device of the present invention, since each common capacitance electrode is insulated from each other, it is possible to electrically detect and correct defective parts before filling the liquid crystal. Therefore, the risk of disturbing the alignment of the liquid crystal can be avoided, and high reliability can be ensured.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の第1の実施例による液晶表示装置の構
成を示した等価回路図、第2図は本発明の第2の実施例
による液晶表示装置の構成を示した等価回路図、第3図
は同装置の駆動波形を示したタイミングチャート、第4
図は従来の液晶表示装置の構成を示した等価回路図であ
る。 11・・・TFT、12・・・液晶、13・・・保持容
量、14・・・画素電極、15・・・対向電極、21・
・・Xドライ/<、22.24・・・シフトレジスタ、
23・・・Yドライバ、Xi、X2.X3.・・・信号
線、Yl。 Y2.Y3.・・・走査線、C1,C2,CB・・・共
通容量電極、vCI” C2” CB・・・共通電位。 出願人代理人  佐  藤  −雄 第1図
FIG. 1 is an equivalent circuit diagram showing the structure of a liquid crystal display device according to a first embodiment of the present invention, FIG. 2 is an equivalent circuit diagram showing the structure of a liquid crystal display device according to a second embodiment of the present invention, Figure 3 is a timing chart showing the driving waveforms of the same device;
The figure is an equivalent circuit diagram showing the configuration of a conventional liquid crystal display device. DESCRIPTION OF SYMBOLS 11... TFT, 12... Liquid crystal, 13... Storage capacitor, 14... Pixel electrode, 15... Counter electrode, 21...
・・X dry/<, 22.24...shift register,
23...Y driver, Xi, X2. X3. ...Signal line, Yl. Y2. Y3. ...Scanning line, C1, C2, CB...Common capacitance electrode, vCI"C2" CB...Common potential. Applicant's agent Mr. Sato Figure 1

Claims (1)

【特許請求の範囲】 1、第1の絶縁基板上に複数の走査線と信号線とが配置
され、前記走査線により走査され前記信号線により信号
を入力される薄膜トランジスタが前記走査線と前記信号
線との交点にマトリクス状に配置され、この各々の薄膜
トランジスタの出力を入力される画素電極がマトリクス
状に配置されており、前記第1の絶縁基板に対向して設
けられ対向電極が配置された第2の絶縁基板表面との間
に液晶が挟持された液晶表示装置において、前記走査線
又は前記信号線毎に共通容量電極が設けられ、この共通
容量電極と前記画素電極との間に各画素毎に保持容量が
配置されており、前記共通容量電極は相互に絶縁された
状態にあることを特徴とする液晶表示装置。 2、前記第1の絶縁基板上に、前記走査線又は前記信号
線を駆動するドライバ回路を有し、このドライバ回路は
通常動作時には前記共通容量電極の全てに所定の電位を
印加し、前記共通容量電極の欠陥を検査する時には前記
共通容量電極に別々に所定の電位を印加するものである
ことを特徴とする請求項1記載の液晶表示装置。
[Claims] 1. A plurality of scanning lines and a plurality of signal lines are arranged on a first insulating substrate, and a thin film transistor scanned by the scanning line and inputting a signal by the signal line is connected to the scanning line and the signal line. Pixel electrodes are arranged in a matrix at intersections with the lines and receive the outputs of the respective thin film transistors, and pixel electrodes are arranged in a matrix, and a counter electrode is arranged to face the first insulating substrate. In a liquid crystal display device in which a liquid crystal is sandwiched between a second insulating substrate surface, a common capacitance electrode is provided for each of the scanning lines or the signal lines, and each pixel is provided between the common capacitance electrode and the pixel electrode. 1. A liquid crystal display device, wherein a storage capacitor is arranged for each common capacitor electrode, and the common capacitor electrodes are insulated from each other. 2. A driver circuit for driving the scanning line or the signal line is provided on the first insulating substrate, and this driver circuit applies a predetermined potential to all of the common capacitance electrodes during normal operation, and 2. The liquid crystal display device according to claim 1, wherein predetermined potentials are separately applied to the common capacitor electrodes when inspecting the capacitor electrodes for defects.
JP22473990A 1990-08-27 1990-08-27 Liquid crystal display device and inspection method thereof Expired - Fee Related JP3062552B2 (en)

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JP22473990A JP3062552B2 (en) 1990-08-27 1990-08-27 Liquid crystal display device and inspection method thereof

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Application Number Priority Date Filing Date Title
JP22473990A JP3062552B2 (en) 1990-08-27 1990-08-27 Liquid crystal display device and inspection method thereof

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JPH04106530A true JPH04106530A (en) 1992-04-08
JP3062552B2 JP3062552B2 (en) 2000-07-10

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US7180483B2 (en) 1997-02-17 2007-02-20 Seiko Epson Corporation Current-driven light-emitting display apparatus and method of producing the same
US7221339B2 (en) 1997-02-17 2007-05-22 Seiko Epson Corporation Display apparatus
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