JPH0397704U

JPH0397704U -

Info

Publication number: JPH0397704U
Application number: JP358090U
Authority: JP
Priority date: 1990-01-18
Filing date: 1990-01-18
Publication date: 1991-10-08

Description

[Brief explanation of the drawing]

第１図はこの考案の一実施例によるシーケンス
制御装置のブロツク図、第２図はシーケンス制御
装置の外観図、第３図はプログラムコンソールの
外観図、第４図はＲＯＭ４に記憶されたＰＲＯＭ
３０への転送のプログラムを示すフローチヤート
図、第５図は従来のシーケンス制御装置のブロツ
ク図である。１……シーケンス制御装置、６……ＲＡＭ、８
……ＣＰＵ、３０……ＰＲＯＭ、６０……デイツ
プスイツチ。 Fig. 1 is a block diagram of a sequence control device according to an embodiment of this invention, Fig. 2 is an external view of the sequence control device, Fig. 3 is an external view of the program console, and Fig. 4 is a PROM stored in ROM 4.
FIG. 5 is a flowchart showing a program for transfer to 30, and FIG. 5 is a block diagram of a conventional sequence control device. 1... Sequence control device, 6... RAM, 8
...CPU, 30...PROM, 60...Deep switch.

Claims

[Claims for Utility Model Registration] (1) A sequence control device comprising: a rewritable volatile storage means; a processing means for writing into the volatile storage means; a rewritable nonvolatile storage means; When the means receives an instruction to execute the program written in the volatile storage means, the means automatically writes the program stored in the volatile storage means into the nonvolatile storage means, and then executes the program. A sequence control device characterized by: (2) The sequence control device according to claim 1, further comprising write selection means, and the processing means selects whether or not to automatically write to the nonvolatile memory according to the output of the write selection means. and is characterized by the fact that it is carried out.