JPH0392941A - Area management system - Google Patents

Abstract

PURPOSE:To realize high-speed area management by dividing an area to be prepared in a system into areas in an arbitrary size, further dividing this area into areas in an arbitrary size, and managing whether the area is under use by one bit or not while interlocking each divided area among levels. CONSTITUTION:An area size 5104 is determined as a maximum size using a byte. Then, the first hierarchy is formed to be (n) surfaces (1-n), the second hierarchy is formed to be (m) surfaces (11-1m) in the first hierarchy and the third hierarchy is formed to be (l) surfaces (111-11l) in the second hierarchy. The constitution of a hierarchical bit map is formed to be three levels. Then, the number of bits in a level 1X(m) is defined as the number of bits in a level 2 and the number of bits in the level 2X(l) is defined as the number of bits in a level 3. To one area in the minimum size, it is managed whether the area is under the use by one bit or not, and to the (n) number of the continuous areas in the minimum size, it is managed whether the area is under the use by one bit or not as the management information of the high-order level. Then, the work area is secured and the position of the management information, which are changed at the time of release, is made clear. Thus, the efficient management of the work area can be realized.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a method for dynamically securing and securing a work area of a data processing device.
Regarding the work area management method of the system to be released.

[Conventional technology]

As a method of dynamically securing and releasing a work area in a data processing device, for example, as shown in Japanese Patent Application Laid-Open No. 1640110/1983, a cell is defined as the minimum unit of the work area, and
It has management information on whether or not the above cell is in an empty state, and when the above cell is alone in an empty state, it is 1, when the above cells are continuously in an empty state, it is a consecutive number, and when the above cell is in use, it is a continuous number. There is a method to manage it as O.

[Problem to be solved by the invention]

The conventional technology described above requires the number of cells x 1 (byte) as an area for managing unused areas, and when securing and releasing an area, it is necessary to simultaneously change the area of bytes for the maximum number of cells. Furthermore, since free space is managed in terms of 1 byte/entry, the maximum size of the manageable area is limited to 255 x the size of one cell (bytes). The purpose of the present invention is to manage the area using a hierarchical bitmap, so that the maximum size that changes when securing and releasing is 1 bit for the upper level, and 1 bit for the lower level. The number of bits corresponding to the number of entries,
The minimum is 1 bit, which enables high-speed area management.Also, by changing the number of entries and the number of layers managed in each layer, you can set the area that suits the system, up to 2 GB.
The goal is to be able to expand and manage up to (gigabytes).

[Means to solve the problem]

In order to achieve the above purpose, the minimum size of the area to be used is determined for the entire area used in the system, and for each area of the minimum size, l bits are used to determine whether or not the area is in use. For n consecutive areas of the above minimum size, one bit is used as upper level management information to manage whether the area is in use or not, creating a hierarchical structure, and changing when securing and releasing a work area. Clarify the location of management information.

The upper level bit position for the κth lower level area can be found by ↓l÷n↓+l.

When a lower-level bit (lower-sized area) is used, the corresponding upper-level bit (upper-sized area) is also in use, and when an upper-level bit is used, all corresponding lower-level bits are also used. It is in use.

[Effect]

In the bitmap management of the present invention, when an area at a certain level is used, all bits of the corresponding bitmaps at both the upper and lower levels are in use, and their use is prohibited for allocation at a different level. , When releasing an area, if all the bits of the level corresponding to the bits of the upper level are unused, only bit operations are required.
Since the upper level is made unused and all the corresponding entries for the lower level are also made unused, no invalid work area is generated.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

As shown in Figure ↓, the bitmap hierarchy can be set arbitrarily depending on the area used, but in this example, the area size of 5104 bytes is set as the maximum size and is managed in three layers. The first layer has n sides (1 to n). The second layer has m planes (11-lm) in the first layer.

The third layer is the Q surface (engineering 11 to llfl) in the 2N layer (area management section) 6 Therefore, the structure of the layered bitmap is set to 3 levels, and the number of bits at level 1 is Xm (nm bits). The number of bits of level 2 is set to the number of bits of level 2×Q (nmQ bits) as the number of bits of level 3 (bitmap management unit). That is, the lowest level area of the number of bits of level 1 (Xrr+Q) can be allocated in level 1. In addition, in this embodiment, level 3 is 1 to 64 bytes, and level 2 is 65 to 64 bytes.
624 bytes, level 3 can be used to allocate areas of 625 to 5.04 bytes.

Figure 2 shows how the work area is allocated once for level l (
1), twice for level 2 (2■, 23), level 3
This shows the state when the process is performed twice (221, 222). The order of allocation is level ■, level 2, level 3,
They are level 2 and level 3. In this embodiment, when the number of usable maximum size areas (level l) is defined as n, the number of usable areas at each level is: Level ■: n Level 2: mXn Level a: QXmXn (corresponding to the number of bits at each level).

Processing when there is actually a request to secure a work area (GETMAIN) will be explained with reference to FIG. First, find the level of the area closest to the requested size (301), and then find the level of the bitmap (302). Unused bits are searched in order from the leftmost end (303, 307, 311). A bit search can be performed, for example, by using the well-known instruction text tF+
This can be achieved with one instruction: T (TRANSLATE ANDTEST). After finding an unused bit, change the bit to in use (off) (304, 308, 312)
, passes the address of the area corresponding to this bit position to the request source (3 1 5).

Also, the bits at both the upper and lower levels of the corresponding area are also in use at the same time. For the upper level, the corresponding one bit is in use (309, 313, 314), and for the lower bits, all the corresponding bits are in use (305, 306, 310) @ For example, When the level 1 area is used, the number of bits in use is 1 bit corresponding to the area allocated at level 1. Further, the corresponding m bits at level 2 and mQ bits at level 3 are in use for the corresponding bit string. When level 2 is assigned, the ■ bit is used for the upper level 1, and the α bit is used for the lower level 3. If assigned to level 3, level 1,
It is assumed that 1 bit is in use for both level 2.

FIG. 4 explains the flow when requesting area release (FRP. song AIN). First, find the bit position of the level corresponding to the area for which the release request was made (401), and return the bit (4 0 2) of that level to an unused state (403,
406.4 to). At the same time, if there is a hierarchy below the level, the corresponding bits are set to m bits (40
4,407) Furthermore, the lower mQ bit (4 0 5)
to an unused state. Also, if there is a higher layer, check that all the bits at the level (m or consecutive sad bits) are unused (4 0
8,411. , 413), and make the corresponding upper bits into unused IIMs (409, 412, 414). This will prevent invalid areas from occurring.

The bit manipulation method is shown in Figure 5, when allocating,
First, search for the first on-pit from the bitmap (5 0 1) of the corresponding size in the bitmap management section based on the requested size, and by knowing its position, find the address of the area used in the area management section and turn the bit off. (5 0 2).

Next, for the higher level than the position of the relevant bit,
Find the position in the bitmap from the number of entries of the relevant level included in the upper level entry and turn it off (50
3).

Repeat this until you reach the top. Regarding the lower level, the bit position is determined from the number of lower level entries included in the level 1 entry, and the bit positions are turned off for the number of entries at once (503).

Next, when releasing, the bit map (504) and bit position of the corresponding level are obtained from the management section in the entry to be released, and the bit is turned off (505). Furthermore, when the bits at the relevant level are turned off continuously for the number of entries at the upper level, the corresponding bit at the upper level is turned off (5 0 6). At the lower level, the entries corresponding to one entry at the relevant level are turned off all at once, and the process is repeated up to the highest level and the lowest level (5 0 6). Also, when requesting to allocate the area size for four entries at the highest level,
For one byte with unused bits, the following 4-bit mask is checked (507). In hexadecimal (
There are 5 patterns: FO), (78), (3(;), (IE), and (oF). In this example, it matches .(78), so this pattern is set as off and the assignment is made (5 0
8).

〔Effect of the invention〕

In the present invention, even if a work area is repeatedly secured and released, it is managed only by bitmap operations, so the work area can be managed with little overhead. In addition, no invalid areas are generated, and efficient work area management can be realized. The management bitmap size of the work area is QΣ↑b/(8xpo4) bytes t=1. (b=TT4i) i=1 Here, b is the number of minimum size entries configuring the work area, kai is the number of minimum size entries corresponding to the hierarchy,
n is the number of layers 6 In the example of Figure 1, if n, m, and Q are 8, then 512 ÷ (8X1) + 512 ÷ (8X 8) + 512 ÷ (
8x8x8), which is 73 bytes.

[Brief explanation of drawings]

Figure 1 is an explanatory diagram showing the correspondence of bits between each level and the correspondence of areas of each level in the work area to bits in an example of the present invention. An explanatory diagram showing the state of the bitmap depending on the usage situation, Fig. 3 is an explanatory diagram showing the work area reservation process, Fig. 4 is an explanatory diagram showing the release process, and Fig. 5 is an explanatory diagram showing the bit manipulation method. It is. 1, 2... Entry number of level 1 area, 1
1, 12 -- Entry number of level 2 area, 111
, 112...Entry number of level 3 area. Line 1, 4 corners of the gate, 4 negative slopes of 1, 2, 2, 3, 3, 3, 4 mouths.

Claims (1)

[Claims] 1. When securing and releasing areas in a data processing system, the entire area prepared by the system is divided into areas of arbitrary size (level 1), and the divided areas are further divided into areas of arbitrary size. Divide into regions (level 2), and divide the division to an arbitrary level (level n),
1 for each area of all the divided levels.
An area management method characterized in that whether or not an area is in use is managed by interlocking between levels using bits.