JPH0380689A - Vtr incorporating satellite broadcast reception tuner - Google Patents

Vtr incorporating satellite broadcast reception tuner

Info

Publication number
JPH0380689A
JPH0380689A JP21659989A JP21659989A JPH0380689A JP H0380689 A JPH0380689 A JP H0380689A JP 21659989 A JP21659989 A JP 21659989A JP 21659989 A JP21659989 A JP 21659989A JP H0380689 A JPH0380689 A JP H0380689A
Authority
JP
Japan
Prior art keywords
vtr
power source
decoder
tuner
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21659989A
Other languages
Japanese (ja)
Inventor
Koji Hara
浩司 原
Masafumi Otsuka
大塚 雅文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu General Ltd
Original Assignee
Fujitsu General Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu General Ltd filed Critical Fujitsu General Ltd
Priority to JP21659989A priority Critical patent/JPH0380689A/en
Publication of JPH0380689A publication Critical patent/JPH0380689A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To eliminate the need for ON/OFF operations of a decoder side by providing a power source plug socket for a decoder which can turn on/off a power source supply on an enclosure. CONSTITUTION:A plug socket 15 for outputting a commercial power source from a power source circuit 13 is provided on the enclosure of a VTR so that ON/OFF of a power source supply to this plug socket 15 can be controlled by a control circuit 16 consisting of a microcomputer. That is, in a tuner 2, in addition to a regular processing part, a processing part 2 having a chargeable broadcast discriminating part is provided, and a chargeable broadcast discriminating signal is fetched therefrom and inputted to a control circuit 16, and at the time of a chargeable broadcast, a power source is outputted to the plug socket 15 from the power source circuit 13, and at the time of a regular broadcast, the power source is not outputted. In such a manner, it becomes unnecessary entirely that a decoder side executes ON/OFF operations of the power source.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、有料放送用デコーダの電源を連動して制御で
きるようにした衛星放送受信チューナ内蔵VTRに関す
る。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a VTR with a built-in satellite broadcast reception tuner that can control the power supply of a pay broadcast decoder in conjunction with the power supply.

〔従来の技術〕[Conventional technology]

第3図に従来の衛星放送受信チューナ内RvTRの構成
を示す、この装置は、衛星放送アンテナから第1中間周
波信号を端子1に入力して、映像再生および音声再生を
行う衛星放送受信チューナ2、そのチューナ2からのF
M検波出力を外部に出力するFM検波出力端子3、ビッ
トストリームを外部に出力するビットストリーム出力端
子4、地上波(VHF、UHF)のアンテナからの信号
をアンテナ端子5から入力して映像信号および音声信号
を再生して出力する地上波放送受信チューナ6、ライン
入力端子群7、そのライン入力端子群7、地上波チュー
ナ6および衛星受信チューナ2のいずれか1個からの出
力信号を一選択する手動の入力切換スイッチ8、その入
力切換スイッチ8により選択された映像信号を記録/再
生する映像記録再生回路9、入力切換スイッチ8により
選択された音声信号を記録/再生する音声記録再生回路
10、映像記録再生回路9からの再生映像信号を出力す
る映像出力端子11、音声記録再生回路10からの再生
音声信号を出力する音声出力端子12を具備する。13
は電源回路、14は電源プラグである。
FIG. 3 shows the configuration of a conventional satellite broadcast receiving tuner RvTR. This device is a satellite broadcast receiving tuner 2 that inputs a first intermediate frequency signal from a satellite broadcast antenna to a terminal 1 and performs video and audio reproduction. , the F from tuner 2
The FM detection output terminal 3 outputs the M detection output to the outside, the bit stream output terminal 4 outputs the bit stream to the outside, and the signal from the terrestrial (VHF, UHF) antenna is input to the antenna terminal 5 to output the video signal and Select one output signal from any one of the terrestrial broadcast reception tuner 6, the line input terminal group 7, the line input terminal group 7, the terrestrial tuner 6, and the satellite reception tuner 2, which reproduce and output audio signals. a manual input selector switch 8; a video recording/reproducing circuit 9 for recording/reproducing the video signal selected by the input selector switch 8; an audio recording/reproducing circuit 10 for recording/reproducing the audio signal selected by the input selector switch 8; A video output terminal 11 for outputting a reproduced video signal from the video recording/reproducing circuit 9 and an audio output terminal 12 for outputting a reproduced audio signal from the audio recording/reproducing circuit 10 are provided. 13
is a power supply circuit, and 14 is a power supply plug.

第4図は有料の衛星放送用のデコーダの構成の一例を示
す図である。このデコーダは、そのピットスリーム入力
端子31を衛星放送受信チューナ内蔵VTRのビートス
リーム出力端子3に、およびFM検波入力端子32を同
VTRのFM検波出力端子4に接続することにより、ビ
ットストリームから音声データ、スクランブル解読デー
タ等を判別して、映像デスクランブラ33において映像
信号のデスクランブルを行ない、また音声デスクランブ
ラ34において音声信号のデスクランブルを行って、映
像出力端子35には映像信号、音声出力端子36には音
声信号を出力する。この映像出力端子35および音声出
力端子36はVTRのライン入力端子群7内の対応する
端子に接続される。37は電源回路、38は電源プラグ
である。
FIG. 4 is a diagram showing an example of the configuration of a decoder for paid satellite broadcasting. This decoder can output audio from a bit stream by connecting its pit stream input terminal 31 to the beat stream output terminal 3 of a VTR with a built-in satellite broadcast reception tuner, and by connecting its FM detection input terminal 32 to the FM detection output terminal 4 of the same VTR. The video descrambler 33 descrambles the video signal, and the audio descrambler 34 descrambles the audio signal, and outputs the video signal and audio to the video output terminal 35. An audio signal is output to the terminal 36. The video output terminal 35 and audio output terminal 36 are connected to corresponding terminals in the line input terminal group 7 of the VTR. 37 is a power supply circuit, and 38 is a power supply plug.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

有料放送を受信する可能性のある場合には、デコーダは
常時衛星放送受信チューナを有するVTRに接続してお
く必要があるが、実際に有料放送を受信する際にのみ、
そのデコーダの電源をオンしている。つまり、デコーダ
は手動操作によってその電源をオン/オフしていた。
If there is a possibility of receiving paid broadcasting, the decoder must be connected to a VTR equipped with a satellite broadcast reception tuner at all times, but only when actually receiving paid broadcasting.
The decoder is powered on. In other words, the decoder was powered on and off by manual operation.

このため、VTRのみならずデコーダも電源オン/オフ
を操作する必要があり煩雑であった。
Therefore, it is necessary to turn on/off the power of not only the VTR but also the decoder, which is complicated.

本発明はこのような点に鑑みてなされたものであり、そ
の目的は、デコーダ側の一切の操作を不要ならしめた衛
星放送受信チューナ内蔵のVTRを提供することである
The present invention has been made in view of these points, and its object is to provide a VTR with a built-in satellite broadcast reception tuner that eliminates the need for any operations on the decoder side.

〔課題を解決するための手段〕[Means to solve the problem]

このために本発明は、デコーダへのビットストリーム出
力およびFM検波出力の出力端子並びに該デコーダから
の映像信号および音声信号を入力する入力端子を具備す
る衛星放送受信チューナ内蔵VTRにおいて、函体に電
源供給をオン/オフ可能なデコーダ用の電源コンセント
を設けて構成した。
To this end, the present invention provides a VTR with a built-in satellite broadcast reception tuner that is equipped with an output terminal for bit stream output and FM detection output to a decoder, and an input terminal for inputting video signals and audio signals from the decoder. It was configured with a power outlet for the decoder that can turn the supply on and off.

〔実施例〕〔Example〕

以下、本発明の実施例について説明する。第1図はその
一実施例を示す図である。第3図におけるものと同一の
ものには同一の符号を付した0本実施例では1.電源回
路13からの商用電源を出力するコンセント15をVT
Rの函体に設け、このコンセント15への電源供給のオ
ン/オフをマイクコンピュータからなる制御回路16に
より制御するようにした。すなわち、チューナ2内に通
常の処理の他に有料放送判別部を有する処理部2a設け
て、ここから有料放送判別信号を取り出して制御回路1
6に取り込み、有料放送時には電源回路13からコンセ
ント15に電源を出力し、通常放送時には電源を出力し
ないようにした。
Examples of the present invention will be described below. FIG. 1 is a diagram showing one embodiment thereof. Components that are the same as those in FIG. 3 are denoted by the same reference numerals. Connect the outlet 15 that outputs commercial power from the power supply circuit 13 to VT.
A control circuit 16 consisting of a microphone computer controls on/off of the power supply to the outlet 15. That is, in addition to normal processing, a processing section 2a having a pay broadcast discrimination section is provided in the tuner 2, and a pay broadcast discrimination signal is extracted from the processing section 2a and sent to the control circuit 1.
6, power is outputted from the power supply circuit 13 to the outlet 15 during paid broadcasting, and power is not outputted during normal broadcasting.

なお、当然ながら電源回路13はVTR側の電源スィッ
チ(図示せず)がオンして始めて動作するので、コンセ
ント15への電源も当然その電源スィッチのオン/オフ
によりオン/オフされる。
Note that, as a matter of course, the power supply circuit 13 starts operating only when a power switch (not shown) on the VTR side is turned on, and therefore, the power to the outlet 15 is naturally turned on/off by turning on/off the power switch.

第2図は別の実施例を示す図である。上記実施例では、
デコーダの出力をライン入力端子群7に加えているので
、有料放送時にはデコーダの電源をオンさせるのみなら
ず、入力切換スイッチ8をそのライン入力端子群7側に
切り換えてデコーダからの出力を取り込む必要があった
FIG. 2 is a diagram showing another embodiment. In the above example,
Since the output of the decoder is added to the line input terminal group 7, during pay broadcasting, it is necessary not only to turn on the power to the decoder, but also to switch the input selector switch 8 to the line input terminal group 7 side to receive the output from the decoder. was there.

そこで、この実施例では、チューナ2の出力映像信号ラ
イン、出力音声信号ラインにスイッチ17〜19の一方
の入力端子を接続すると共に、そのスイッチ17〜19
の他方の入力端子に新たに設けたデコーダ専用の外部入
力端子群20を接続している。この外部入力端子群20
の映像入力端子201はスイッチ17に、音声り入力端
子202はスイッチ18に、音声R入力端子203はス
イッチ19に接続する。そして、このスイッチ17〜1
9の切換制御を、制御回路16によって行うようにした
Therefore, in this embodiment, one input terminal of the switches 17 to 19 is connected to the output video signal line and the output audio signal line of the tuner 2, and the switches 17 to 19 are
A newly provided external input terminal group 20 dedicated to the decoder is connected to the other input terminal of the decoder. This external input terminal group 20
The video input terminal 201 is connected to the switch 17, the audio input terminal 202 is connected to the switch 18, and the audio R input terminal 203 is connected to the switch 19. And this switch 17-1
The switching control of 9 is performed by the control circuit 16.

この結果、デコーダのビットストリーム入力端子31を
VTRのビートストリーム出力端子4に接続すると共に
FM検波入力端子32をFM検波出力端子3に接続し、
更に映像出力端子35や音声出力端子36を外部入力端
子群20に接続しておけば、有料放送受信時には上記実
施例と同様に電源コンセント15に電源が供給されてデ
コーダが動作することに加えて、スイッチ17〜19が
外部入力端子群20からの人力を自動的に選択するので
、そのデコーダからの出力信号がその外部入力端子群2
0からVTR内に取り込まれることになる。このとき、
第1図におけるように手動でスイッチを切り換えること
が不要となるばかりか、他方のライン入力端子群7は使
用されないので他の機器からの出力信号を取り込むこと
ができ、よってデコーダと他の機器との接続替えを行う
必要もなくなる。
As a result, the bit stream input terminal 31 of the decoder is connected to the beat stream output terminal 4 of the VTR, and the FM detection input terminal 32 is connected to the FM detection output terminal 3.
Furthermore, if the video output terminal 35 and the audio output terminal 36 are connected to the external input terminal group 20, when receiving paid broadcasting, power is supplied to the power outlet 15 and the decoder operates as in the above embodiment. , the switches 17 to 19 automatically select the input from the external input terminal group 20, so that the output signal from the decoder is output from the external input terminal group 2.
It will be imported into the VTR from 0 onwards. At this time,
Not only does it become unnecessary to switch manually as shown in Fig. 1, but the other line input terminal group 7 is not used, so output signals from other devices can be taken in, and therefore the decoder and other devices can be connected. There is no need to change connections.

なお、第1図及び第2図において制御回路16を使用せ
ずに、手動によりコンセント15への電源供給を行ない
、またスイッチ17〜19を切り換えることもできる。
In addition, in FIGS. 1 and 2, it is also possible to manually supply power to the outlet 15 and switch the switches 17 to 19 without using the control circuit 16.

この場合でも、デコーダ側の電源をVTR側のみで行う
ことができる。
Even in this case, the decoder side can be powered only by the VTR side.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、デコーダ側は電
源のオン/オフ操作を行う必要が全くなくなる。また、
スクランブルがかかっている放送を受信したときのみデ
コーダの電源をオンさせてそのデコーダを動作させるこ
とができるので、タイマ予約による録画時に支障が生じ
ることを防止することができるという利点がある。
As explained above, according to the present invention, there is no need for the decoder side to perform power on/off operations at all. Also,
Since the power to the decoder can be turned on and operated only when scrambled broadcasting is received, there is an advantage that problems can be prevented during recording by timer reservation.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の衛星放送受信チューナ内蔵
のVTRの内部ブロック図、第2図は別の実施例の同ブ
ロック図、第3図は従来の同ブロック図、第4図はデコ
ーダの内部ブロック図である。
Fig. 1 is an internal block diagram of a VTR with a built-in satellite broadcast reception tuner according to one embodiment of the present invention, Fig. 2 is the same block diagram of another embodiment, Fig. 3 is the same block diagram of the conventional one, and Fig. 4 is the same block diagram. FIG. 2 is an internal block diagram of a decoder.

Claims (4)

【特許請求の範囲】[Claims] (1)、デコーダへのビットストリーム出力およびFM
検波出力の出力端子並びに該デコーダからの映像信号お
よび音声信号を入力する入力端子を具備する衛星放送受
信チューナ内蔵VTRにおいて、函体に電源供給をオン
/オフ可能なデコーダ用の電源コンセントを設けたこと
を特徴とする衛星放送受信チューナ内蔵VTR。
(1), Bitstream output to decoder and FM
In a VTR with a built-in satellite broadcast reception tuner, which is equipped with an output terminal for detection output and an input terminal for inputting video and audio signals from the decoder, a power outlet for the decoder is provided in the box to enable the power supply to be turned on and off. A VTR with a built-in satellite broadcast reception tuner.
(2)、上記チューナ内に有料放送判別部を設け、該有
料放送判別部から有料放送判別信号が出力することによ
り上記電源コンセントに電源を供給するようにしたこと
を特徴とする特許請求の範囲第1項記載の衛星放送受信
チューナ内蔵VTR。
(2) A pay broadcast discrimination unit is provided in the tuner, and power is supplied to the power outlet by outputting a pay broadcast discrimination signal from the pay broadcast discrimination unit. The VTR with a built-in satellite broadcast reception tuner as described in item 1.
(3)、上記チューナから出力する映像信号および音声
信号のラインに各々切換スイッチを設け、上記入力端子
に入力する信号と上記チューナから出力する信号とを上
記切換スイッチより選択するようにしたことを特徴とす
る特許請求の範囲第2項記載の衛星放送受信チューナ内
蔵VTR。
(3) A changeover switch is provided on each of the video signal and audio signal lines output from the tuner, and the changeover switch selects the signal input to the input terminal and the signal output from the tuner. A VTR with a built-in satellite broadcast reception tuner according to claim 2.
(4)、上記切換スイッチを上記有料放送識別信号が出
力することにより上記入力端子側に切り換えるようにし
たことを特徴とする特許請求の範囲第3項記載の衛星放
送受信チューナ内蔵VTR。
(4) The VTR with a built-in satellite broadcast reception tuner according to claim 3, wherein the changeover switch is switched to the input terminal side when the pay broadcast identification signal is output.
JP21659989A 1989-08-23 1989-08-23 Vtr incorporating satellite broadcast reception tuner Pending JPH0380689A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21659989A JPH0380689A (en) 1989-08-23 1989-08-23 Vtr incorporating satellite broadcast reception tuner

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21659989A JPH0380689A (en) 1989-08-23 1989-08-23 Vtr incorporating satellite broadcast reception tuner

Publications (1)

Publication Number Publication Date
JPH0380689A true JPH0380689A (en) 1991-04-05

Family

ID=16690949

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21659989A Pending JPH0380689A (en) 1989-08-23 1989-08-23 Vtr incorporating satellite broadcast reception tuner

Country Status (1)

Country Link
JP (1) JPH0380689A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0648416A (en) * 1992-07-22 1994-02-22 Nippon Steel Corp Method for conveying and binding coil
US5734920A (en) * 1993-06-28 1998-03-31 Nippondenso Co., Ltd. Input/output processing IC
US6643713B2 (en) 1995-10-09 2003-11-04 Hitachi, Ltd. Apparatus has a microprocessor including DSP and a CPU integrated with each other as a single bus master

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0648416A (en) * 1992-07-22 1994-02-22 Nippon Steel Corp Method for conveying and binding coil
US5734920A (en) * 1993-06-28 1998-03-31 Nippondenso Co., Ltd. Input/output processing IC
US6643713B2 (en) 1995-10-09 2003-11-04 Hitachi, Ltd. Apparatus has a microprocessor including DSP and a CPU integrated with each other as a single bus master
US6993597B2 (en) 1995-10-09 2006-01-31 Renesas Technology Corp. Terminal apparatus
US8090398B2 (en) 1995-10-09 2012-01-03 Renesas Electronics Corporation Terminal apparatus

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