JPH0364273A - Blanking circuit - Google Patents

Blanking circuit

Info

Publication number
JPH0364273A
JPH0364273A JP20063989A JP20063989A JPH0364273A JP H0364273 A JPH0364273 A JP H0364273A JP 20063989 A JP20063989 A JP 20063989A JP 20063989 A JP20063989 A JP 20063989A JP H0364273 A JPH0364273 A JP H0364273A
Authority
JP
Japan
Prior art keywords
circuit
blanking
signal
video signal
signal processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20063989A
Other languages
Japanese (ja)
Inventor
Sugao Hashimoto
橋本 菅雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP20063989A priority Critical patent/JPH0364273A/en
Publication of JPH0364273A publication Critical patent/JPH0364273A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To arbitrarily set a state that blanking exists or not by switching a switch circuit by applying a blanking signal to a synthesizing circuit through the switch circuit. CONSTITUTION:A video signal processing circuit 1, a synchronizing signal processing circuit 2, a synthesizing circuit 3, and a switch circuit 4 are provided in an integrated circuit. In this case, in an input state of a switch switching signal input terminal 7, it becomes possible to transfer a blanking signal to the synthesizing circuit 3, therefore, it becomes possible to set a state that blanking exists or not to a video signal output terminal 6. In such a way, the state that blanking exists or not can be set by a switching control of the switch circuit. Also, a video output signal can be measured easily, and also, the measuring time can be shortened.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明はテレビジョン受像機に用いられるブランキン
グ回1@に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] This invention relates to a blanking cycle 1@ used in a television receiver.

〔従来の技術〕[Conventional technology]

IN3図はテレビジョン受像機などに用いられる従来の
ブランキング回路のブロック図である。
Diagram IN3 is a block diagram of a conventional blanking circuit used in television receivers and the like.

図において、(1)はビデオ信号処理回路、〈2)は同
期信号処理回路、(3)は合成回路、(5)はビデオ信
号入力端子、(6)はビデオ信号出力端子である。
In the figure, (1) is a video signal processing circuit, (2) is a synchronization signal processing circuit, (3) is a synthesis circuit, (5) is a video signal input terminal, and (6) is a video signal output terminal.

次に動作について説明する。ビデオ信号入力端子(5)
には、@a図(&)に示すようなビデオ信号が入力され
る。ビデオ信号処理回路(1)では入力されたビデオ信
号の画質、コントラストおよび輝度などの制御が行なわ
れる。一方、同期信号処理回路(2)では同期信号分離
され、その同期信号を基準として第4図(b)に示すブ
ランキング信号を生成する。
Next, the operation will be explained. Video signal input terminal (5)
A video signal as shown in Figure @a (&) is input to the . The video signal processing circuit (1) controls the image quality, contrast, brightness, etc. of the input video signal. On the other hand, the synchronization signal processing circuit (2) separates the synchronization signal and generates the blanking signal shown in FIG. 4(b) using the synchronization signal as a reference.

合成回路(3)はビデオ信号処理回路(1)の出力であ
るビデオ信号と同期信号処理回路(2)の出力とを入力
とし、第4vA(e)に示すような合成した信号をビデ
オ信号出力端子(6)に出力する。これにより、テレビ
画像の帰線期間を画面に表示しないようにしている。
The synthesis circuit (3) inputs the video signal which is the output of the video signal processing circuit (1) and the output of the synchronization signal processing circuit (2), and outputs the synthesized signal as shown in No. 4vA(e) as a video signal. Output to terminal (6). This prevents the retrace period of the television image from being displayed on the screen.

〔発明が解決しようとすを課題〕[The problem that the invention attempts to solve]

従来のブランキング回路は以上のように構成されていた
一111最近、ブランキング機能を削餘した仕様の要求
が高まってきている。
Conventional blanking circuits have been constructed as described above.Recently, however, there has been an increasing demand for specifications with reduced blanking functions.

コレハ、セットの高@能化が進む中で、ビデオ信号処理
回路の出力信号にRGHのオンスクリ−ンディスプレイ
信号を重畳するシステムである。
This is a system that superimposes an RGH on-screen display signal on the output signal of a video signal processing circuit as sets become more sophisticated.

このRGB信号を重畳する際、ビデオ信号の基準レベル
である黒レベル(同期信号のバンクポーチにほぼ等しい
)情報を後段の回路に伝達する必要が生じ、ブランキン
グ回路能を持たない集積回路をシリーズ化する必要があ
った。
When superimposing this RGB signal, it becomes necessary to transmit the black level information (approximately equivalent to the bank pouch of the synchronization signal), which is the reference level of the video signal, to the subsequent circuit, so integrated circuits without blanking circuit functionality are required to be used in series. There was a need to change it.

この発明は上記のような従来のものの課題を解消するた
めになされたもので、単一の集積回路で処理するブラン
キング回路を得ることを目的こしている。
This invention was made to solve the problems of the conventional ones as described above, and aims to provide a blanking circuit that can be processed by a single integrated circuit.

〔課題を解決するための手段〕[Means to solve the problem]

この発明に係るブランキング回路は、同期信号処理回路
で生成したブランキング信号を、スイッチ回路を介して
合成回路に加えるようにしたものである。
The blanking circuit according to the present invention is configured to apply a blanking signal generated by a synchronous signal processing circuit to a synthesis circuit via a switch circuit.

〔作用〕[Effect]

この発明におけるブランキング回路は、ブランキング信
号をスイッチ回路を介して合成回路に加えるように構成
したので、スイッチ回路の切替えによりブランキングの
有無の状態を任意に設定することか可能となる。
The blanking circuit according to the present invention is configured to apply the blanking signal to the synthesis circuit via the switch circuit, so that it is possible to arbitrarily set the state of blanking or not by switching the switch circuit.

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する。 An embodiment of the present invention will be described below with reference to the drawings.

第1図において、(1)はビデオ信号処理回路、(2)
は同期信号処理回路、〈3)は合成回路、(4)はスイ
ッチ回路、(5〉はビデオ信号入力端子、(6)はビデ
オ信号出力端子、(7)はスイッチ切g!!信号入力端
子である。
In Figure 1, (1) is a video signal processing circuit, (2)
is a synchronous signal processing circuit, <3) is a synthesis circuit, (4) is a switch circuit, (5> is a video signal input terminal, (6) is a video signal output terminal, (7) is a switch off g!! signal input terminal It is.

なか、基本動作については前記従来のものと同一である
。しかし、スイッチ切替信号入力端子(7)の入力状態
で、ブランキング信号を合成回路(3)に伝達せしめる
ことが可能となるため、第2図に示すようにビデオ信号
出力端子(6)にブランキング有無の状態を設定するこ
とが可能となる。
Among them, the basic operation is the same as the conventional one. However, in the input state of the switch changeover signal input terminal (7), it is possible to transmit the blanking signal to the synthesis circuit (3), so the blanking signal can be transmitted to the video signal output terminal (6) as shown in Figure 2. It becomes possible to set the status of ranking presence/absence.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によれば、スイッチ回路の切替制
御によりブランキング有無の状態を任意に設定すること
ができるという効果がある。
As described above, according to the present invention, there is an effect that the blanking presence/absence state can be arbitrarily set by switching control of the switch circuit.

また、従来、黒レベル等の電位を測定する際、ブランキ
ング信号を停止させるなどの条件設定を種々実施する必
要があったが、この発明によれば、ビデオ出力信号の測
定が容易に行なえ、さらに測定時間が短縮できるという
他の効果もある。
In addition, conventionally, when measuring potentials such as black level, it was necessary to set various conditions such as stopping the blanking signal, but according to the present invention, video output signals can be easily measured. Another effect is that the measurement time can be shortened.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例を示すブランキング回路の
ブロック図、第2図は第1の出力信号波形図、83図は
従来のブランキング回路のブロック図、第4図は第3図
の出力信号波形図である。 図にかいて、(1)はビデオ信号処理回路、(2)は同
期信号処理回路、(3)は合成回路、(4)はスイッチ
回路である。 なお、図中、同一符号は同一、又は相当部分を示す。 第1図 第2図
Fig. 1 is a block diagram of a blanking circuit showing an embodiment of the present invention, Fig. 2 is a first output signal waveform diagram, Fig. 83 is a block diagram of a conventional blanking circuit, and Fig. 4 is a block diagram of a conventional blanking circuit. FIG. 3 is an output signal waveform diagram of FIG. In the figure, (1) is a video signal processing circuit, (2) is a synchronous signal processing circuit, (3) is a synthesis circuit, and (4) is a switch circuit. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 集積回路内にビデオ信号処理回路と、ブランキング信号
の生成機能を有する同期信号処理回路と、上記ブランキ
ング信号を入力とするスイッチ回路と、上記ビデオ信号
処理回路出力と上記スイッチ回路出力とを入力とする合
成回路とを備え、ブランキング信号の有無の状態を設定
できることを特徴とするブランキング回路。
A video signal processing circuit, a synchronous signal processing circuit having a function of generating a blanking signal, a switch circuit receiving the blanking signal as input, and an output of the video signal processing circuit and an output of the switch circuit are input in an integrated circuit. What is claimed is: 1. A blanking circuit, comprising: a synthesis circuit, wherein the blanking circuit is capable of setting the presence/absence of a blanking signal.
JP20063989A 1989-08-02 1989-08-02 Blanking circuit Pending JPH0364273A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20063989A JPH0364273A (en) 1989-08-02 1989-08-02 Blanking circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20063989A JPH0364273A (en) 1989-08-02 1989-08-02 Blanking circuit

Publications (1)

Publication Number Publication Date
JPH0364273A true JPH0364273A (en) 1991-03-19

Family

ID=16427738

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20063989A Pending JPH0364273A (en) 1989-08-02 1989-08-02 Blanking circuit

Country Status (1)

Country Link
JP (1) JPH0364273A (en)

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