JPH0343741A - Production of semiconductor device - Google Patents

Production of semiconductor device

Info

Publication number
JPH0343741A
JPH0343741A JP17962189A JP17962189A JPH0343741A JP H0343741 A JPH0343741 A JP H0343741A JP 17962189 A JP17962189 A JP 17962189A JP 17962189 A JP17962189 A JP 17962189A JP H0343741 A JPH0343741 A JP H0343741A
Authority
JP
Japan
Prior art keywords
resist
pattern
photoresist
forming
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17962189A
Other languages
Japanese (ja)
Inventor
Hirobumi Fukumoto
博文 福本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP17962189A priority Critical patent/JPH0343741A/en
Publication of JPH0343741A publication Critical patent/JPH0343741A/en
Pending legal-status Critical Current

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  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To decrease the dimensional shift quantity at the time of dry etching by forming a mask pattern by using a positive type photoresist on a semiconductor substrate, then irradiating the resist with far UV light in the vapor of a silylating agent, thereby silylating the resist surface. CONSTITUTION:The resist pattern is formed on the layer of polysilicone 5 laminated on the semiconductor substrate 2 by using the positive type photoresist 1. The resist is irradiated with the far UV light 4 in the vapor of hexamethylene silazane, after the formation of the resist pattern, to silylate the surface part of the resist, by which the silylated layer 3 is formed. After the resist surface is silylated the polysilicone is etched. The dimensional shift quantity at the time of the dry etching is decreased in this way.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、半導体装置の製造方法、詳しくは、LSI等
の製造技術であるホトレジストパターン形成方法に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for forming a photoresist pattern, which is a manufacturing technology for LSI and the like.

従来の技術 LSI製造におけるパターン形成工程では、ポジ型ホト
レジストを用いて、所望の回路パターンを形成するホト
リソグラフィー工程と、そのレジストパターンを半導体
基板に転写するドライエッチ工程とが重要である。レジ
ストパターンがサブミクロン領域になると、レジストパ
ターンの寸法とドライエッチ後のパターン寸法との差が
無視できなくなってくる。従来のパターン形成方法では
、この寸法差は、レジストの耐ドライエツチ特性により
決まる。このため、ポリシリコンあるいはタングステン
シリサイドのパターン形成時、寸法シフト量は、0.2
〜0.3μmど大きくなり、サブミクロンパターンの形
成が困難となってきた。
BACKGROUND OF THE INVENTION In a pattern forming process in conventional LSI manufacturing, important are a photolithography process for forming a desired circuit pattern using a positive photoresist, and a dry etching process for transferring the resist pattern onto a semiconductor substrate. When the resist pattern becomes a submicron region, the difference between the dimensions of the resist pattern and the dimensions of the pattern after dry etching becomes impossible to ignore. In conventional patterning methods, this dimensional difference is determined by the dry etch resistance properties of the resist. Therefore, when forming polysilicon or tungsten silicide patterns, the amount of dimensional shift is 0.2
As the size increases to about 0.3 μm, it has become difficult to form submicron patterns.

発明が解決しようとする課題 LSI製造プロセスは、シリコン基板上における薄膜の
形成およびそれらのエツチング工程から成る。パターン
形成は、ポジ型ホトレジストを用いて、所望のレジスト
パターンを形成、その後ドライエツチングにより半導体
基板上に回路バターンを形成するものである。従来のパ
ターン形成技術テは、パターン寸法がサブミクロン領域
になると、1/シストパタ一ン寸法とドライエッチ後の
寸法の差が無視できなくなる。
Problems to be Solved by the Invention The LSI manufacturing process consists of forming thin films on a silicon substrate and etching them. Pattern formation involves forming a desired resist pattern using a positive type photoresist, and then dry etching to form a circuit pattern on the semiconductor substrate. In conventional pattern forming techniques, when the pattern size reaches the submicron range, the difference between the 1/cyst pattern size and the size after dry etching cannot be ignored.

本発明は、上記の欠点を除去するもので、有効な微細パ
ターン形成方法を提供しようとするものである。
The present invention aims to eliminate the above-mentioned drawbacks and provide an effective method for forming fine patterns.

課題を解決するための手段 本発明は、半導体基板上に、ポジ型ホトレジストを用い
マスクパターンを形成した後、シリル化剤蒸気中、遠紫
外光を照射し、レジスト表面をシリル化させるものであ
る。
Means for Solving the Problems The present invention forms a mask pattern on a semiconductor substrate using a positive photoresist, and then irradiates it with deep ultraviolet light in a silylating agent vapor to silylate the resist surface. .

作用 本発明によると、パターン形成されたホトレジストの表
面がシリル化されて、同ホトレジストの耐ドライエツチ
性が向上する。
According to the present invention, the surface of the patterned photoresist is silylated, thereby improving the dry etch resistance of the photoresist.

実施例 本発明のパターン形成工程を第1図a −Cに工程順断
面図で示す。第1図aは、ポジ型ホトレジスト1を用い
て半導体基板2に、ポリシリコン5を400nmの厚み
に積んだ層の上にレジストパターン形成したものを示す
。レジストパターン形成後、ヘキサメチレンシラザン蒸
気中、遠紫外光4を照射して、第1図すのように、レジ
スト表面部分をシリル化して、シリル化層3を形成する
EXAMPLE The pattern forming process of the present invention is shown in step-by-step cross-sectional views in FIGS. 1A-C. FIG. 1a shows a resist pattern formed on a layer of polysilicon 5 of 400 nm thick on a semiconductor substrate 2 using a positive photoresist 1. As shown in FIG. After the resist pattern is formed, deep ultraviolet light 4 is irradiated in hexamethylene silazane vapor to silylate the resist surface portion to form a silylated layer 3 as shown in FIG.

そして、レジスト表面をシリル化した後、第1図Cのよ
うに、ポリシリコンエッチを行う。第2図に、レジスト
中の7ボラツク樹脂とシリル化剤(ヘキサメチレンシラ
ザンなど)のシリル化反応系を化学式によって示す。こ
の時のシリル化率は、Siの含有率で3〜10wt%程
度である・本発明の方法によると、レジスト寸法とドラ
イエッチ後のポリシリコンの寸法差は、0.05μm以
内とむり、従来の場合と比べ(寸法変換差0.2μm)
小さくなる。
After the resist surface is silylated, polysilicon is etched as shown in FIG. 1C. FIG. 2 shows a chemical formula of the silylation reaction system between the 7-borac resin and the silylation agent (hexamethylene silazane, etc.) in the resist. The silylation rate at this time is about 3 to 10 wt% in terms of Si content. According to the method of the present invention, the difference in resist dimension and polysilicon after dry etching is within 0.05 μm, compared to the conventional method. Compared to the case of (dimensional conversion difference 0.2 μm)
becomes smaller.

上記実施例では、レジストの耐ドライエツチ性が向上し
、レジスト寸法とドライエッチ後のポリシリコン寸法差
が小さくなり、サブミクロンパターンが形成しやすい。
In the above embodiment, the dry etch resistance of the resist is improved, and the difference between the resist dimension and the polysilicon dimension after dry etching is reduced, making it easier to form a submicron pattern.

発明の効果 本発明によれば、ドライエッチ時による寸法シフト量が
少なくなり、所望のパターンが形成される。
Effects of the Invention According to the present invention, the amount of dimensional shift due to dry etching is reduced, and a desired pattern is formed.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明のプロセスフローを示す工程順断面図、
第2図はポジ型ホトレジストのノボラック樹脂とシリル
化剤の反応系図である。 1・・・・・・ホトレジスト、2・・・・・・半導体基
板、3・・・・・・シリル化層、4・・・・・・遠紫外
光、5・・・・・・ポリシリコン。
FIG. 1 is a step-by-step sectional view showing the process flow of the present invention;
FIG. 2 is a reaction diagram of a novolak resin and a silylating agent in a positive photoresist. 1...Photoresist, 2...Semiconductor substrate, 3...Silylated layer, 4...Deep ultraviolet light, 5...Polysilicon .

Claims (2)

【特許請求の範囲】[Claims] (1)半導体基板上にノボラック系ホトレジストを塗布
し、前記ホトレジストに所望の回路パターンを形成する
工程と前記パターン形成後、シリル化剤蒸気中、遠紫外
光を照射して、前記ホトレジストの表面をシリル化する
ことを特徴とする半導体装置の製造方法。
(1) A step of coating a novolak photoresist on a semiconductor substrate and forming a desired circuit pattern on the photoresist. After forming the pattern, deep ultraviolet light is irradiated in silylation agent vapor to coat the surface of the photoresist. A method for manufacturing a semiconductor device characterized by silylation.
(2)シリル化剤が遠紫外光照射により、ホトレジスト
と縮重合反応をおこしてシロキサン結合することを特徴
とする請求項1記載の半導体装置の製造方法。
(2) The method for manufacturing a semiconductor device according to claim 1, wherein the silylation agent causes a polycondensation reaction with the photoresist to form a siloxane bond by irradiation with deep ultraviolet light.
JP17962189A 1989-07-11 1989-07-11 Production of semiconductor device Pending JPH0343741A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17962189A JPH0343741A (en) 1989-07-11 1989-07-11 Production of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17962189A JPH0343741A (en) 1989-07-11 1989-07-11 Production of semiconductor device

Publications (1)

Publication Number Publication Date
JPH0343741A true JPH0343741A (en) 1991-02-25

Family

ID=16068964

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17962189A Pending JPH0343741A (en) 1989-07-11 1989-07-11 Production of semiconductor device

Country Status (1)

Country Link
JP (1) JPH0343741A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020000351A (en) * 2000-06-23 2002-01-05 박종섭 A method for a fine pattern of a semiconductor device
WO2005010972A1 (en) * 2003-07-23 2005-02-03 Fsi International, Inc. Improvements in the use of silyating agents

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020000351A (en) * 2000-06-23 2002-01-05 박종섭 A method for a fine pattern of a semiconductor device
WO2005010972A1 (en) * 2003-07-23 2005-02-03 Fsi International, Inc. Improvements in the use of silyating agents

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