JPH0329355A - Semiconductor device - Google Patents

Abstract

PURPOSE:To realize a high integration and a high density by a method wherein, as a dielectric film for a capacitor, a titanium nitride film, a titanium oxide film and a silicon oxide film are laminated one after another on a lower-layer conductor film and an insulating-film laminated body composed of these three layers is used. CONSTITUTION:The following are provided: a silicon substrate 1; diffusion regions 2, 2 to be used as a source and a drain; a silicon oxide film 3; a gate interconnection 4 composed of polycrystalline silicon; a gate interconnection 5 in another MOS transistor; and a lower-layer conductive film 6 of a capacitor. In addition, the following are formed: a titanium nitride film 7; a titanium oxide film 8; a silicon oxide film 9; and an upper-layer conductor film 11 composed of polycrystalline silicon. A dielectric film 10 for capacitor use is formed of the titanium nitride film 7, the titanium oxide film 8 and the silicon oxide film 9. A capacitor composed of the lower-layer conductor film 6, the dielectric film 10 and the upper-layer conductor film 11 can be obtained. Thereby, a large capacitance can be obtained in a small area and by a comparatively thick film; the integration scale can be enhanced and a high density can be realized.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a semiconductor device having a capacitor formed by sequentially stacking a lower conductive film, a dielectric film, and an upper conductive film. (B) Conventional technology Conventionally, in semiconductor devices such as dynamic memories that have capacitors in their circuits, for example, in the case of planar memory cells, a silicon oxide film obtained by thermally oxidizing a silicon substrate has been used as the dielectric film. ．． However, since the capacitor capacity is expressed by the following formula, Cs = εi-S/tox (εl: dielectric constant, S: capacitor area, tox: dielectric film thickness). In order to secure the necessary capacitance for cells with the same structure, it is necessary to reduce the dielectric film thickness tox. However, from the viewpoint of dielectric strength, there is a limit to how thin the silicon thermal oxide film can be made to be. Therefore, by making the capacitor structure three-dimensional, such as a trench capacitor or a stacked capacitor, the area of the electrode is increased and the capacitor capacity is secured even in a small-area cell. However, if the electrode area is 6 to 7 μm2, the capacitance can be reduced to 3
The silicon oxide film needs to have a thickness of 7 to 8 nm to ensure 0 fF or more. Such ultra-thin films have many problems, such as insufficient dielectric strength and difficulty in controlling film thickness.

Therefore, in recent years, a combination of silicon oxide and silicon nitride films has begun to be used instead of silicon oxide films (Nikkei Microdevice, September 1988 issue, p. 65), and tantalum oxide films have also been used as high dielectric films. is proposed. (c) Problems to be Solved by the Invention However, in the combination of the silicon oxide film and silicon nitride film described above, the dielectric constant is 7, which is about twice the dielectric constant (3 to 4) of the silicon oxide film. Further?: 5
It has little effect on promoting integration and high density. On the other hand, although tantalum oxide film has a large dielectric constant of 20,
There are still many problems such as high leakage current. Therefore, the present invention provides a capacitor structure that solves these problems. (2) Means for Solving the Problems The present invention consists of sequentially stacking a titanium nitride film, a titanium oxide film, and a silicon oxide film on a lower conductor film as a dielectric film of a capacitor in a semiconductor device. It is characterized by using an insulating film volume consisting of. (E) Effect By using the dielectric film having the above-mentioned three-layer structure, the withstand voltage is increased and the leakage current is reduced. Further, since such a dielectric film includes a titanium oxide film having a very high dielectric constant of about 100, sufficient capacitance can be achieved.

(f) Example An example in which the present invention is applied to a stacked capacitor structure will be explained in the order of manufacturing steps with reference to the drawings. In Figure 1, (1) is a silicon substrate, (2) (2
+ indicates a diffusion region that becomes the source and drain, respectively, (3) indicates a silicon oxide film, and (4) indicates a diffusion region +2 1 (2
) is a gate wiring made of polycrystalline silicon that constitutes a MOS transistor, {5} is a similar gate wiring in another MOS transistor, and (6) is a lower conductor film of a capacitor made of polycrystalline silicon. Such elliptical precepts are the same as those of the past.

In Figure 2, (7) is a titanium nitride film (TiN), (8)
is titanium oxide WA (T i O 2). The former JI5! (7) is formed by sputtering using a Ti target in a mixture of argon gas and nitrogen gas, and has a film thickness of approximately 500 nm. The latter membrane (
8) was obtained by using oxygen gas instead of nitrogen gas under the above sputtering conditions, and the film thickness was about 50 glm. In Figure 3, titanium nitride II51 (7
) and unnecessary parts of the titanium oxide film {8} are removed. In Fig. 4, (9) is a silicon oxide film (SiO2), and this film is made of dichlorosilane gas, nitrous oxide gas &
Obtained by reacting under reduced pressure, the film thickness is 20
It is am. In FIG. 5, in the same manner as in FIG. 3, silicon oxidation 119! (Unnecessary portions of 91 are removed. In this step, a capacitor dielectric fi (10) consisting of titanium nitride JI5I (71, titanium oxide film (8}, and silicon oxide Jl!!! (9)) was formed. In Fig. 6, (1l) is the upper layer conductor film made of polycrystalline silicon, which itself is the same as the conventional one.As described above, the lower layer conductor (6), the dielectric film A capacitor consisting of (10) and an upper layer conductor (Ill) is obtained, and then, if necessary, multilayer wiring is provided on the capacitor via an insulating film. The capacitor formed in the above example is , 8μm2
A capacitor capacity of 120 fF can be secured even under a power supply voltage of 3.3 cm in a small area of 3.3 cm, and the leakage current is also a good value of 3.5 x 10- under an electric field of 5 M'//cm.
'^/cm'' was obtained. In the above embodiment, by using a silicide such as TiSi2 or WSi2 as the lower conductor 115H6), it is possible to reduce the electrical resistance and further improve the adhesion strength.

(g) Effects of the Invention According to the capacitor structure of the semiconductor device of the present invention, a large capacitor capacity can be obtained with a small area and a relatively thick film.
Various film thickness controls can be tailored. 4.

[Brief explanation of drawings]

FIGS. 1 to 6 are sectional views showing different manufacturing steps for explaining embodiments of the present invention.

Claims (1)

[Claims] (1) In a semiconductor device having a capacitor formed by sequentially stacking a lower conductor film, a dielectric film, and an upper conductor film, the dielectric film is formed by depositing a titanium nitride film, a titanium oxide film, and a titanium oxide film on the lower conductor film. A semiconductor device comprising a film and a silicon oxide film sequentially laminated.