JPH0327144U - - Google Patents
Info
- Publication number
- JPH0327144U JPH0327144U JP8831289U JP8831289U JPH0327144U JP H0327144 U JPH0327144 U JP H0327144U JP 8831289 U JP8831289 U JP 8831289U JP 8831289 U JP8831289 U JP 8831289U JP H0327144 U JPH0327144 U JP H0327144U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- generator
- output
- switch
- spread
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005070 sampling Methods 0.000 claims description 5
- 238000001228 spectrum Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
- 230000003111 delayed effect Effects 0.000 description 3
Landscapes
- Synchronisation In Digital Transmission Systems (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Description
第1図はこの考案の一実施例による遅延ロツク
ドループを示す図、第2図と第3図は第1図にお
ける信号波形を示す図、第4図は従来の遅延ロツ
クドループを示す図、第5図は第4図における信
号波形を示す図である。
図において、1は拡散信号復調器、2はバンド
パスフイルタ、3は検波器、4は第1のローパス
フイルタ、5は減算器、6は第2のローパスフイ
ルタ、7はクロツク発生器、8は拡散符号発生器
、9は局発信号変調器、10は局発信号発生器、
11は入力拡散信号、12はサンプルホールド回
路、13はスイツチ、14はスイツチ切替信号発
生器、15はサンプリング信号発生器である。な
お、図中、同一符号は同一または相当部分を示す
。
FIG. 1 is a diagram showing a delayed locked loop according to an embodiment of the invention, FIGS. 2 and 3 are diagrams showing signal waveforms in FIG. 1, FIG. 4 is a diagram showing a conventional delayed locked loop, and FIG. 5 is a diagram showing a conventional delayed locked loop. 4 is a diagram showing the signal waveform in FIG. 4. FIG. In the figure, 1 is a spread signal demodulator, 2 is a bandpass filter, 3 is a detector, 4 is a first low-pass filter, 5 is a subtracter, 6 is a second low-pass filter, 7 is a clock generator, and 8 is a a spreading code generator; 9 a local signal modulator; 10 a local signal generator;
11 is an input spread signal, 12 is a sample and hold circuit, 13 is a switch, 14 is a switch switching signal generator, and 15 is a sampling signal generator. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.
Claims (1)
号を拡散復調するための入力信号と同一の拡散符
号で拡散された局発信号で復調する拡散信号復調
器と、上記復調器の出力端に接続されるバンドパ
スフイルタと、上記バンドパスフイルタの出力端
に接続される検波器と、上記検波器の出力端に接
続されるローパスフイルタと、上記ローパスフイ
ルタの出力端に接続される一対のサンプルホール
ド回路と、上記一対のサンプルホールド回路の各
出力を入力信号とする減算器と、上記減算器の出
力端に接続されるローパスフイルタと、このロー
パスフイルタの出力端に接続されるクロツク発生
器と、上記クロツク発生器の出力端に接続された
拡散符号発生器と、上記拡散符号発生器の2つの
出力を入力とするスイツチと、上記スイツチの出
力信号を変調入力信号とし、かつ局発信号発生器
の出力信号を搬送波入力信号とし、出力信号を前
記拡散復調器の局発信号として出力する局発信号
変調器と、上記サンプルホールド回路にサンプリ
ング寸毫を供給するサンプリング信号発生器と、
上記サンプリング信号発生器が出力するサンプリ
ング信号から上記スイツチを制御するスイツチ切
換信号発生器とを具備してなることを特徴とする
遅延ロツクドループ。 a spread signal demodulator that demodulates a spread spectrum input signal with a local signal spread with the same spreading code as the input signal for spread demodulating the input signal; and a spread signal demodulator connected to the output end of the demodulator. a bandpass filter, a detector connected to the output end of the bandpass filter, a lowpass filter connected to the output end of the detector, and a pair of sample and hold circuits connected to the output end of the lowpass filter. , a subtracter whose input signal is each output of the pair of sample and hold circuits, a low-pass filter connected to the output terminal of the subtracter, a clock generator connected to the output terminal of the low-pass filter, and a clock generator connected to the output terminal of the low-pass filter; a spreading code generator connected to the output end of the generator; a switch that receives the two outputs of the spreading code generator as input; and a switch that uses the output signal of the switch as a modulation input signal and outputs the local oscillator signal generator. a local oscillator signal modulator that uses a signal as a carrier wave input signal and outputs an output signal as a local oscillator signal of the spreading demodulator; a sampling signal generator that supplies sampling dimensions to the sample hold circuit;
A delay locked loop comprising: a switch switching signal generator for controlling the switch from a sampling signal output from the sampling signal generator.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8831289U JPH0327144U (en) | 1989-07-27 | 1989-07-27 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8831289U JPH0327144U (en) | 1989-07-27 | 1989-07-27 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0327144U true JPH0327144U (en) | 1991-03-19 |
Family
ID=31637934
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8831289U Pending JPH0327144U (en) | 1989-07-27 | 1989-07-27 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0327144U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002027993A1 (en) * | 2000-09-26 | 2002-04-04 | Kawasaki Microelectronics, Inc. | Despreading method and despreading device |
-
1989
- 1989-07-27 JP JP8831289U patent/JPH0327144U/ja active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002027993A1 (en) * | 2000-09-26 | 2002-04-04 | Kawasaki Microelectronics, Inc. | Despreading method and despreading device |
US7099381B2 (en) | 2000-09-26 | 2006-08-29 | Kawasaki Microelectronics, Inc. | De-spreading method and de-spreading apparatus |
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