JPH03245558A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve a semiconductor device in resistance to thermal fatigue by a method wherein a semiconductor chip is surrounded with a hardened body which contains granules of thermosetting resin, inorganic material, and rubber- like elastic material excluding its heat dissipating surface on the other side of the board. CONSTITUTION:An Si chip 3 is mounted on a glass board 1. Solder bumps 10 connect the glass board 1 with the electrode terminals of the chip 3 opposed to the board 1. A resin coating 11 is formed of, at least, the hardened body of resin composition filled into a gap around the solder bumps 10. The resin composition concerned contains first granules of thermosetting resin and inorganic material whose thermal expansion coefficient is smaller than that of the thermosetting resin concerned and second granules of rubber-like elastic material, and the hardened body is made to cover the peripheral part of the Si chip 3 is excluding the heat dissipating surface of the Si chip 3 on the other side of the board 1 and the surface of the glass board 1 confronting the Si chip 3.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides electrode terminals of semiconductor chips using the CCB method (Cont
rolled Co11apse Bonding method)
The present invention relates to a semiconductor device having a structure in which the semiconductor device is bonded to an electrode terminal on a substrate and then covered with a resin.

[Conventional technology]

As a specific example of a semiconductor device having such a structure, as shown in the cross-sectional structural diagram of main parts shown in FIG. 1, a semiconductor chip for driving the liquid crystal display element is mounted on a glass substrate on which a liquid crystal display element is formed. It is known that they are mounted and formed integrally. That is, the electrode terminal 2 formed on the upper surface of the glass substrate 1
and a semiconductor chip made of silicon semiconductor (hereinafter referred to as Si
The electrode terminals 4 formed on the lower surface of the chip (referred to as a chip) 3 are arranged to face each other, and the electrode terminals 2 and 4 are joined by a solder bump 5 formed by the CCB method, and then a flexible material such as silicon gel or the like is used. A structure in which the void between the glass substrate 1 and the Si chip 3 is filled with a resin 6 having the properties of hydration, and the top and side surfaces of the Si chip 3 are further covered with a bisphenyl-type low-expansion epoxy resin 7 mixed with calcium carbonate. It becomes.

[Problem to be solved by the invention]

However, for the semiconductor device with the above structure, the temperature at 40°C←→
When a temperature cycle test was conducted under a temperature condition of 100° C., the result was that the thermal fatigue resistance was considerably inferior to that of a chip without a coating (hereinafter referred to as a bare chip). Therefore,
As a result of examining the cause through experiments and the like, it was found that there are the following drawbacks.

That is, when calcium carbonate powder is mixed into epoxy resin,
Although the expansion coefficient is greatly reduced, it is still large compared to Si chips and glass substrates.

Moreover, increasing the mixing ratio of calcium carbonate reduces the fluidity and flexibility of the resin, and does not necessarily improve the thermal fatigue resistance.

Furthermore, improving heat dissipation of semiconductor chips is also important in terms of improving thermal fatigue resistance.

An object of the present invention is to improve thermal fatigue resistance of a semiconductor device having a structure in which a semiconductor chip is placed on a substrate via a conductor connecting opposing electrode terminals, and a resin is filled in the gap between the chip and the substrate. The aim is to improve

[Means to solve problems]

The present invention provides a semiconductor chip, a substrate on which the semiconductor chip is mounted, a conductor connecting opposing electrode terminals of the substrate and the semiconductor chip, and at least a gap around the conductor. In a semiconductor device comprising a cured product of a filled resin composition, the resin composition comprises a thermosetting resin, a first powder fluid made of an inorganic material having a coefficient of thermal expansion smaller than that of the resin, and and a second powder fluid made of a rubber-like elastic material, and this cured product covers the outer peripheral portion of the semiconductor chip and the surface of the substrate opposite thereto, excluding the heat dissipation surface on the opposite surface of the semiconductor chip. By enclosing it, thermal fatigue resistance is improved.

In other words, by mixing the first powder fluid made of an inorganic material, the coefficient of thermal expansion of the resin composition is sufficiently reduced, and by mixing the second powder fluid made of a rubber-like elastic material, the resin composition liquidity and flexibility will increase. Increased fluidity makes it easier for the resin composition to penetrate into the gap between the semiconductor chip and the substrate during the resin composition filling process, improving adhesion between the conductor, chip, and substrate, and improving thermal fatigue resistance. At the same time, it improves workability. Furthermore, the increased flexibility of the resin composition alleviates stress concentration at the joints between the conductor, the chip, and the substrate, and improves thermal fatigue resistance.

Furthermore, since the heat dissipation surface on the upper surface of the chip is covered with resin, the heat insulating effect of the resin coating is reduced, and the temperature rise of the semiconductor chip, which is one of the factors influencing thermal fatigue resistance, is suppressed.

〔Example〕

Hereinafter, the present invention will be explained based on examples.

First, a coating resin material according to an embodiment of the present invention will be explained. The coefficient of thermal expansion αRO of epoxy resin is approximately 100XIO
-@/'C, the thermal expansion coefficient asi of a semiconductor chip, such as a Si chip; 3X10-''/'C, and the thermal expansion coefficient a of a substrate, such as a glass substrate, soda glass;
9.33 X IP'/' Larger than C. Generally, in order to improve thermal fatigue resistance, it is desirable to use a coating resin whose coefficient of thermal expansion is close to that of the semiconductor chip or substrate.

Therefore, an inorganic material with a small coefficient of thermal expansion (hereinafter referred to as a low-expansion material), such as calcium carbonate or quartz powder, is mixed into the epoxy resin to reduce the expansion. For example, when 50% by volume of quartz powder is mixed, the coefficient of thermal expansion αR decreases to about 25×10 −@/°C. However, as the mixing rate increases, the viscosity of the resin increases and fluidity decreases. When fluidity decreases, it becomes difficult for the resin to penetrate into the voids around the solder bumps during the coating process, resulting in voids remaining, poor adhesion to the board, and reduced coating workability. A problem arises. As a result, thermal fatigue resistance and moisture resistance may be adversely reduced. Furthermore, when the mixing rate is increased, the flexibility of the resin decreases and stress is concentrated at the bonded portion with the substrate, which may damage the substrate such as glass.

Therefore, there is a certain limit to improving thermal fatigue resistance by simply mixing a low-expansion material to lower the expansion, so it is necessary to further improve the fluidity and flexibility.

Therefore, in addition to the low expansion material, the present invention includes a granular elastic material,
For example, rubber particles such as polybutadiene or silicone are dispersed and mixed in to improve flexibility and fluidity. In other words, the rubber particles in the coating resin act as a stress buffer, improving flexibility and relieving stress concentration and strain, thereby improving thermal fatigue resistance. Further, it is intended to improve fluidity through the action of granular rubber particles. However, as will be described later, there is an optimum range for the mixing ratio of rubber particles. For example, when rubber particles made of polybutadiene (CTBN 1300 In addition, since the thermal expansion coefficient αPB of polybutadiene is large at approximately 80 x 10'''@/℃, the thermal expansion coefficient αR of the coating resin becomes large after mixing, which causes a decrease in thermal fatigue resistance. Furthermore, even if there is an effect of improving fluidity, a significant improvement cannot be expected because of the saturation phenomenon.

These matters will be explained based on the results of experiments conducted using examples of resin materials. Table 1 shows epoxy resin (E
P-828) as the main material, quartz powder with a grain size of approximately 1 μm as a low expansion material, uniform rubber particles of polybutadiene with a grain size of approximately 1 μm as a buffer material, and covered with various resins with different mixing ratios. The results of the same temperature cycle test as described above are shown below using a semiconductor device as a sample. In addition,
The substrate, semiconductor chip, and solder bumps have the same configuration as shown in Figure 1, and the judgment is that samples that fail in an earlier cycle than those of bare chips without resin coating are rejected. Indicated by a mark.

Those that passed were marked with 0 and Δ marks in descending order of excellence based on failure rate. As an example of failure rate.

In Figure 2 (A), the mixing rate of quartz powder is fixed at 35% by volume,
When the mixing rate of polybutadiene rubber particles is changed,
In Figure 2 (B), the mixing rate of polybutadiene rubber particles is 10
The graph shows the cases where the quartz powder is fixed at a certain area and the mixing rate of quartz powder is varied.

In addition, what is shown by solid lines in Figures 2 (A) and (B) is
This is an example in which a temperature cycle test of 71 hours per cycle was carried out for 900 cycles, and the dotted line in the figure shows a temperature cycle test of 50 cycles.
This is an example of 0 cycles. The coating resin also contains additives to lower the curing temperature, such as 5% by weight of imidasil (2 parts 4MH2) as a curing accelerator, 10% by weight of dicyandiamide as a curing agent, and a silane coupling agent (A-
187), and the curing temperature was set at 130° C. for 1 hour to avoid thermal effects on the substrate.

Based on the judgment results shown in Table 1, we will discuss the effect of mixing the low expansion agent and buffering agent. First, samples with a polybutadiene content of 0 parts, that is, samples mixed with only quartz powder, all had worse judgment results than those with bare chips, but when comparing quantitatively between resin-coated samples, quartz powder It has been confirmed through experiments that the thermal fatigue life increases as the powder content increases. However, the mixing of quartz powder reduces fluidity and impairs penetration into the lower side of the Si chip 3 and around the solder bumps 5, so from this point of view, the maximum mixing rate of quartz powder is 60% by volume. be.

On the other hand, polybutadiene is only slightly mixed, as shown in Figure 2 (
As shown in A), the failure rate was rapidly reduced, the effect as a buffering material and fluidizing material was remarkable, and properties superior to bare chips in terms of thermal fatigue resistance were obtained. However, if the polybutadiene mixing ratio is increased, the dispersion becomes non-uniform as described above, and the thermal fatigue resistance decreases.

From these facts and Table 1, the mixing rate of quartz powder is 30~
55% by volume, the mixing rate of polybutadiene rubber particles is 1-2
By selecting the amount within the range of 0 parts, it is possible to obtain a chip with better thermal fatigue resistance than a bare chip. For example, the thermal fatigue resistance (life) of a chip mixed with 50% by volume of quartz powder and 5 parts of polybutadiene was more than three times that of a bare chip, and the reliability was significantly improved.

In addition to quartz, low-expansion materials include calcium carbonate,
Inorganic materials having a small coefficient of thermal expansion, such as silicon carbide, silicon nitride, or silicon carbide mixed with beryllium oxide, can be used, and the same effect can be obtained.

Even if the particle size of this low expansion material is 1 μm as in the above example,
It is not limited to.

Further, as the elastic material, in addition to polybutadiene rubber particles, so-called highly elastic rubber particles such as silicone rubber particles can be used, and the particle size thereof is not limited to 1 μm.

Next, the shape of the resin coating will be explained.

As mentioned above, even if low expansion materials such as quartz powder are mixed in,
The coefficient of thermal expansion αR of epoxy resin is still larger than that of soda glass or semiconductor chips. The semiconductor chip, solder bumps, glass substrate, or connection portions of these members are damaged due to stress caused by the difference in the amount of thermal expansion between these members. Experiments have shown that the connection between the solder bump and the semiconductor chip is the most vulnerable to repeated stress.

Therefore, the shape of the resin coating that can reduce the stress generated at the connection part, that is, the coating thickness on the upper surface of the semiconductor chip and the coating width around the semiconductor chip, was determined using the finite element method.

That is, when the coating thickness tm + the top surface of the semiconductor chip is closed,
The maximum stress (tensile stress related to breakage) applied to the connection between the solder bump and the semiconductor chip was determined, and is shown in FIG. 3(A) as a ratio to the maximum tensile stress in the bare chip. As shown in FIGS. 3(B) and 3(C), the glass substrate 1, the semiconductor chip 3 is a 6 mm square Si chip, the solder chip 5 is in the shape of a truncated ball, and the resin coating 7 is entirely @
The model is one in which L is constant at 15 m square, and arrow 9 in the diagram
The maximum stress in the direction of is calculated. The stress at the position of arrow 9 becomes tensile stress when the temperature changes from room temperature (20°C) to 100°C, and from room temperature (20°C) to -4°C.
When the temperature changes to 0"C, the stress becomes compressive. In addition, the resin is made of an epoxy resin mixed with only quartz powder, which has poor fluidity, and a void 8 is created between the substrate 1 and the chip 3. modeled.

As is clear from FIG. 3(A), as the coating thickness t increases, the maximum tensile stress applied to the connection between the semiconductor chip 3 and the solder bumps 5 increases, so the thinner the coating thickness t, the better. Become. In addition, it is said that thinner is better in terms of heat dissipation, but the minimum allowable thickness may be limited due to mechanical protection and moisture resistance, and t is 1 ± 0.
．． It is desirable to select within the range of 5+w. However, if mechanical protection and moisture resistance do not have to be considered,
It is clear that it is not necessary to cover the entire upper surface of the semiconductor chip 3.

On the other hand, FIG. 4A shows the relationship between the width of the resin coating formed around the semiconductor chip and the maximum stress applied to the connection portion. The model shown in FIGS. 4(B) and (C) is the same as that in FIG. 28, and Q is the dimension from the edge of the semiconductor chip to the outer edge of the coating, that is, the width of the coating formed in the peripheral area of the semiconductor chip.

As shown in FIG. 4(A), the maximum tensile stress tends to increase as ρ/a increases. This means that when the coverage IWΩ in the peripheral region becomes wider, the center of the coverage @Q (shown E, B
') It is thought that the inner coating expands inward when the temperature rises, and this causes stress to act on the semiconductor chip 3 in the compressive direction. This fact has been confirmed through calculation.

Therefore, the maximum tensile stress can be reduced by increasing Q/a. In other words, even if the thermal expansion coefficient of the coating resin is large, by making the coating shape appropriate,
Thermal fatigue resistance can be improved compared to bare chips. However, even if Q/a≧3.0 or more, the effect of reducing the maximum tensile stress will be reduced, but on the other hand, glass breakage will easily occur at the joint between the glass substrate 1 and the resin coating 7, and the entire resin coating 14 will be damaged. Considering the area limitation of
Q/a is preferably in the range of 2 to 3. Incidentally, to give an example of the optimal shape, the coating thickness t on the top surface of the semiconductor chip
is 0.5m+, and u/a is 2.

Next, the shape of the solder bump will be explained.

In the above-mentioned examples regarding the coating resin material and the coating shape, the solder bump shape was described as a rounded part, but the solder bump shape could be a shape that can follow the deformation of the resin or a shape that can reduce the stress applied to the solder bump. If so, the thermal fatigue resistance should be dramatically improved.

Therefore, the shapes of solder bumps were formed as shown in FIGS. 5(A) to 5(D), and the thermal fatigue life and mechanical strength were experimentally determined. The solder bumps shown in FIGS. 5(A) to 5(D) all have the same volume, and by changing the gap size between the semiconductor chip and the substrate in the CCB method, the height and center diameter of the solder bumps can be adjusted. changed.

FIG. 6 is a diagram showing how the thermal fatigue life and mechanical strength change when vertical and horizontal forced strain is applied to a bare chip having solder bumps formed as described above. In the same figure, the ratio b/c of the center diameter of the solder bump to the terminal diameter C is plotted on the horizontal axis, and the thermal fatigue life of the ball-cut type shown in FIG. 5 (D) is plotted as 1 on the vertical axis. The thermal fatigue life of each shape is shown as a ratio, and also as a ratio of mechanical strength consisting of compressive strength or tensile strength.

As shown in the curve (I) in FIG. 6, it can be seen that the thermal fatigue life characteristics deteriorate rapidly as b/c increases, that is, as the shape becomes a truncated sphere. This is because the stress distribution within the solder bump varies greatly depending on its shape. That is, b/c shown in FIGS. 5(A) and (B)
When the stress applied to the so-called Tsume-type solder bump with <1 was determined by the finite element method, it was found that the stress was distributed as shown in FIG. 7(A). In the figure, arrows indicate the direction and magnitude of stress in each section or area, and it can be seen that the stress is distributed almost uniformly.

On the other hand, b/c > 1 shown in Fig. 5(D)
In the case of a spherical solder bump, the stress distribution is shown in Figure 7 (B), with stress concentrated at the bonding interface at both ends.
Thermal fatigue fracture occurs from this part.

In addition, in the case of a solder bump type in which the height of the solder bump is large, the strain becomes relatively small for a certain amount of deformation, so the thermal fatigue life is improved. but,
If b/c is made even smaller to make the solder bump shape more extreme, the stress will be concentrated in the center and the mechanical strength shown by curve (II) in Figure 6 will decrease, so the solder bumps will be Since it breaks, the increase in thermal fatigue life is suppressed.

Therefore, the shape of the solder bump should be at least a cylindrical shape with b/C=1, preferably a cylindrical shape with 0.5≦b/c×1.

By the way, the above description is of a bare chip, but in the case of a resin-coated chip, since the coefficient of thermal expansion of the resin is large, it is desirable that the shape of the solder bump can follow a large amount of deformation. . Regarding this point as well, the tsume type is desirable because it has a large height and, as mentioned above, the strain is relatively small for a given amount of deformation.

For example, as shown in FIG. 8(A), solder bumps 10
When the solder bump 10 is made of a hatsuzumi type and is coated with a resin coating 11 made of a low-expansion epoxy resin, the deformation stress acting on the solder bump 10 is in the vertical and horizontal directions shown by arrows 12 and 13 in FIG. It acts on

In the case shown in FIGS. 8(A) and 8(B), the thermal expansion coefficient of the glass substrate 1 is α, and the thermal expansion coefficient of the Si chip 3 is α.
□, the thermal expansion coefficient of the resin coating 11 is αR1, the maximum lateral deformation is ΔQx, the maximum vertical deformation is ΔQy, si chip 3
, the height of the solder bump 10 is h, the shear strain is Y, the axial strain is ε, the temperature change is ΔT, and the constant is 1.
k2. When A, the total strain is E, and the thermal fatigue life is I'L, the following equations (1) to (5) hold true.

ΔQx=a (αx asi) ΔT
−(1)Δfiff=hαRΔT
...(2) From these equations, the height h of the solder bump
If is large, 8ΩX caused by thermal expansion of the resin coating
.

ΔQ! On the other hand, the strains γ and E become smaller.

Therefore, by using a string-shaped solder bump, the solder bump height h is large, so the strain is small, and the stress concentration is alleviated, resulting in damage to the joint between the solder bump and the semiconductor chip. This has the effect of significantly improving thermal fatigue resistance.

Note that the thermal expansion coefficient of the solder is approximately 25×10′″6/° C., which is equivalent to that of a low-expansion epoxy resin, so that the solder bump itself is rarely restrained by the resin coating.

The basic configuration examples in which the coating resin material and the solder bump shape of the present invention are applied individually have been described above.
It goes without saying that by combining them, it is possible to obtain excellent -layer heat fatigue resistance.

Note that the surface of the semiconductor chip on which the semiconductor element is formed is the surface to which the solder bumps are bonded, and this surface is generally protected by a thin film of 5in2 or polyimide. However, since these thin films are not formed in the areas where the solder bumps are bonded, we will consider the issue of moisture resistance. The commonly known D I P (D
In a resin-molded semiconductor device of the ual InlinePackage) type, the Si chip is connected to the tab of the lead frame, and the terminals on the element side are made of aluminum (
AQ) wires are connected by ultrasonic bonding, and the entire structure is molded with resin. However, moisture intrudes through the interface between the lead wire and the resin, and further reaches the AQ wire, corroding the AQ wire, or corroding the bonding interface between the AQ wire and the element, causing failures such as disconnection. .

However, according to the resin-coated structure formed by the CCB method according to the present invention, the resin-coated portion has the above-mentioned DI.
There are no lead wires such as P's leads, the coating width around the semiconductor chip is large, making it difficult for moisture to enter from the interface between the glass substrate and the resin, and the solder (P'b-5%Sn
, Pb-60%Sn) has excellent corrosion resistance due to precipitation in the AQ line, so it can be said that it has excellent moisture resistance overall.

Furthermore, if moisture resistance is strictly required, as shown in FIG.
A two-liquid coating method in which the liquid is filled under the liquid is effective. Since the silicone gel 14 is flexible, it fits well with the surfaces of the solder bumps 5, the glass substrate 1, and the semiconductor chip 3, and can prevent moisture from entering. However, since the coefficient of thermal expansion of the silicone gel 14 is as large as approximately 100 x 10''6/°C, it is desirable that the surface of the solder bump 5 be coated thinly. If the acrylic resin film 15, which is effective, is thinly coated in advance, glass breakage can be prevented.

Next, a method of forming a solder bump shape into a desired string shape using the apparatus of the embodiment shown in FIG. 10 will be described.

The device shown in FIG. 10 has a semiconductor chip 3 on a glass substrate 1.
This is a device that joins materials using the CCB method.

Further, the glass substrate 1 is an example of one that also serves as a substrate for a display element 16 of a liquid crystal display device.

In this manufacturing method, the glass substrate 1 made of soda glass or the like may break if heated rapidly, and in order to reduce the heat effect on the liquid crystal display element 16, etc., the semiconductor chip 3 is preheated, and then the glass substrate 1 is allowed to pass through the glass substrate 1. The solder bumps 5 are irradiated with infrared rays for a certain period of time to melt them, and then the semiconductor chip 3 is
The purpose is to extend the distance between the glass substrate 1 and the glass substrate 1 to form the solder bumps 5 into a desired shape.

As shown in FIG. 10, a semiconductor chip 3 whose electrode terminal surfaces are coated with solder in advance by vapor deposition or the like is placed on a preheating plate 21 with its electrode terminal surfaces facing upward. The glass substrate 1 is placed on the semiconductor chip 3 with the opposing electrode terminals aligned. Since the maximum permissible temperature of the liquid crystal is 130° C., it is designed to be thermally shielded from the preheating plate 21.

The composition of the solder was Pb-5% Sn (melting point: about 310° C.), which has excellent thermal fatigue resistance, and rosin-based flux was applied to the solder on the electrode terminals in advance.

The bonding process will be explained with reference to the time change curve of the measured temperature of the solder bump 5 shown in FIG.

First, the entire joint portion is preheated to about 100° C. from the semiconductor chip 3 side using the preheater 22 . Thereafter, the infrared lamp 23 irradiates the solder bump 5 with infrared rays.

Next, as soon as the solder melts, a chip suction device is installed! 24
is driven to extend the distance between the substrate 1 and the semiconductor chip 3 to a predetermined distance 25.

At the same time, the infrared lamp 23 and preheater 22 are turned off, and cooling water is passed through the cooling pipe 26 to cool the solder bump and solidify it. The melting time of the solder is approximately 15 seconds, during which time the chip suction device 24 is operated to expand the initial distance 27 to the predetermined distance 25. The time required for this stretching is about 1 second. Further, the shape of the solder bump 5 can be changed by adjusting the protrusion height 28 of the preheating plate 21.

Note that the solder composition is Pb-60 instead of the above.
%Sn (melting point: 191° C.) may be used, and in that case, CCB bonding is possible at a low melting point, so it is suitable for substrates where it is desired to avoid thermal effects.

In addition, it cannot be applied to materials that do not transmit infrared rays, such as alumina substrates, and the well-known method
131647), the semiconductor chip must be heated and melted from the side.

The above manufacturing method is an example in which it is applied to a structure in which a semiconductor chip is CCB bonded to a glass substrate on which an electrode film is formed, but it can also be applied to a semiconductor device having the structure described below. Yes, you can get the same effect.

FIG. 12 shows a structural diagram of an example of the basic configuration according to the present invention.

This figure shows a through-hole pin type low-expansion multilayer printed circuit board 31, and (A) is a cross-sectional structural diagram, (
B) is a bottom view of the semiconductor chip 3, and (C) is a bottom view of the multilayer printed circuit board 31. As shown in the figure, in the case of semiconductor chips with a large number of electrode terminals (for example, the number of terminals reaches 200 or more in VLSI), it is difficult to connect them to the terminals of the board using the wire bonding method. . Therefore, a bonded structure based on the CCB method is suitable, and by applying the above manufacturing method, a highly reliable structure with excellent thermal fatigue resistance can be obtained.

As the multilayer printed circuit board 31, a single substrate made of glass or ceramic material, a glass fiber-containing epoxy, a glass fiber-containing polyimide, or an epoxy or polyimide multilayer substrate containing high elastic modulus and high strength fibers are known. .

Note that Kevlar (manufactured by DuPont, USA) is known as a specific example of the high elastic modulus and high tensile strength fiber. It goes without saying that it is also applicable to multilayer ceramic substrates and the like.

FIG. 13 is a cross-sectional structural diagram showing a preferred embodiment of the present invention. In this embodiment, heat dissipation fins 33 are attached to the example shown in FIG. This has the effect of improving heat radiation from the top surface of the semiconductor chip when heat radiation from the top surface of the semiconductor chip is not effective. That is, Cr--Cu--Au is metallized on the upper surface of the semiconductor chip 3, and the solder 34 has a melting point one level lower than that of the solder bumps 5. For example, if the solder bump 5 is P
If it is Pb-5%Sn, the solder 34 is Pb-60%Sn.
, 5n-3,5%Ag (melting point approximately 220°C), Au-20
%Sn (melting point 280'C) or the like is used. Furthermore, if the heat dissipation characteristics required by the semiconductor chip 3 are moderate, as shown in FIG. 14, if the heat dissipation fins 33 are bonded with resin, they can be bonded at once with the coating resin, and the manufacturing process can be simplified. Simplified.

〔Effect of the invention〕

As explained above, according to the present invention, a semiconductor chip is placed on a substrate via a conductor that connects opposing electrode terminals, and the gap between the chip and the substrate is filled with resin. This has the effect of improving the thermal fatigue resistance of a semiconductor device having excellent vibration resistance and the like.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional structural diagram of a conventional example, and FIG. 2 (A). (B) is a diagram showing the failure rate according to one embodiment of the resin material according to the present invention, and FIG. 3 (A) is a diagram showing an example of the relationship between coating thickness and stress. ), (C) are explanatory diagrams thereof, and FIG.
)t' (C) is an explanatory diagram thereof, Figure 5 is a diagram of the shape of the solder bump, Figure 6 is a diagram showing the relationship between the shape of the solder bump, thermal fatigue life and mechanical strength, Figure 7 (A) , (B) is a stress distribution diagram of a solder bump, FIG. 8 (A) is a cross-sectional structure diagram of an embodiment of a solder bump according to the present invention, and FIG.
is an explanatory diagram, FIG. 9 is a cross-sectional structural diagram of another embodiment of the resin coating according to the present invention, FIG. 10 is a configuration diagram of a manufacturing apparatus by CCBC joining according to the present invention, and FIG. Diagram showing solder bump temperature for illustrative operation explanation, 12th
Figures (A) to (C), Figures 13 and 14 are structural diagrams of preferred embodiments of the present invention, respectively. DESCRIPTION OF SYMBOLS 1...Glass substrate, 2...Electrode terminal, 3...Semiconductor chip, 5...Solder bump, 7, 11...Coating resin, 1o...Solder bump, 15...Acrylic resin film. 31...Multilayer printed circuit board.

Claims (1)

[Claims] 1. A semiconductor chip, a substrate on which the semiconductor chip is mounted, a conductor connecting opposing electrode terminals of the substrate and the semiconductor chip, and at least a portion around the conductor. and a cured product of a resin composition filled in the voids of the semiconductor device, wherein the resin composition includes a first resin composition made of a thermosetting resin and an inorganic material having a coefficient of thermal expansion smaller than that of the resin. and a second powder fluid made of a rubber-like elastic material. 1. A semiconductor device characterized in that the semiconductor device surrounds the surface of the semiconductor device. 2. A semiconductor device according to claim 1, characterized in that the mixing ratio of the first powder fluid is 30 to 55% by volume, and the mixing ratio of the second powder fluid is 1 to 20 parts by weight. . 3. In either claim 1 or 2, the resin is an epoxy resin, and the first powder fluid is mixed with quartz, silicon carbide, silicon nitride, calcium carbonate, and beryllium oxide. The second powder fluid is made of at least one of polybutadiene rubber and silicone rubber. 4. In any one of claims 1 to 3, the substrate is a single substrate made of glass or ceramic material, or contains glass fiber-containing epoxy, glass fiber-containing polyimide, or high elastic modulus high strength fiber. A semiconductor device characterized by being made of epoxy or polyimide. 5. In any one of claims 1 to 3, the substrate is a through-hole pin type multilayer substrate,
A semiconductor device characterized in that electrode terminals of the semiconductor chip are formed over the entire side surface of the substrate of the semiconductor chip.