JPH03239075A - Display signal processor for television receiver - Google Patents

Abstract

PURPOSE:To eliminate a clock interference component by arranging a circuit to supply a DC bias equivalent to the voltage drop in a forward direction of a diode at the voltage dividing point of a resistance division circuit in a level control circuit, and setting the clock interference component less than the ID voltage of the DC bias. CONSTITUTION:R, G, and B signals outputted from a character generator IC 1 are converted to required signal levels with resistors R1, R2, and also, the clock interference component is set less than the (ID) voltage equivalent to the voltage drop in the forward direction of the diode. The DC voltage of ID is applied to the voltage dividing point as the bias voltage supplied from a circuit 2 comprised of the diodes D1-D5 and a resistor R3. Thereby, it is possible to completely eliminate the clock interference component set less than the ID voltage included in on-screen R, G and B signals. Therefore, a display signal from which the interference component is eliminated completely can be supplied to an RGB output circuit 3.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a signal processing device for processing display signals displayed on a display screen such as a cathode ray tube of a television receiver.

Conventional technology In recent years, when displaying channel numbers etc. on the display screen of a television receiver, the conventional LE
The image is displayed by processing the display signal using a display screen such as a cathode ray tube, without providing a display device such as D or the like.

Conventionally, an interface circuit having a configuration as shown in FIG. 3 has been used in this type of signal processing circuit.

As shown in the figure, the level of the display RGB signal output from the character generator 1 is controlled by the interface circuit 2, and when it is applied to the RGB output circuit 3, the RGB output circuit 3 converts the television video signal and the above Switch between display RGB signals and display RGB signals.
The signal is configured to be displayed on the screen.

Problems to be Solved by the Invention However, in such a conventional interface circuit, when the character generator is configured with an IC, the I
If a clock interference component appears in the output of C, the level control to the required level is performed by a circuit made up of resistor division, so the clock interference component cannot be completely removed, and the display on the television receiver will be affected. A problem arises in that an interfering signal appears on the screen, which makes it difficult to accurately display the display signal in a small space on the screen.

The present invention has been made to solve the above-mentioned problems, and aims to provide an image processing device for a television receiver that can completely eliminate clock interference components and provide accurate display even in a small space on the screen. .

Means for Solving the Problems In order to achieve the above object, the present invention provides a circuit that supplies a DC bias corresponding to the forward voltage drop of the diode at the voltage division point of the resistance divider circuit of the level control circuit. This is what happens.

Operation The present invention has the above-described configuration, and the voltage division point of the level control circuit is divided by the forward voltage drop of the diode, hereinafter referred to as rD. Since a DC bias corresponding to > is applied, it is not necessary to completely remove the clock interference component with a resistor divider circuit, and by lowering the ID voltage of the DC bias above to the ID voltage, the influence of the clock interference component on the display screen can be completely eliminated. can be lost.

Embodiments Hereinafter, a display signal processing device (hereinafter referred to as an on-screen signal processing circuit) for a television receiver according to the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the general configuration of an on-screen signal processing circuit in one embodiment of the present invention.

In FIG. 1, 1 is a character generator IC (hereinafter referred to as character generator IC), 2 is an interface circuit, and 3 is an RGB output circuit. The operation of the on-screen signal processing circuit configured as described above will be explained below using FIG. 2.

Figure 2 shows the same circuit diagram, and shows the character generator I.
The RGB signal output from CI is converted to the required signal level by RIR2, and the clock interference component is reduced to below the ID voltage, and the bias voltage is supplied by a circuit consisting of diodes DI to D5 and resistor R3. As a result, the ID DC voltage is applied to the voltage dividing point, thereby completely eliminating the clock interference component which is lower than the ID voltage and is included in the on-screen RGB signal. Therefore, the KGB output circuit 3 can be supplied with a display signal from which interfering components have been completely removed.

As described above, according to the on-screen signal processing circuit of this embodiment, by providing the bias circuit composed of D1 to D5 and the resistor R3, the ID
Since a DC voltage bias is applied, interfering components can be completely removed.

Effects of the Invention As is clear from the above description, according to the present invention, a display signal processing device for a television receiver is configured to apply a DC bias of an ID voltage to a bias circuit of a resistance divider circuit of an interface circuit. By providing an interference removal circuit, interference components can be completely removed, and display signals can be accurately displayed even in a small space on the display screen.

[Brief Description of the Drawings] Fig. 1 is a block diagram of a display signal processing device for a television receiver according to an embodiment of the present invention, Fig. 2 is a circuit diagram showing a specific configuration of the embodiment, and Fig. 3 1 is a circuit diagram of a display signal processing device for a conventional television receiver. 1... IC12 for character generator...
...Interface circuit, 3...RGB output circuit, R+~R6...Resistor, D t "D
s...Diode.

Claims (2)

[Claims] (1) Display signal generation means for generating a signal to be displayed on the screen of a television receiver; RGB signal output means for outputting the display signal as R, G, and B signals; and the display signal generation means and the RGB signal. In a display signal processing device comprising an interface circuit having a voltage dividing means inserted between the output means and the voltage dividing means for controlling the level of the display signal, a diode-connected interface circuit is provided at a voltage dividing point of the voltage dividing means. 1. A display signal processing device for a television receiver, comprising means for applying a direct current bias equal to a forward voltage drop. (2) Voltage dividing means for controlling the level of the display signal is formed by a resistor dividing circuit, and the cathode of a diode is connected to the voltage dividing point of each R, G, and B signal of the voltage dividing means, and the anode of each diode is connected to the voltage dividing point of the R, G, and B signals of the voltage dividing means. An interface circuit is provided in which the common connection point of the resistor and the bias voltage supply terminal are connected via a resistor, and a diode is inserted and connected between the connection point of the resistor and the diode and the ground so that the ground side becomes the cathode. 2. The display signal processing device for a television receiver according to claim 1.