JPH03239035A - Receiver for scramble signal - Google Patents

Abstract

PURPOSE:To prevent occurrence of malfunction due to an error in an information signal by writing the information signal not received to a 1st memory once and transferring the signal to a 2nd memory when no error is detected in the information signal so as to operate the receiver. CONSTITUTION:A signal from a subtractor 32 is once fed to a data latch and error correction circuit 35, where error correction or the like is implemented and when no error is detected, a signal representing it is fed to a control circuit 36 and the content of the circuit 35 is transferred to a memory 37. The information signal received is once written in a 1st memory and when no error is detected from the information signal, the signal is transferred to a 2nd memory to apply the operation of the receiver, then occurrence of malfunction due to information error is prevented.

Description

[Detailed description of the invention] The present invention will be explained in the following order.

8 Industrial Application Field B Summary of the Invention Problems to be Solved by the Prior Art Invention Means for Solving the Problems Effects of the Invention A Industrial Application Field The present invention relates to a receiving device for a souffrane pull signal used when transmitting using a soufflain pull signal.

B. Summary of the Invention The present invention relates to a scramble signal receiving device, which supplies an information signal such as a key signal for scrambling to a first memory, detects an error in the information signal supplied to the first memory, When this error is not detected, the information signal is transferred to the second memory, and the information signal transferred to the second memory is used to perform descrambling, thereby preventing malfunctions caused by errors in the information signal. It is designed to prevent this.

C. Prior Art For example, when transmitting a television signal using a communication satellite, it has been considered to scramble the signal in order to prevent unauthorized viewing by non-subscribers.

In this case, for scrambling the video signal, a so-called line shuffling technique has been proposed, for example, as disclosed in Japanese Patent Laid-Open Nos. 60-256286-8.

D. Problems to be Solved by the Invention However, if only scrambling is performed as described above, there is a risk that the scrambling may be decoded without permission and may be viewed by unauthorized persons relatively easily.

Therefore, it is possible to change the scramble key signal (SDA) from time to time, and to transmit this key signal together with a scrambled signal.Furthermore, this key signal is also scrambled, and the data used to descramble this key signal is considered. The idea was to send them together. According to this, unauthorized decoding of the scramble can be made considerably difficult.

However, when such a method is adopted, there is a high risk that errors may occur during the transmission of key signals and data, especially since the radio waves are weak when transmitted by communication satellites.
When such an error occurs, a problem arises in that erroneous descrambling is performed, erroneous data is generated, and normal reception cannot be performed.

This application has been made in view of these points, and is intended to prevent the above-mentioned malfunctions with a simple configuration. A device (200) for receiving a transmission signal in which a common information signal including the scrambling key signal is divided and gradually transmitted in sequence.
The divided information signals in this received signal are gradually supplied to the first memory (data latch and error correction circuit (35)), and all of the information signals are supplied to the first memory. Error detection is performed when the data has been supplied to the first memory, and when no error is detected, the contents of the first memory are transferred to the second memory! J (37), and descrambles (circuit (22) (25)) the received signal based on the contents of this second memory.

F. Effect According to this, the received information signal is once written in the first memory, and when no error is detected in this information signal, it is transferred to the second memory and operated. Malfunctions caused by errors in information signals can be prevented, and scrambled signals can be received favorably with a simple configuration.

G. Embodiment FIG. 1 shows a system configuration from transmission to reception, in which (100) indicates the transmitting side device and (200) the receiving side device as a whole.

In this figure, (1) is an input terminal for a video signal, and the video signal from this input terminal (1) is supplied to a scrambling circuit (2) such as the above-mentioned line shuffling, and the scrambled video signal is output. It is supplied to the transmitting circuit (3). Further, (4) is an input terminal for an audio signal, and this audio signal is supplied with a PCM audio signal sampled at, for example, 48 kHz and quantized at 16 bits. The audio signal from this input terminal (4) is sent to a scramble circuit (5).
The scrambled audio signal is sent to a multiplexing circuit (
6) is supplied to the transmitting circuit [3).

Furthermore, (7) is a key signal generation circuit, and in response to a predetermined key signal that changes every moment from this generation circuit (7),
is supplied to the scrambling circuit (2) as data (SDA) for scrambling the video signal.

At the same time, this key signal Ks (= S D A ) is supplied to an adder (exclusive OR circuit) (8), where it is scrambled by arbitrary bit inversion, etc., and this scrambled key signal is It is supplied to a multiplexing circuit (6).

In addition, K3 is a random signal generating circuit (9) (10) such as an M sequence for the key signal from the generating circuit (7), respectively.
are supplied as initial values to these generating circuits (9) (1
0) is selected by the switch (11) and sent to the audio signal scrambling circuit (5) and the adder (8).
). Note that the key signal is 3. - is the switch (
11), the values are sequentially changed while they are not selected. This performs 5 scrambles on the audio signal and key signal.

Furthermore, the switching of the switch (11) is performed by the switching signal generation circuit (1
2), and a flag (identification signal) indicating this switching state is supplied to the multiplexing circuit (6). Note that this switching is done using the key signal 3°K4 4a, which will be described later.
This is done at intervals with a margin for L.

Further, each of (13>) is a generating means for information data, and in this generating means (13), which is a combination coater, for example, broadcast data such as channel number, individual information such as subscriber number of each subscriber and contracted channel number, etc. Subscriber data including (reception registration number), tamper-proof ID, error correction code, etc. are generated.

Information data from this generating means (13) is supplied to an information signal string forming circuit (14). Further, to the key signal from the above-mentioned generation circuit (7), , K, and 2. to be described later. 1 is supplied to the formation circuit (14).

In this forming circuit (14), information signal strings are formed, for example, in two formats as described below. In other words, FIG. 2A shows the format of a common information signal string, and from the beginning (left) side of the time series, for example, a header ID indicating that the following 8 bits are common information, a 16-bit key signal, +, Ka, etc. , 3 to each 32-bit key signal. A 4-bit tamper-prevention ID, a 4-bit channel number, etc. are provided at the top, and a 24-bit error correction code is provided at the end, making the total 256 bits. In addition, FIG. B shows the format of the individual information signal sequence, and similarly, from the beginning (left) side of the time series, for example, a header ID, 22, indicating that the following 8 bits is individual information.
Bit subscriber number, 4-bit tamper-proof ID, 19
2-bit individual information for each subscriber is provided, and 24 bits are provided at the end.
A bit error correction code is provided, making the total 256 pits.

The common information signal string and the individual information signal string are respectively supplied to adders (exclusive OR circuits) (15) and (16). Furthermore, 1 is added to the key signal from the generation circuit (7).
is supplied to the random signal generation circuit (17) as an initial value, and the random signal from this generation circuit (17) is supplied to the adders (15) (16).
> is supplied to the adder (18), and at the same time, 2 is supplied to the key signal from the generation circuit (7) as an initial value to the random signal generation circuit (19), and this generation circuit (
A random signal from 19) is fed to an adder (18).

As a result, the common information signal string is scrambled using the key signal Kl, and the individual information signal string is scrambled with the key signal Kl.
Scrambling is performed by and 2. In reality, in the common information signal string, the header and the key signal are scrambled by 1 except for the key signal 2, and after that, the key signal is scrambled by 1, and in the individual information signal string, the key signal is scrambled except for the header, and the key signal is scrambled by 1. 2 is being scrambled. Further, the values of these key signals 1 and 2 are changed sequentially, for example, every 5 seconds.

These scrambled common information signal strings and individual information signal strings are supplied to a multiplexing circuit (20), and are time-division multiplexed, for example, at a ratio of nine individual information signal strings and one common information signal string. This multiplexed signal is supplied to a multiplexing circuit (6).

In this multiplexing circuit (6), for example, the following multiplexing is performed. In other words, in this device,
PCM audio signals are transmitted in a format that conforms to so-called B-mode audio on broadcasting satellites. Therefore, Fig. 3 shows the bit interleave matrix of one frame transmitted with 1ms synchronization, and this matrix has 32
It consists of 64 rows and columns. Here, the first and second columns are areas for control codes and range bits that indicate frame synchronization, audio signal mode, etc., and the following third to 50th columns are PCM areas.
This area is considered to be an area for audio signals. Furthermore, the 58th to 64th columns are used as error correction code areas, and the 51st to 57th columns between these are used as independent data areas for B-mode audio.

Therefore, in the above-mentioned multiplexing circuit (6), the key signal scrambled in the area of the 5Ith column to the 57th column is
, a flag indicating the switching state of the switch (11), and a common information signal sequence or individual information signal sequence can be multiplexed. Note that the common information signal sequence and the individual information signal sequence are transmitted, for example, at 8 beats per frame, and are transmitted over 32 frames in total.

The scrambled video signal and the scrambled and multiplexed audio signal as described above are sent to the transmission circuit (3).
The signal is supplied to the receiver and transmitted to the receiving device (200) using, for example, a communication satellite (not shown).

Therefore, in this receiving side device (2(]0), the video signal received by the receiving circuit (21>) is first supplied to the descrambling circuit (22), the above-mentioned line shuffling is restored, and the output terminal (Retrieved from 23).

In addition, the audio signal received by the receiving circuit (21) is supplied to the descrambling circuit (25>) through the separating circuit (24>), where any bit inversion etc. is restored to the original state and the output terminal (26
) is taken out.

Furthermore, a signal corresponding to the key signal Ks is separated in a separation circuit (24), and this signal is supplied to a subtracter (exclusive OR circuit') (27) to perform descrambling such as arbitrary bit inversion. It will be done. The key signal 5 (=SDA) restored by this descrambling is supplied to the descrambling circuit (22).

In addition, the separation circuit (24) separates the signals corresponding to the above-mentioned common information signal string and individual information signal string, and this signal is sent to the subtracter (28) and the key signal. J (29)
is supplied to At the same time, the signal from the separation circuit (24) is supplied to the header detection and timing generation circuit (30), and the header ID of the common information from this generation circuit (30) is supplied to the header detection and timing generation circuit (30).
Note the key signal corresponding to the period immediately after is detected! J (29) and the key signal KI is written into the memory (29). Also this memo! J (
The key signal KI written in 29) is supplied to the random signal generation circuit (31>) as an initial value, and the key signal 2 and later is supplied to the random signal generation circuit (31) as the key signal when the header ID of the common information is detected from the generation circuit (30). Period and header ID of individual information
A signal corresponding to the period after the subscriber number is detected is supplied to the generating circuit (31), and a random signal generated during this period is supplied to the subtracter (28). Descrambling of the second and subsequent signals is performed on the key signal of the column.

The signal from this subtracter (28) is supplied to the subtracter (32) and the key signal 2 Memo!J (33).At the same time, the header ID of the common information from the generator (30) is detected. A signal corresponding to a period of 2 in the later key signal is supplied to the memo 'J (33), and 2 is written in the key signal to the memory (33). 2 is supplied to the key signal as an initial value to the random signal generation circuit (34), and a signal corresponding to the period after the subscriber number when the header ID of the individual information from the generation circuit (30) is detected is supplied to the random signal generation circuit (34). The random signal generated during this period is supplied to the generation circuit (34) and is sent to the subtracter (32).
〉 As a result, the signals after the subscriber number in the individual information signal string are descrambled.

The signal from this subtracter (32) is supplied to a data latch and error correction circuit (memory) (35). On the other hand, the signal from the generation circuit (30) is supplied to the memory control circuit (36), and the signal from this control circuit (36) is supplied to the circuit (35).
). As a result, the above key signal,
, tamper-proof ID, channel number, subscriber number,
Data such as the tamper-proof ID and individual information of each contractor are latched in the circuit (35).

Further, this circuit (35) performs data error correction using the error correction code at the end of each information signal string. When this error correction is completed and there is no data error, a signal indicating this is supplied to the control circuit (36), a signal from this control circuit (36) is supplied to the memory (37), and the circuit Each data latched in (35) is memo'
l (37).

This causes each data to be written into the memory (37).

Therefore, for these data, the subscriber number is first read out from the generation circuit (30) to the authorization circuit (38) at a predetermined timing. On the other hand, this authorization circuit (
38) stores a decoder identification number (registration number) independently provided for each receiving device (200) in its storage means (38).
9), and this identification number and the above-mentioned subscriber number (
reception registration number>, and when they match, the subsequent individual information for each subscriber is determined to be valid, and information such as the contract channel number provided here is extracted and saved. Then, when the channel number in the common information signal sequence and the contracted channel number match, the descrambling operation is approved. Another note! The tamper-proof ID provided for each of the data of the common information signal string and the data of the individual information signal string of J (37) is read out to the mismatch detection circuit (40>) at the timing from the generation circuit (30), and the mismatch is detected. When detected, the contents of the memo 'J (37) are reset) so that all channels are in an unsubscribed state.

When the above-mentioned descrambling operation is approved, 3 is supplied to the key signal from Memo'J (37), , and 3 as initial values to the random signal generation circuits (41) and (42), respectively, and The frame synchronization signal from the separation circuit (24) is detected by the detection circuit (43) and sent to the generation circuit (
41) Supplied to (42). The random signal generated thereby is selected by the switch (44) and supplied to the descrambling circuit (25) and the subtracter (27), and a flag (identification The key code> is supplied to the switching signal generating circuit (45>), and the signal from this generating circuit (45>) causes the switch (
44> is controlled.

The video signal and PCM audio signal thus received are descrambled.

Furthermore, in this device, the signal from the subtracter (32) is once sent to the data latch and error correction circuit (35).
When the error is no longer detected due to error correction etc., a signal indicating this is sent to the control circuit (36).
〉 and the contents of the circuit (35) are memo U' (37)
will be forwarded to. Therefore, if an error is detected in the signal from the subtracter (32) and it is impossible to correct it, please note the individual information of each subscriber. Writing to I (37) is prohibited,
This prohibits operations such as approval of descrambling operations.

In other words, in the above-mentioned device, for example, when transmitting using a communication satellite, the radio waves are weak, so
There is a large possibility that the above-mentioned error in the information signal will occur. If such incorrect individual information for each subscriber is written, descrambling of the originally subscribed channel will no longer be approved, making it impossible to view the desired channel. Further, since each receiving device usually transmits the corresponding individual information signal sequence about once every hour, in the worst case, the user will not be able to view the desired channel for nearly an hour.

In contrast, the above-described device can prevent such malfunctions from occurring.

The above-mentioned system is for providing television programs and the like to subscribers for each channel for a fee, and in this case, the above-mentioned malfunction must never occur.

Therefore, according to the above-mentioned device, the received information signal is once written into the first memory, and when no error is detected in the information signal, it is transferred to the second memory for operation. , it is possible to prevent malfunctions caused by errors in information, and it is possible to receive scrambled signals in good quality with a simple configuration.

In addition, in the above-mentioned device, 3. By arbitrarily switching between 4 and 4 and performing scrambling, unauthorized deciphering is made extremely difficult.

Further, by providing the key signal 2 for the scramble of the individual information signal string in the information scrambled with the key signal 1, the confidentiality of the individual information signal string is made extremely high.

Furthermore, by providing a tamper-proof ID, unauthorized viewing is effectively prohibited.

Additionally, by prohibiting descramble approval until data for descrambling the individual information signal sequence is detected, malfunctions are effectively prevented.

H Effects of the Invention According to the present invention, a received information signal is once written in the first memory, and when no error is detected in the information signal, it is transferred to the second memory for operation. Therefore, it is possible to prevent malfunctions caused by errors in the information signal, and it is now possible to receive scrambled signals with a simple configuration.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an example of an entire system including a scramble signal receiving device according to the present invention, FIG. 2 is a diagram showing the format of a transmitted information signal string, and FIG. 3 is a PCM
FIG. 2 is a diagram showing a bit interleave matrix of an audio signal. (1) (4) are input terminals, (2) (5) are scrambling circuits, (3) are transmitting circuits, (6) (20) are multiplexing circuits, (7) are key signal generation circuits, (8) (15) (
16) (18) is an adder, (9) (10) (17)
(19) (31) (34) (41) (42) are random signal generation circuits, (11) (44) are switches, (12) (45) are switching signal generation circuits, (13) are information data generation circuits , (14) is an information signal string forming circuit;
(21> is a receiving circuit, (22) (25) is a descrambling circuit, (23) (26) is an output terminal, (24) is a separation circuit, (27) (28) (32) is a subtracter, (
29) (33) (37) is a memo! J, (30) is a header detection and timing generation circuit, (35> is a data latch and error correction circuit, (36> is a memory control circuit, (
38) is an authorization circuit, (39> is an identification number storage means, (40) is a mismatch detection circuit, (43> is a synchronization detection circuit), (100) is a transmitting device, and (200) is a receiving device. Hide Hitomatsu Kuma Mori it, l, f, t61snal device 23.26+ttMnhsu]-

Claims (1)

[Scope of Claims] A device for receiving a transmission signal in which an information signal including a scrambled signal and the above-mentioned key signal for scrambling is divided and gradually transmitted in sequence, wherein the above-mentioned division in the received signal is divided. gradually increase the information signal
Error detection is performed when all of the information signals have been supplied to the first memory, and when no error is detected, the contents of the first memory are transferred to the second memory. A receiving device for a scrambled signal, wherein the received signal is descrambled based on the contents of the second memory.