JPH03159308A - Channel scanner - Google Patents

Abstract

PURPOSE:To perform the comparison of a targeted value with a real value at high speed by fetching video program system(VPS) data at the receiving state of a tuner circuit with a signal representing the fact that receiving state arrives at the optimal point as the real value. CONSTITUTION:A timer circuit 3 scans the reception channel of the tuner circuit 1 sequentially, and discriminates the receiving state of the tuner circuit 1 at that time based on the level of a signal AFTOK outputted from a tuning state comparator 4. When the receiving state arrives at the optimal point, the VPS data at that time is read in as the real value with the timer circuit 3. Thereby, it is possible to perform the comparison of the targeted value with the real value at high speed, and to shorten a time when no recording of a part starting a program generated when plural programs are set is performed.

Description

[Detailed description of the invention]

[Field of application for industry L] This invention is applicable to video program system (hereinafter referred to as VP).
The present invention relates to a channel scanning device 11'7 used for scheduled recording by a computer (referred to as S). [Prior Art] VI) S announces comments for each program of television broadcasting through print media or text for television broadcasting, and if the program needs to be recorded, the name of Toshikawa is recorded as 1''. Image recording g+fr raw device with comments as target values,
For example, a video recorder (hereinafter, v 'r r<
The general idea is to set and store it in V
TI? is the VP rejected by the data string l6 of the bidet signal.
Taking the S code as the actual value, the Tth set lIH
The target value and actual value match, and if it is
r 7E, the program will be recorded. Such a system can be used in cases where programs are broadcast at different times.[1]
Mark {11'! As V T l? The program introduction set to 21
It is intended to be used for recording. FIG. 3 is a block diagram of a conventional channel scanning device used for -r-reduced recording by VPS. In the figure, (1) is a tuner circuit, and (2) is a vPS signal decoder that decodes the VPS code indicated by the data string I6 of the video signal output from the tuner circuit (1). (3) is a timer circuit, which has the function of comparing the VPS data (actual value) from the vPS signal decoder (2) with the target value set by the user, and the tuning data from the tuning state comparison circuit (4). , and a function that allows tuning to be controlled to the optimum point. (5) is the data of the upper J self timer 11 (3) (from this V
This is a system control circuit that controls the internal circuits and mechanisms of the TR, and sets settings such as rain mode and birth mode. Next, the operation will be explained. When the Icheon people set a thin target clay, A c h . as shown in Figure 4. B
ch. Suppose we set a double losing channel as C ch h ・=. The timer circuit (3) is a tuner circuit (
1) Set the reception channel to Ach. Bch. C h・
... and then scan [I target value and setting {lI'
Comparisons with t are performed sequentially. At this time, from Ach to Bch
．． The scanning interval from Bch to Cch... is as follows:
It is determined by the response interval in a closed-loop tuning control system including the tuner 11I1 (!), the tuning state comparison circuit (4), and the timer circuit (3). In other words, the tuner circuit (2) is output from the timer circuit (3) to the tuner (11), which corresponds to the receiving frequency of each channel. Since the receiving frequency may be off, the tuning state is detected by the tuning state comparison circuit (4), and if the receiving frequency is higher than the desired channel, the receiving frequency is lowered, and if it is normal, the receiving frequency is changed. An operation of lowering the frequency is performed. When the receiving channels are scanned in this way, the timer circuit (3) starts the VI-
) S {The VPS data decoded by the L4 decoder (2) is read as an actual value and compared with the target value set by the user. [Problem to be solved by the invention] As described above, the conventional channel scanning device has +M +
Since it is set, the timer circuit (3) starts the tuner circuit (reception of 11: {When scanning channels, regardless of the tuning condition, after a certain period of time, V}J
S data must be read, and channel scanning takes time. Therefore, when a plurality of programs are set, it takes time to compare the target value and the actual value, and there is a problem that the beginning of the program that should be recorded is not recorded. This invention was made to solve the above problems, and when multiple programs are set, [a channel scanning device that can compare the standard value and the actual value as quickly as possible] is used. The goal is to get 11 points. [Means for Solving the Problems] A channel scanning device according to the present invention determines the receiving state of the tuner circuit at the time of channel change,
If it becomes the optimal point. The timer circuit is configured to immediately take in the current PS data as an actual value.

[Effect]

In this invention, when the reception state of the tuner circuit reaches the optimum point during channel history, the timer circuit immediately captures the vPS data at that time as the actual value.
Without taking enough time for the reception condition to become stable,
A comparison between setpoint value and actual value takes place quickly. [Embodiment of the Invention] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of an example of a channel scan device according to the present invention, and the same parts as those of the conventional device are given the same reference numerals and their explanation will be omitted. In the same figure, the Yuichi FMA circuit (3) has a function of comparing the VPS data (actual value) with the target value set by the Ikawa operator, and the tuning data from the tuning state comparison circuit (4). A function that controls the tuning of the tuner circuit (!) to the optimal point, and a tuning state comparison I that shows that the receiving state of the tuner circuit (1) is at the optimal point.
! The tuning state comparison circuit (4) has the function of inputting the VPS data at that time as the real FA +6 upon receiving the OK signal from the tuner (4). l path (tuning data according to the reception status of +1 and A F
It is designed to output a TOK signal. Next, the operation will be explained. When the Icheon broadcaster sets the target value for the program, as shown in Figure 2, the Ach. Bc h.
Cc k1. Dr: h, -" and multiple channels are set, the timer circuit 《3) is connected to the channel 1-na concave path (
1) Reception {1i channel Ac h. B c h .
C<:h. I) Scan sequentially as c h... At this time, the timer circuit (3) uses the level of AFTOK {ir outputted from the cheating state comparison circuit (4) to determine whether the vPS data at that time is an actual value or not by 7+1. In other words, when the channel is changed and the reception condition reaches the optimum point, the AFTOK signal becomes "H" as shown in Figure 2, and the timer circuit (3) reads the vPS data at this time as the actual value. . The time it takes for the 8F'r O K signal to become "H" after changing the channel history depends on the shift in the local oscillation frequency of tuner 111 (1). If you change the history of A I7 1' O
Since the K signal is -I1'', C c h
This shows that the local oscillation frequency at the time of reception was not shifted from the reception frequency dispersion of Cch, and at this time, the vPS
Data can be read as actual values. As a result, when a plurality of programs are set, the problem of not being able to record the beginning of a program is eliminated. Also, Ach. The case where the channel changed to Bch is A.
It takes time for the I'1' OK signal to go from "l" to "11". This is because when changing the channel as mentioned above, the local f
P. Since the oscillation frequency was shifted, it took time for the reception condition to reach the optimum point (until AFTOK reached "11"). In the above embodiment, the signal is set to AFTOK, indicating that the receiving state has not reached the optimum point, and the receiving state is cut off by 11 yen at that level, but this is due to the tuning state comparison circuit (4). This can also be determined by the tuning date sent from timer 1 to timer 1 (3). Generally, this signal is 2-bit data D+. ．． For example, if the reception frequency is lower than Fukubo-uke channel 13, CD, . Da) = (II.L
)． Also, if the opposite is true, (+). ．． D2)
= (1-.tl). If it is the optimal point (D.
Da) = (l-1.}l). For this reason,
(D+. Da > ” (H. It) becomes A
It is possible to obtain the same result as when F T O K = “T1”. [Effects of the Invention] As described above, according to the present invention, the timing for reading VPS data is determined based on the signal level without indicating the reception status of the tuner circuit, so that the comparison between the target value and the actual value can be made as much as possible. This can be done quickly, and therefore the unrecorded special period at the beginning of a program that occurs when a plurality of programs are set can be shortened.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of an example of a channel scanning device according to the present invention, Fig. 2 is a diagram illustrating channel scanning timing and VPS data reading timing in the same device, and Fig. 3 is a diagram illustrating a conventional channel scanning device. FIG. 4, a block diagram showing the scanning device, is a diagram explaining the channel scan timing and VPS data read timing of the conventional device. (1)...Tuner circuit, (2)...VPS
Signal decoder, {3}...Timer [+jl path, (4)
. . . Tuning state ratio one-bit circuit 6 In the drawings, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] (1) A VPS signal decoder that decodes the video program system code of the video signal from the tuner circuit, a tuning state comparison circuit that compares the VPS data from this decoder as an actual value with a target value, and this tuning state comparison circuit It is equipped with a timer circuit that controls the receiving state of the tuner circuit to the optimum point based on the tuning data from and the above VPS data, and when changing channels, the VPS data at that time is controlled by a signal indicating that the receiving state of the tuner circuit is at the optimum point. What is claimed is: 1. A channel scanning device characterized in that a timer circuit is configured to take in as an actual value.