JPH0314181A - Automatic arrangement processing system for parts - Google Patents

Abstract

PURPOSE:To improve the wiring rate of an automatic wiring by providing a parts arrangement processing part for calculating a correct arrangement of parts, and a parts shape operating part, securing a wiring track of a parts pin to be placed and executing an automatic arrangement. CONSTITUTION:A parts arrangement processing part 10 executes an arrangement of each parts on a substrate by using arrangement data, parts allocation data and parts data stored in design/parts data 11. On the other hand, in a parts shape operating part 12, with regard to each arranged parts, an operation for enlarging a parts shape is executed. From the parts arrangement data, whether a pin connecting track intersects with a wiring inhibiting area being near the lower part of parts for generating heat or a signal line having a fear of a crosstalk, etc., or not is discriminated by an intersection discriminating means 16, and also, an enlargement processing is discriminated by an inhibiting pin area enlarging means 17, and stored in a memory. In such a way, by placing the area of parts by considering the track area required by the pin, the wiring rate can be improved.

Description

[Detailed Description of the Invention] [Summary] Regarding an automatic component placement processing method for automatically placing components such as circuits and elements on a board, a component that can improve the wiring rate of automatic wiring processing in component placement processing. The purpose of the present invention is to provide an automatic placement processing method, and includes a component placement processing section that calculates the proper placement of components, and a component shape manipulation section.The component shape manipulation section identifies the component shape, pin arrangement, and direction. The pin connection number calculation means calculates the number of pin connections, the pin area expansion means calculates an enlarged pin area corresponding to the calculated number of pins, and the intersection with the wiring prohibited area is detected by the cross identification means. The part shape is obtained by identifying the part, calculating the invalid part enlarged pin area in the prohibited pin area enlarging means, and adding the area of the original part shape, the enlarged part pin area and the invalid part enlarged pin area. do.

[Industrial Application Field] The present invention relates to an automatic component placement processing method for automatically placing components such as circuits and elements on a substrate.

Advances in electronic devices, including information processing devices and communication devices, have been remarkable.The performance of such electronic devices is largely due to advances in system or circuit design, but improvements in the performance of components such as integrated circuits, and printed wiring boards are improving. This is largely due to the sophistication of mounting technology.

In recent years, the requirements for high-density mounting of electronic devices have become even stricter, and the number of pins for two electronic device parts has increased, and the pin pitch (spacing) has increased.
However, as circuits have become narrower than before, it has become difficult to process circuit design data and automatically place and route circuit components on a board according to the circuit design.

If a good wiring rate (wiring achievement rate where 100% is achieved when all pins of all elements and components are wired according to the circuit design) is obtained through such automatic placement and wiring processing, the data can be used to Then you can move on to designing and manufacturing the actual circuit.

However, since the wiring rate in automatic wiring processing depends on the quality of placement processing, it is desired to perform efficient placement processing.

[Conventional technology] FIG. 7 is an explanatory diagram of a conventional example.

FIG. 7A shows a flowchart of a conventional circuit packaging design automation system.

To explain the outline, first, a circuit with the requested function is designed using CAD (computer-aided design) technology (step 70), and then the circuit is designed to realize the requested function. A simulation is performed (step 7]). After this, in the component allocation process, in order to materialize the circuit, the individual elements and circuits in the design are allocated to which actually existing elements and components.
Step 72). Next, after placing the allocated elements/components on a predetermined board, a component placement process is performed to determine whether the most efficient (high-density) placement can be obtained.
Sue-knob 73). In this component placement, processing is performed such as evaluating the wiring rate, detecting unwired portions, and modifying the component placement to correct them. When the component placement is completed, a wiring process is performed to obtain a wiring take indicating between each pin of the component and which rack of the board is to be wired (step 74).

In the above process, the component placement process (step 7j (
) performs a process of arranging the elements/components allocated in the component allocation process (step 72) on the printed circuit board 2 so that they are connected according to the circuit design.

The quality of the placement of these parts depends on whether or not the wiring can be done without any inconvenience during the subsequent wiring work.
Evaluating this in advance would complicate the problem, so evaluation is performed based on the fact that the total wiring length is small, that there are few lines that cross (intersect) other lines, etc.

Conventionally, as shown in Figure 7, 0°A, the components placed on the board are through-mount components, in which the connecting pins pass through holes in the board and are soldered on the back side. However, in order to mount components at high density, surface mount devices (SMD), which can be attached to the surface of the board, are now being used, as shown in Figure 7, C9. On the other hand, when placing elements/components on a board, there are tracks (also called channels) provided on the board between pins that are the feet of the component and other pins that connect to them. It is carried out using

Since it is difficult to cross-connect these tracks using a single-layer wiring board, conventionally a multi-layer board shown in Figure 7E has been used, and through-holes are provided to connect the layers. There is.

Figure 7 shows an outline of the X-Y method that allows easy cross-connection between pins.

As shown in the figure, this method provides a large number of tracks in the X-axis direction of the XY coordinate system in layer 1, and provides a large number of trunks in the Y-axis direction in the other layer 2, between layers 1 and 2. In this method, through holes as shown in E and E are provided as appropriate.

In component placement, wiring length (Manhattan distance) was controlled to be the shortest based on factors such as the degree of coupling between elements and components and the priority of connection lines.

Manhattan distance is the horizontal distance and vertical distance between two points.
It means the sum of ri11 (distance on the X-axis of the coordinate -L and distance on the Y-axis), and in the case of Fig. 7B, a-
The distance is t-b (-c+g4-h), and the distances passing through c, d, e, and f, which are longer routes I, are not applicable.

Components are arranged taking into consideration various factors as described above, and various methods have been used in the past. The principle of a typical known method will be briefly explained.

■Pair-link-link method A method of selecting a pair of parts that have already been placed and the parts that are most connected to this and placing them nearby.

■Cluster Growth Method This method selects the component that is most connected to all the components that have already been placed, and places it at the position where the virtual wiring length is the shortest.

■Center of Gravity Method A method of considering the tension between parts that are connected to each other and placing the parts at a position (center of gravity) where the resultant hector of the tension from other parts on one part is zero.

[Problem to be solved by the invention] In conventional component placement methods, processing is performed to minimize the wiring length, but when automatic wiring processing is performed based on the results, wiring is placed around component pins. There are many cases where the wiring is unwired because there is no trunk, and there is a problem that the wiring rate of automatic wiring processing becomes poor. That is, a track becomes unusable after it has been used in a previous wiring.

An object of the present invention is to provide an automatic component placement processing method that can improve the wiring rate of automatic wiring processing in component placement processing.

[Failure to resolve the issue] FIG. 1 is a diagram showing the basic configuration of the present invention.

In FIG. 1, 10 is a component placement processing section, and 11 is a design/design/processing section.
Part data 12 represents a part shape operation section.

In the component shape operation unit 12, 13 is a component shape/pin arrangement and direction identification means, 14 is a pin connection number calculation means,
15 is a pin area enlarging means, 16 is an intersection identification means with a wiring prohibited area, 17 is a prohibited pin area expanding means, and 18 is an enlarged component shape calculating means.

The present invention calculates the wiring capacitance required for wiring the pins of the component to be placed, expands the pin area, and creates a new component shape by adding the expanded area to the original component shape.
It processes parts placement.

[Operation] The component placement processing unit 10 places each component on the board using the placement data, component allocation data, and component data (shape of each component, size, pin arrangement, etc.) stored in the design/component data 11. I do. On the other hand, the component shape operation section 12 performs an operation to enlarge the component shape for each arranged component.

First, the component shape, pin arrangement and direction identification means 13 identifies the shape of the component, and identifies the configuration of the pins provided on the component and the direction in which they are arranged. To identify the direction, check whether the direction in which the pins of the component are arranged is parallel or perpendicular to the direction of one rack on the board on which the component is placed. At this time, the shape (area) of the part is stored in the Y memory as the original part shape data 131.

Once these are identified, the pin connection number calculation means 14 calculates the number of tracks connected to the pin, and this becomes the number of pin connections. At this time, if the pin connections are to be distributed across multiple layers of the multilayer board, the number to be distributed is specified by inputting an operation.

Next, the pin area enlargement means 15 determines the pin area corresponding to the number of pin connections (l/rank number) obtained by the pin connection number calculation means 14 described in iii., and the result is stored in the memory as enlarged pin area data 151. do. If the wiring spans multiple layers of the board, calculate it for each related layer.

Next, from the component placement data, it is determined whether or not the pin connection track obtained above intersects with a wiring prohibited area, such as under a component that generates heat or close to a signal line where there is a risk of crosstalk. Identification is made by means 16.

If it is determined that the trunk intersects with the prohibited area, the prohibited pin area enlarging means 17 determines a process for further enlarging the trunk intersecting the prohibited area, and stores the result in the memory as invalid enlarged pin area data 171.

Each data 131151.1 obtained by these processes
The contents of 71 are added up in the enlarged part shape calculation means 18, and supplied as an enlarged part shape to the component placement processing section 10, where part placement is further executed based on the data.

In this way, by arranging the component area by taking into account the rack area required by the pin, compared to the conventional method of component placement, which considers the connection distance between pins. When performing wiring processing, it is possible to reduce the occurrence of a situation in which there is no unconnected trunk, and to improve the wiring efficiency.

[Example] Fig. 2 is a processing flow diagram of the embodiment, Fig. 3 is a flow diagram of part shape manipulation processing of the embodiment, Fig. 4 is a diagram showing the mutual relationship between the pins and tracks of the part, and Fig. 5 is FIG. 6 is an explanatory diagram of the relationship between l-rank capacitance and wiring capacitance, and FIG. 6 is an explanatory diagram of the distribution of multiple layers and prohibited areas.

In FIG. 2, in the first step 20, circuit diagram data, wiring condition data, old construction standard data, board data, component arcs, shape data, existing needle data, etc. are extracted from the data file into a processing word W (not shown). Load into memory. At this time, if the operator or installer wishes to instruct a change in the shape of the part, data related to the change in shape is also input.

Next, the arrangement order of the parts is determined (step 21), and the optimum arrangement plane and position are calculated according to the arrangement order (step 22). Optimal placement in this case is performed using one of the conventional component placement methods (described in the prior art section above).

Once the optimal placement is obtained, the component shape operations in that placement are performed (step 23). This part shape manipulation is newly added according to the present invention, and its details are shown in FIG. 3 and will be described later. Further, step 22 may be executed after step 23 is executed.

Based on the new part shape (enlarged part shape) obtained by manipulating the part shape, it is determined whether it can be placed on the board (step 24). If it is determined that it cannot be placed, it is placed at another possible position. Step 2 to determine whether there is
5) If there is no part shape, the part shape operation is performed again (step 23).

In this case, the shape of the part is manipulated so that it can be placed.

2. If placement is possible in step 24, check whether all placement target parts have been completed (step 26). As a result, if all the parts to be placed have not been completed, the process returns to the calculation of the optimal placement surface/position (step 22), and when all the parts to be placed are completed, the process ends.

FIG. 3 is a processing flow for manipulating a part shape according to the present invention, and this processing shows the details of the operation performed in step 23 of FIG. 2 above.

The contents will be explained with reference to FIGS. 4 and 5.

First, in step 30, it is determined whether the shape is to be changed. In this case, it is determined in advance whether there is an instruction to change the shape. Here, it is assumed that a change instruction has been given, and then the part shape and pin arrangement are checked (step 31). In this case, the parts are placed in step 22 of FIG. 2, and the placed part data, shape data, etc. have been read in advance in step 20, so the data is referred to and examined.

Figure 4A shows an example of the shape of the part and the direction of the pins. , you can see that there are two rows of pins lined up on both sides of the left and right sides under L. In addition, this i.

The part of the part surrounded by the dotted line (the area of the part body and the pin) is called the original part shape, and that area is called the original part shape area.

Next, it is determined whether the component (pin) is aligned with the component to be connected (step 32). - If the part is not lined up in the line, proceed to step 35, determine whether the part has been previously specified as a part that requires enlargement, and if it has not been specified, end this process, and if enlargement is necessary, step Move to 36.

If they are lined up in a line, the direction in which the pins of that part are lined up and the number of bins are checked (step 33).

That is, in the example shown in FIG. 4A and A, it is identified that the pins of the part are arranged in two rows in the Y-axis direction as shown in A, and in the example of Two rows of six pins are identified in both the axial direction and the Y-axis direction.

Next, it is determined whether there is a pin in the same direction as the wiring direction of the layer in which the component is placed (step 34). This determination is based on whether the wiring track (channel) provided on the layer (substrate) is in the X direction shown in Figure 4B,
or , and identify whether there is a pin in the same direction as the wiring track.

To explain with reference to FIG. 4 C1 and D, the pin arrangement direction and the direction of the track (the wiring layer on the board) are orthogonal (=
・When there is -ζ, as shown in C1 in the normal case, each pin can be connected to a pin of another component by a track, so in this case, it is determined NO in step 34, Proceed to step 35. On the other hand, D.
In the case of , the wiring direction of the layer (+- rack) and the pin arrangement are the same as shown in A. An example will be given and we will move on to the next step 36.

In this step 36, the number of pins and the average tangent of the pins 5 The number of continuation trees is checked and the required wiring capacity is calculated.

In other words, to explain using the example of Figure 4, for the original component shown in Figure A, in order to connect each pin to the trunk in the Y-axis direction and to the other component pin, each pin must be set to a different 1-rank. Need to connect. To do this, allocate three trunks (one track can be divided and used) for the six pins on the right side, as shown in Figure 3. These three tracks constitute the required wiring capacity.

A specific example of this trunk capacity calculation standard is shown in FIG. 5A.

The capacitance is determined according to the number of mating pins connected to one pin, and when the average number of connected lines is 2 as in A, the capacitance is 1 to 6 for 6 pins, and the ,
When the average number of connected lines is 1, the capacity of 1 minus the rack is 3. This track capacity can be calculated using the following formula.

Track capacity - (number of pins x average number of connection lines per pin) ÷ 2 Next, the pin area is expanded in accordance with the wiring capacity obtained in step 36 (step 37).

In the example shown in Figure 4, the three assigned 1-racks are the number of tracks required to complete the wiring when this component is placed on this track. Four calculations are performed using the area of three tracks occupied by the part (only one side is shown, but there is a similar area on the opposite side) as an enlarged area.

In this case, there are several methods for determining the wiring capacity (area corresponding to the number of trunks) for the number of tracks.
It can be selected as appropriate. In the case of A in Figure 5B,
This is an example of a case where track positions are provided on fixed coordinates. In this case, a plurality of (two in the figure) main wiring tracks (channels) are fixedly arranged for a sub wiring track (channel), Tracks are provided in such a manner that the order is repeated. In this case, once the required trunk capacity is determined, the required wiring area is uniquely determined.

Next, the case shown at the beginning of FIG. 5B is an example of calculating the track position of the required distance from the pin.

In this example, we determine the required gap from the pin to the wiring I rank and the line width of the wiring I rank, and set up a virtual trunk (2 designs), and if the trunk capacity is n, then r
The wiring capacitance is determined by '+ and X (necessary gap and line width).

Once the wiring capacitance is determined in this way, the pin area is expanded in step 37 in FIG. This expansion of the pin area is performed by expanding the original component area (see FIG. 4A) by using an area corresponding to the wiring capacitance determined above as the pin area.

The pin area can also be expanded in a distributed manner between a layer where components are mounted and other layers.

FIG. 6A shows an example of the distribution of the enlarged area to multiple layers. In this example, when the capacity for three tracks is expanded by two layers, as in the fourth diagram, Figure 6A
, the first layer shown on the left side is enlarged by one trunk, and the corresponding pin in the fifth layer shown on the right side (connected to the first layer through a through hole) is enlarged by two tracks.

Next, in step 38 of FIG. 3, it is determined whether or not the wire intersects with the prohibited wiring area by examining data such as design data and layout drawings (created in step 22 of FIG. 2).

Prohibited wiring areas are areas where areas for wiring such as pins and squares (including enlarged areas) intersect with component areas that generate heat or where signal lines that may cause crosstalk occur. be. When the intersection with this wiring prohibited area is detected, in the next step 39, the pin area is further enlarged so that the invalid wiring capacitance can be secured.

An example of this is shown in FIG. 6B. In other words, if the expanded pin area for one row is the prohibited area as shown in A.
Expansion outside the prohibited area is performed as shown in . The enlargement process in this case is performed in the same manner as steps 36 and 37 above.

In this way, the pin area expanded by the obtained wiring capacitance is ORed with the original component shape in step 40, and as a result, a new component shape (region) is obtained.
This process ends.

9. It goes without saying that the processes from step 24 onwards in the process flow of FIG. 2 are performed based on the part shape obtained through this process.

[Effects of the Invention] According to the present invention, in automatic component placement processing, wiring tracks for component pins to be placed can be secured and automatic placement can be performed, so it is possible to improve the wiring rate in automatic wiring. .

0 1 Design/component data 12: Part shape operation section 13: Part shape/pin arrangement and direction identification means 14: Pin connection number calculation means 15: Pin area expansion means 16; Intersection with wiring prohibited area identification means 17 : Prohibited pin area enlarging means 18: Enlarged part shape calculating means

[Brief explanation of the drawing]

Fig. 1 is a diagram showing the basic configuration of the present invention, Fig. 2 is a processing flow diagram of an embodiment, Fig. 3 is a flow diagram of a part shape manipulation processing of an embodiment, and Fig. 4 is a diagram of the pins, tracks, and mutual relationships of the parts. FIG. 5 is an explanatory diagram of the relationship between track capacitance and wiring capacitance,
FIG. 6 is an explanatory diagram of the distribution of multiple layers and prohibited areas, and FIG. 7 is an explanatory diagram of a conventional example. During the 1st session, 10: Component placement processing department

Claims (1)

[Claims] An automatic component placement processing method for automatically placing components such as circuits and elements on a board, comprising: a component placement processing unit (10) that calculates appropriate placement of components;
The part shape operation section (12) identifies the part shape, the arrangement and direction of the pins by the identification means (13), and calculates the number of connected pins according to the identification result (14). )
The number of pins connected is calculated in , and the pin area expansion means (15
), the intersection with the wiring prohibited area is identified by the intersection identification means (16), the invalid expanded pin area (171) is calculated by the prohibited pin area expanding means (17), An automatic part placement processing method characterized in that a part shape is obtained by adding the area of the original part shape, the enlarged pin area and the invalid enlarged pin area.