JPH03119829A - D/a converter - Google Patents

Abstract

PURPOSE:To heighten the control accuracy and stability of a digital control system with the limited number of bits by switching the resolution of D/A conversion corresponding to the value of a digital input signal, and especially, heightening selectively the resolution of the D/A conversion in the neighborhood of a control set point. CONSTITUTION:A conversion characteristic switching means 106 is comprised so as to heighten the resolution of the D/A conversion selectively in a central part of D/A conversion are, especially in the neighborhood of the control set point Ds. In such a way, by switching the resolution of the D/A conversion corresponding to the value of a digital signal Din, the control accuracy in the neighborhood of the set point Ds is heightened relatively, and a control operation to make a detection value Dm focus on the set point Ds is performed with high accuracy and high stability.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a technology that is effective when applied to a DA converter, and furthermore, a DA converter for control. The present invention relates to an effective technology that can be used in a DA converter.

[Prior Art] For example, the motor that drives the drum or capstan of a VRT needs to be controlled with high precision by a digital control system using a microcircuit-based general-purpose information processing device, so-called a microcomputer.

This digital control system includes, for example, as shown in FIG. 4, a measurement system 102 that detects the control amount of a controlled system 101 such as a motor and outputs it as a digital value Dm, and a digital detection value Dm of this measurement system 102. A calculation unit 10 that outputs a manipulated variable as a digital value Dp that corrects the deviation from the target value Ds.
3, converts the digital operation value Dp (digital input signal D i, n ) of this calculation unit 103 into an analog operation value Ap (analog output signal Aout) and converts it into the controlled system 10
It is composed of a DA converter 104 and the like that feeds back the signal back to 1.

In this way, by digitizing the control processing, it becomes possible to perform highly accurate control using a microcomputer. face).

[Problems to be Solved by the Invention] However, the inventors have found that the above-mentioned technique has the following problems.

For example, in the digital control system described above, as shown in FIG. 5, the change pitch (ΔA) of the analog signal Aout with respect to the change in the digital input signal Din.

ut/ΔDin), that is, the resolution of the DA converter 104 was the same over the entire conversion range of DA conversion,
As shown in FIG. 6, there remained a problem in the accuracy and stability of control for converging the detected value Dm to the target value Ds.

One possible solution to the above-mentioned problem is to increase the number of bits of the DA converter, but in this case, another problem arises: the configuration becomes complicated and the cost increases.

An object of the present invention is to improve the control accuracy and stability of a digital control system with a limited number of bits.
Our goal is to provide this technology.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means for Solving Problem R] A summary of typical inventions disclosed in this application is as follows.

That is, the resolution of the DA conversion is switched according to the value of the digital input signal, and the resolution of the DA conversion is selectively increased especially around the control target value.

[Operation] According to the above-mentioned means, by switching the resolution of DA conversion according to the value of the digital input signal, the control accuracy in the vicinity of the target value is relatively increased and the detected value is focused on the target value. The operation can be performed with high precision and high stability.

This achieves the objective of increasing the control accuracy and stability of the digital control system with a limited number of bits.

[Examples] Hereinafter, preferred embodiments of the present invention will be described based on the drawings.

In each figure, the same reference numerals indicate the same or corresponding parts.

FIG. 1 shows a schematic configuration of a DA converter according to an embodiment of the invention, in which reference numeral 101 indicates a controlled system such as a motor;
102 is a measuring system that detects the controlled variable of the controlled system 101 and outputs it as a digital value Dm, and 103 is a measuring system that digitally detects the controlled variable of the controlled system 101 and outputs it as a digital value Dm. A calculation unit 105 that outputs the value DP converts the digital operation value Dp (digital input signal Din) of the calculation unit 103 into an analog operation value Ap (analog output (No. 1 A
out) and fed back to the controlled system 101.
The A converter 106 is a conversion characteristic switching means that switches the resolution of the DA converter 105 in accordance with the value of the digital input signal Din.

Here, as shown in FIG. 2, the conversion characteristic switching means 106 is configured to selectively increase the resolution of the DA conversion in the central part of the DA conversion area, particularly in the vicinity of the control target value Ds. .

In this way, by switching the resolution of the DA conversion according to the value of the digital signal Din, as shown in FIG. The control operation for focusing on Ds can be performed with high precision and high stability.

FIG. 7 shows a specific embodiment of the above-mentioned DA converter 105.

The DA converter 105 shown in the figure includes a latch circuit 1 that temporarily holds a digital signal Din input in parallel, and a parallel digital signal Din (Do~
P/S converter (parallel/serial converter) that converts D4) into a serial digital signal Din2. A digital signal Di is input serially from this P/S converter 2 one bit at a time.
n to the analog signal A by a switched capacitor.

DA conversion unit 3. which converts to ut. The reference potential generating circuit 4 generates the high side reference potential VH and the low side reference potential 1- of the DA converter 3 from the reference potential (ground potential: OV) and the reference potential (ground potential: OV). Multiphase clocks φ1 to φ for sequentially controlling the operation of switched capacitors
6 based on the reference clock CLK and the value (d4.d3) of the digital signal Din.

The logic circuit 5 generates a clock φ2. based on the value of the potential 2 bits (d4.d3) of the digital input signal Din. φ3.
By logically controlling the generation of φ4, it functions as a conversion characteristic switching means 106 that changes the change pitch, so-called resolution, of the output value with respect to the input value of the DA converter 3 according to the value of the digital input signal Din. .

The reference voltage generation circuit 4 includes resistors R and R1 that divide the power supply potential vDD, a changeover switch circuit 41, and the like, and has a high-side reference potential VH applied to the highest pitch DA converter 3 of the digital input signal Din and a low-side reference potential VH. The reference potential VL is configured to be switched between Voo and V n D/2 or Vo I)/2 and 0■.

FIG. 8 shows an example of the configuration of the DA converter 3. As shown in FIG.

The DA converter 3 includes switch circuits 5o-85 controlled by multiphase tarlocks φ1 to φ6, capacitors C1 to C4, and buffer circuits 31. It is composed of a sample and hold circuit 32, and the like.

The switch circuit SO receives the value of the digital signal Djn ('"1" or II OIT
), the high side group middle potential V14 and the low side reference X1 position V[
, select one. When the manual bit is 1'', the high side reference potential VH is selected, and when it is ++011, the low side reference potential 110++ is selected.

The switch circuit S1 is turned on (ON) IIJ for each 1-bit input of the digital signal Din. When the switch circuit S1 is turned on, the high-side reference potential VH or the low-side reference potential VL selected by the switch circuit SO is applied to the capacitor C1.

Switch circuits S2 and C4 are normally in the on state and connect capacitors C1 and C2 and C3 and C4 in parallel, respectively, but when the upper two digits (d3) are input, It is selectively driven off in accordance with the value of the second most significant bit (d3).

The switch circuit S3 is turned on alternately after the switch circuit S1 is turned off for each bit input. However, when inputting the second most significant bit (d3), that bit (
It is linked to C2 or C4 depending on the value of d3).

The switch circuit S5 includes a digital signal Dj for one word,
After all bits of n (dQ-d4) have been input and the potential of C4 at this time is output by the sample and hold circuit 32, it is turned on together with C4, and C
3. Completely discharge the charge on C4. That is, a reset operation is performed every time one word is input.

Here, the capacitance values of capacitance +, tC1, C2, C3, and C4 are set to the same size.

Furthermore, in the embodiment, the value of the first significant digit, that is, the most significant bit (d4) is the reference potential V of the reference potential generation circuit 4.
++ and ■1. ．． vI) r) and V r> o/2
Or used to switch to V o /2 and Ov.

It is not input to the DA converter 3 using a switched capacitor. Therefore, in the digital signal Din that is serially input to the DA converter 3 one bit at a time, the second bit (d3) from the most significant bit becomes the final bit.

Next, the operation of the above-mentioned DA converter will be explained.

FIG. 9 shows (00001)2 as a digital signal Din.
The operation when 5-digit binary data having a value of

Further, FIG. 10 shows, in a waveform diagram, the operations shown stepwise from A to J in FIG. 9.

In this case, first, since the most significant bit (d4) is L (O++), when the digital signal Din is input in parallel,
The high side reference potential VH is V Do / 2, and the low side reference potential VH is
The digit V+ is selected as OV.

Next, among the digital signals Din input in parallel, 4 bits (d3, d2.di) excluding the most significant bit (d4)
, do = "0001'") is converted into a serial signal,
When the least significant bit (do="1") is input, since the value of this input bit do is 1'1''',
Switch circuit S1 selects high-side reference potential VH. As a result, the capacitances g, C1, and C2 are set to the high side potential VH (VH=VD
D/2) L: Charged (A in Figure 9).

The charges charged in the capacitors C1 and C2 are transferred to the switch circuit S3.
According to capacitances C1, C2 and capacitance lc3. It is equally distributed between C4 and C4. As a result, the charging potential of the capacitors C3 and C4 becomes 1/2 of the high-side reference potential VH, that is, VH/2 (B in FIG. 9).

Next, when the second digit bit (d1 = "O") is input, the value of this manual bit d1 is II OII, so the switch circuit S1 is set to the low side reference potential VL.
(VL=O). As a result, the capacitance C1,,C
2 is discharged to 0 (zero) potential (after this, the capacitance C3
, C4 are again equally distributed between the capacitors C1, C2 and the capacitors C3°C4 by the switch circuit S3. Then, the potential of the capacitor c3°C4 is further reduced to 1/2 to VH/4 (D in FIG. 9).

Next, when the third digit bit (d 2 = "0") is input, the value of this input bit 2d is also II O11, so the capacitors C1 and C2 are discharged to the O potential this time as well. (E in Figure 9).

As a result, the potential of capacitors C3, C4 is further reduced by 1/2.
is reduced to V H/8 (F in Figure 9).

Next, the fourth digit bit, that is, the final bit (d3=”
O''') is input, the value of this input bit d3 also becomes “
O", the switch circuit S1 selects the low-side reference potential VL (VL=O). However, in this case,
Since the value of bit d3 in the fourth digit is '0'',
The switch circuit S1 selects the low-side reference potential vL while the switch circuit S2 is turned off. As a result, the capacitor C1 is separated from 02, and only the capacitor C1 is discharged to 0 potential (G in FIG. 9).

After this, the switch circuit S1 is turned off, and S2. Turn on S3 and charge the capacitors C2, C3, C4 to C1, C2.
, C3, and C4, the potential of capacitor C4 is 3 V
H/32 (H in Figure 9).

As described above, the 5-bit digital input signal Din
Due to the lower 4-bit data value "OOO1"' of (Din="00001'"), a potential of 3/32 of the high-side reference potential VH remains in the quantity C4. Furthermore, a 5-bit digital input signal Din (Din=“OO
OO1”), the data value of the most significant 1 bit (d
4 = “O”) by high side group 4! Potential VH is vD
By being selected as D/2, it was finally 3 V Do.
/ 64 potential remains in capacitor 1c4, and this residual potential 3
V o o /64 is the digital input signal Din (
Analog output signal Ao for Din=OOOO1)2
It is output as ut (1 in Figure 9).

Thereafter, the switch circuit S5 is turned on together with 84, and the charges in the capacitors C3 and C4 are completely discharged, thereby performing a reset for AD converting the next word of digital input signal again (9th Figure J).

Figure 11 shows the digital signal Din (01001)
The operation when 5-digit binary data having values of , , and , is input is shown in stages A to J.

Further, FIG. 12 shows, in a waveform diagram, the operations shown in steps A-J in FIG. 11.

In this case, the third digit (do,
d1. The operations up to d2) are the same as those shown in FIGS. 9 and 10, so their explanation will be omitted (A-F in FIG. 12).

When the fourth digit (d3) is input, this fourth digit (d
3) is 1", the switch circuit S1 selects the high side group 7 strike point V u with the switch circuit S2 on and 84 off. This causes the capacitance C
3 is connected in parallel to the capacitors C1 and C2, while the capacitor C4
is disconnected from the C3 side6, that is, the capacitances C1, C2,
C3 is charged to the high side reference potential V++ (G in Figures 1-2).

As a result, switch circuit S2. S3. When the charge is equally distributed by S4, the charging potential of capacitor tc4 becomes 25
It becomes VH/32. And this C4(7) charging potential 25 V ++ / 32 or 25 V.

o/64 is the digital input signal Din (Din=0
1001), is output from the sample and hold circuit 32 as an analog output signal Aou1 (H in FIG. 12), and then the first-order one-word digital input signal is ΔD-converted again by turning on the switch circuit S5. is reset (J in Figures 1-2).

As a result of the above operations, as shown in FIG.
The conversion resolution is switched according to the value of the digital input signal Din, and a conversion characteristic is obtained in which the DA conversion resolution (ΔAout/ΔDjn) is selectively increased, especially near the center of the conversion region.

As a result, in digital control systems, it is possible to relatively increase control accuracy near the target value, and perform control operations that focus the detected value on the target value with high precision and high stability. The control accuracy and stability of the digital control system can be improved by increasing the number of control systems.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor.

For example, the capacity of a switched capacitor:! 1tc1~C
The combination of 4 can be changed in various ways.

In the following explanation, the invention made by the present inventor is mainly applied to a switched capacitor type DA converter, which is the field of application that forms the background of the invention, but the invention is not limited thereto. For example, it can be applied to a current addition type DA converter.

[Effects of the Invention] The effects obtained by typical inventions disclosed in this application are as follows.

In other words, it is possible to improve the control accuracy and stability of the digital control system with a limited number of bits.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a DA converter according to an embodiment of the present invention, and FIG. 2 is a diagram showing conversion characteristics of the DA converter shown in FIG. 1. FIG. 3 is a diagram showing control characteristics of a digital control system using the DA converter shown in FIG. 1. FIG. 4 is a block diagram showing the general configuration of a conventional DA converter. FIG. 5 is a diagram showing the conversion characteristics of the DA converter shown in FIG. 4. 6 is a diagram showing the control characteristics of a digital control system using the DA converter shown in FIG. 4, FIG. 7 is a circuit diagram showing a specific example of the configuration of the DA converter shown in FIG. 1, FIG. 8 is a circuit diagram showing the L main part of the I) A converter shown in FIG. 7. FIG. 1 is a diagram illustrating the operation example of No. 1 step by step. 10 is a diagram showing waveforms of the first operation example shown in FIG. 9; FIG. 12 is a diagram showing waveforms of the second operation example shown in FIG. 10; FIG. 1-:3 is a diagram showing the conversion characteristics of the DA converter shown in FIG. 7. 101... Controlled system, 102... Measurement system, 10
3... Arithmetic unit, 1.05... DA converter, 10
6... Conversion characteristic switching means, 1... Latch circuit, 2
...Parallel/serial conversion circuit, 3...D
A conversion unit, 4...Reference potential generation circuit, 5...Logic circuit, SF-~S5...Switch circuit, C1-C
4...Yongze, 31...Buffer circuit, 32...
Sample hold circuit, I) in...digital person chi4so, Aou+,...analog output signal. ■ Figure 2 1 Figure Figure 2 1 Poem Figure Figure Figure 2

Claims (1)

[Scope of Claims] 1. A DA converter that converts a digital signal into an analog signal, the DA converter comprising conversion characteristic means for switching the resolution of DA conversion according to the value of a digital input signal. 2. A DA converter characterized by comprising conversion characteristic switching means for selectively increasing the resolution of DA conversion in the central portion of the DA conversion area. 3. DA conversion is performed by a switched capacitor, and the resolution of the DA conversion is switched by switching the capacitance of the switched capacitor according to the value of a digital input signal, or DA converter according to item 2.