JPH0310144B2 - - Google Patents

Description

Detailed Description of the Invention (A) Technical Field of the Invention The present invention relates to an improvement in an optical character recognition device that recognizes and processes pixel information detected as a pixel pattern of a bit structure, and particularly The present invention relates to realizing a character recognition device that quickly and efficiently sets a clipping frame for clipping character information.

(B) Background of the Prior Art Conventionally, optical character recognition devices (commonly referred to as OCR devices) optically read characters written on a medium, store them as a set of binarized pixels, so-called video information, and By pre-processing the information such as noise removal, normalization, cutting out, etc., and comparing it with various feature dictionaries, character recognition is performed and data processing as recognized characters becomes possible. The recognition process and procedures of these OCR devices are
Most of the processing is done by computers (commonly known as CPUs). Then, the task of cutting out the characters is to find out in which address area on the image memory the characters that have been read out and recorded as binary image information on the image memory exist, and to The purpose is to determine the boundary address of the area from which data is to be retrieved, and for this purpose, the image memory surface as shown in Figure 1:
In the virtual character frame area that is _large enough to contain the character in the area that extends to X 0 _, Y 0 , If we name the one taken as the horizontal flag and the one taken with the OR of the Y address component as the vertical flag, we will create a horizontal flag and a vertical flag, and the data bits of each created flag will be the address where it changes first and the address where it changes last. The purpose of this task is to find a quadrilateral that circumscribes a character formed by an address interval of Since the data at the previous address is compared with the data at the current address, this task alone takes up a considerable amount of processing time. Therefore, the overall processing time in the character recognition device has become long.

(C) Characteristics of purpose The present invention was made in view of this background, and its purpose is to provide a character recognition device that can perform character segmentation quickly and efficiently, and has improved recognition processing speed. .

Then, the present invention selects a predetermined reading area from the image information stored in the image memory pixel by pixel, determines the area where a character image exists in the area, and performs character recognition from the image included in the area. The device comprises: a circuit that scans a selected reading area; a circuit that obtains a result of ORing image signals read out in the horizontal direction as the circuit scans in the vertical scanning order; A circuit that obtains the result of ORing in the horizontal scanning order, and a circuit that compares the horizontal and vertical OR signals obtained by the above circuit in each scanning order and detects the change point of the signal in the signal string. and,
A hardware processing circuit comprising a memory that stores the change point in each reading area by adding a scanning address; and a hardware processing circuit that uses the change point information stored in the memory independently of the hardware processing circuit. The apparatus includes a program-controlled computer that performs character image recognition processing.

(D) Embodiment FIG. 1 is a conceptual explanatory diagram of the present invention, and is an explanatory diagram of a memory area of an image memory, a virtual character frame, a vertical flag, a horizontal flag, etc., and corresponding addresses.

FIG. 2 shows a block diagram of the high-speed extraction circuit of the present invention. In the figure, 1 is an image memory that stores the read out pixel-by-pixel black and white information, X and Y are addresses of the image memory, X ₀ and Y ₀ are the starting points of the address, and n and m are X and Y, respectively. This is the number of bits in the direction. Moreover, 1b is a virtual character frame, Xi,
Yj is the starting point address of the virtual character frame in terms of image memory coordinates, l and k are the numbers of bits in the X direction and Y direction, respectively, and i and j are designated for each virtual character frame by the control unit. 1c is a character cutting frame, 1V
is a horizontal flag, and 1H is a vertical flag.

For convenience of explanation, address scanning of the image memory 1 is assumed to be a horizontal raster type in which the image memory 1 is scanned in the X direction and then scanned one step in the Y direction. 2 is an address generation circuit for address scanning, 3V is a horizontal flag 1V
3H is a horizontal superposition circuit for generating the vertical flag 1H, 4 is a vertical superposition circuit for generating the vertical flag 1H.
5 is a change point detection circuit that detects a change point when the bit changes in scanning order from the horizontal flag and the vertical flag;
In order to determine the address of each two change points for determining the character cutting frame in the virtual character frame from the change point signal detected in 4 above, the change points are made to correspond to each other in the scanning order, and the address form is determined. Memory for storing the change point table stored in , 6 is X, Y
This is a multiplexer that switches scanning. The above-mentioned parts 2 to 6 are dedicated hardware processing circuits, and the values of the displacement point table are detected by the processing circuits and stored in the memory in the form of addresses in the computer of a device not shown. is supplied from the displacement point table 5 in response to a request at the time of recognition, so the computer itself does not need to perform change point detection, which is the majority of the work for determining the cutting frame. For this reason, the computer performs a process of determining a cutting frame based on the detected change point and recognizes the character, and the processing circuit performs the process of detecting change point information of the virtual character frame to be recognized next. It can be done by

The above processing circuit will be explained in more detail with reference to FIG. 3 and subsequent figures.

FIG. 3 shows a generating circuit corresponding to 2 in FIG. FIG. 4 shows a horizontally superimposed circuit corresponding to 3 in FIG. FIG. 5 shows a vertically stacked circuit corresponding to 3 in FIG. FIG. 6 shows a displacement point detection circuit corresponding to 4 in FIG. FIG. 7 is an explanatory diagram of a memory that stores displacement point tables corresponding to 5 and 6 in FIG. 2.

In FIG. 3, 2a is an H register, 2b is a V register, 2c and 2d are adder circuits that add +1 to each register, 2e is a register that sets the number of bits in the X direction of the virtual character frame to 1, 2f is a comparator, 2i is a register that stores the address coordinates Xi considered in the image memory coordinates of the starting point of the virtual character frame, and 2j is a register that stores the bit width n in the X direction of the image memory at the address coordinates Yj.
The register that stores nYj multiplied by , 2h is the above
An adder circuit 2k registers the number n of bits in the Y direction of the image memory in the nYj register.

To add more information about the part in Figure 3, Xi register 2
The starting point of the virtual character frame is set in the i and nYi registers 2j by the computer, the register 2e stores the number of expansion bits in the X direction, 1, and the H register 2a
and V register 2b are cleared at the start of the work in which the virtual character frame is set. The H register 2a is clocked by the clock H, and the adder 2C counts the number of pixels to be scanned. Therefore, scanning is performed in the X direction, and when the number of scans reaches the width of the virtual character frame in the X direction, a match is found in the comparator 2f, and as a result, a clock V is created and the H register is cleared and the V register is 2b is + by the adder 2d
Move one step forward. In this way, the address to be scanned in the virtual character frame is taken out as relative address information indicated by the V and H signals with Xi and Yj as the starting points, and Xi stored in the Xi register 2i and Yj
The adder 2k adds the value obtained by multiplying the address by n to convert it into an absolute address of the image register and take it out as an image memory address.

In Figure 4, 3V1 is an OR circuit, and 3V2 is a flip-flop (FF), and in operation, the memory output that is addressed and read from the image memory is set to FF, which is ORed with its own output stored in 3V2. be done. That is, since the OR of the previous scan bit is set to FF, 3V2, it is set to [1] when the memory output becomes [1] even once. Therefore, a horizontal flag can be created since it will hold itself from now on. Note that FF is reset at the beginning of each line, that is, by inputting clock V.

Further, 3H1 in FIG. 5 is an OR circuit, 3H2 is a one-stage shift register, and the shift amount corresponds to one width of the virtual character frame. In operation, each time the previous virtual character frame is scanned and read, it is shifted by the clock H, and an OR circuit with the memory output is set. In other words, the output of the shift register corresponds to the same X address of the previous line, and by sequentially comparing the memory output with the value at a predetermined position of the shift register and rereading, the memory output becomes [1] at least once. If so, [1] is held at the shift register position corresponding to the X address. A vertical flag is thus recorded in each bit of the shift register.

In FIG. 6, 4a is a multiplexer, 4b and 4c are FFs, and 4d is an exclusive OR (Eor) circuit. In operation, when calculating the displacement point signal of the horizontal flag, the multiplexer 4a selects the clock V and the horizontal flag signal sent from the horizontal superposition circuit 3V. The horizontal flag signal on the front line is
held by FF, 4c, while FF, 4b
The horizontal flag signal of the line currently being scanned is input to. Then, when the clock V, that is, the line is updated, the horizontal flag signal is transferred from FF, 4b to FF, 4c, while it is transferred to the Eor circuit 4d, and the horizontal flag of the previous line is also output from FF, 4c by the clock V. compared to the signal, FF, 4b
When there is a change in the contents of and 4c, a displacement signal [1]
Output. This indicates that the horizontal flag has changed. The position address is obvious because it is indicated by the synchronously scanning Vs.

Further, to detect the displacement point of the vertical flag, the multiplexer 4a selects the clock H and the vertical flag sent from the vertical superposition circuit 3H, and when the virtual character frame is finally scanned, the vertical flag stored in the previous shift register 3H2 is selected. The flag signals are sequentially captured and scanned, and the two-stage
By inputting it to FF, a vertical displacement point signal can be obtained in the same way as for the horizontal flag. At this time,
The position address of the displacement is indicated by V, which is also synchronously scanning.

The operation shown in FIG. 7 will be explained. The displacement point table storage memory 5 has a configuration in which data is sequentially written from the top address in response to a write signal. First, the displacement point information of the horizontal flag is detected by the displacement point detection circuit 4 shown in FIG.
This is output when there is a change when updating the line. At this time, if the value V indicating the line position is used as write data and the displacement point signal is used as a write signal, only the position address where the horizontal flag has been displaced is set in the table memory. In addition, when scanning the final line, by writing the H value indicating the horizontal scan position as displacement information of the vertical flag and using the displacement point signal as a write signal, only the position address where the vertical flag has been displaced is displayed in the table. set in memory. Here, the horizontal and vertical displacement information may be identified in separate tables, or side bits may be added to the table so that the computer can identify them later.

By reading the data stored in the table in this way from a computer, characters can be easily cut out. In other words, if you calculate the first displacement value and the last displacement value, both horizontally and vertically, those values are the information on the outer frame of the character itself. Naturally, the computer can obtain the value of this displacement point in a very short time by referring to the table.

Therefore, the computer that has obtained this displacement point information sets the starting point of the virtual character frame of the next character to be recognized in the Xi register 2i and Yi register 2j of the processing circuit, and then uses the character for which the displacement point information has been obtained. The processing circuit may perform character recognition processing, such as by comparing with a feature dictionary, in parallel with processing for detecting displacement point information of the next character.

For this reason, in the character recognition device of the present invention, the process of detecting displacement point information by scanning the image memory, which is not suitable for program-controlled computers (processing speed is slow), is performed by the above-mentioned processing circuit, which is hardware. Not only does this speed up the process, but because parallel processing is performed as described above, a series of character recognition processes can be significantly speeded up.

[Brief explanation of the drawing]

FIG. 1 is a conceptual explanatory diagram of the present invention. FIG. 2 is a block diagram of the high-speed extraction circuit of the present invention, FIGS. 3 to 7 are detailed explanatory diagrams of each block in FIG.
The figure shows an address generation circuit for scanning. Figure 4 shows a horizontally superimposed circuit. Figure 5 shows a vertically stacked circuit. Figure 6 shows the displacement point detection circuit. FIG. 7 shows a memory that stores a displacement point table. In the figure, 1 is the image memory, 1b is the selected virtual character frame, Xi, Yj are the origin coordinates of the character frame, 1c
is a character cutting frame, 1V is a horizontal flag, 1H is a vertical flag, 2 is a scanning address generation circuit, 3V is a horizontal overlapping circuit, 3H is a vertical overlapping circuit, 4 is a displacement point detection circuit, 5 is a displacement point table Storage memory 6 is a multiplexer.

Claims (1)

[Claims] 1. Image information stored pixel by pixel in an image memory is read by selecting a predetermined area, determining an area where a character image exists within the area, and recognizing characters from the image included in the area. a circuit for scanning the selected reading area;
a circuit that obtains the results of ORing in the horizontal direction of the image signals read out as the circuit scans in the scanning order of the vertical direction; a circuit that obtains the results of ORing the image signals in the vertical direction in the scanning order of the horizontal direction; A circuit that compares OR signals in the horizontal and vertical directions obtained by the circuit in each scanning order to detect a change point in the signal of the signal string, and a scan address at which the change point is detected for each reading area. a hardware processing circuit constituted by a memory for storing data, and a program-controlled computer that performs character image recognition processing using the change point information stored in the memory, independent of the hardware processing circuit. A character recognition device characterized by: