JPH0279450A - Hybrid integrated circuit - Google Patents
Hybrid integrated circuitInfo
- Publication number
- JPH0279450A JPH0279450A JP23072688A JP23072688A JPH0279450A JP H0279450 A JPH0279450 A JP H0279450A JP 23072688 A JP23072688 A JP 23072688A JP 23072688 A JP23072688 A JP 23072688A JP H0279450 A JPH0279450 A JP H0279450A
- Authority
- JP
- Japan
- Prior art keywords
- hybrid integrated
- circuit
- integrated circuit
- substrate
- resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229920005989 resin Polymers 0.000 claims abstract description 26
- 239000011347 resin Substances 0.000 claims abstract description 26
- 230000003014 reinforcing effect Effects 0.000 claims abstract description 20
- 238000010292 electrical insulation Methods 0.000 claims abstract description 6
- 239000000758 substrate Substances 0.000 claims description 43
- 230000015572 biosynthetic process Effects 0.000 claims description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 abstract description 8
- 239000000463 material Substances 0.000 abstract description 8
- 230000008859 change Effects 0.000 abstract description 6
- 238000000465 moulding Methods 0.000 abstract description 5
- 239000004020 conductor Substances 0.000 abstract description 2
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 230000000694 effects Effects 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 238000005452 bending Methods 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 238000002347 injection Methods 0.000 description 4
- 239000007924 injection Substances 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 238000005336 cracking Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 239000013589 supplement Substances 0.000 description 2
- PEDCQBHIVMGVHV-UHFFFAOYSA-N Glycerine Chemical compound OCC(O)CO PEDCQBHIVMGVHV-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 229920006127 amorphous resin Polymers 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000009477 glass transition Effects 0.000 description 1
- JVPLOXQKFGYFMN-UHFFFAOYSA-N gold tin Chemical compound [Sn].[Au] JVPLOXQKFGYFMN-UHFFFAOYSA-N 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
【発明の詳細な説明】
〔概要〕
樹脂外装をモールド手段で形成した混成集積回路の構成
に関し、
樹脂外装の形成時に発生する基板の変形を抑制する構造
とし、混成集積回路の性能および信頼性を向上させるこ
とを目的とし、
回路素子を形成および搭載してなる絶縁基板の表面およ
び裏面の少なくとも一方に、該基板を覆う樹脂外装のモ
ールド形成に対する耐性および電気的絶縁性を有する帯
状の補強部材を設けたことを特徴とし構成する。[Detailed Description of the Invention] [Summary] Regarding the configuration of a hybrid integrated circuit in which a resin exterior is formed by molding means, the present invention has a structure that suppresses deformation of the substrate that occurs when forming the resin exterior, and improves the performance and reliability of the hybrid integrated circuit. A band-shaped reinforcing member is provided on at least one of the front and back surfaces of an insulating substrate on which circuit elements are formed and mounted, which has electrical insulation and resistance to molding of a resin exterior covering the substrate. It is characterized by the following features.
本発明は、装置の小形化、信頼性の向上、低価格化のた
めモールド手段で樹脂外装の形成された混成集積回路、
特に樹脂外装を形成させる際に生じる基板の変形を抑制
させる改良に関する。The present invention provides a hybrid integrated circuit having a resin exterior formed by a molding means in order to miniaturize the device, improve reliability, and reduce the cost.
In particular, the present invention relates to improvements in suppressing deformation of a substrate that occurs when forming a resin exterior.
一般に低圧トランスファモールドで樹脂外装の形成され
た混成集積回路は、樹脂の不定形塗装によって樹脂外装
を形成した混成集積回路より、小形かつ外形の寸法精度
が高く、信頼性に優れる等の特徴を有する。In general, hybrid integrated circuits with a resin exterior formed by low-pressure transfer molding have characteristics such as being smaller, with higher external dimensional accuracy, and superior reliability than hybrid integrated circuits with a resin exterior formed by amorphous resin coating. .
第６図は従来の混成集積回路を示す模式断面図であり、
混成集積回路１は、表面に導体パターンや膜構成の抵抗
素子および外部接続用端子等の回路素子（図示せず）を
形成し個別回路素子３を搭載したアルミナ基板２をステ
ージ４に搭載し、それらをステージ４と同一板材から形
成した多数のリード端子５の内側の端部と共に樹脂外装
置で被覆してなる。なお、図中の符号６は回路素子３を
基板２の形成回路に接続する金属細線、符号７は基板２
の形成回路とリード端子５とを接続する金属細線である
。FIG. 6 is a schematic cross-sectional view showing a conventional hybrid integrated circuit.
The hybrid integrated circuit 1 includes an alumina substrate 2 on which circuit elements (not shown) such as a conductor pattern, a film-structured resistance element, and an external connection terminal are formed, and on which individual circuit elements 3 are mounted, is mounted on a stage 4, and These and the inner ends of a large number of lead terminals 5 formed from the same plate material as the stage 4 are covered with a resin outer device. In addition, the reference numeral 6 in the figure is a thin metal wire that connects the circuit element 3 to the circuit formed on the substrate 2, and the reference numeral 7 is a metal wire that connects the circuit element 3 to the circuit formed on the substrate 2.
This is a thin metal wire that connects the forming circuit and the lead terminal 5.
［発明が解決しようとする課題〕
前記従来の混成集積回路１において、外装置は溶融樹脂
を射出して形成されるが、回路素子を形成および搭載し
た基板２は、一般に厚さ０．６３５ ｍｍのものを使用
しており、溶融樹脂の硬化収縮応力や溶融樹脂の射出圧
力によって変形するようになる。そして、該応力および
圧力をモールド方法によって低減させることは、使用す
る樹脂の基本的要求特性とそのモールド成形性との韮ね
合いから限度があり、実質的に不可能である。[Problems to be Solved by the Invention] In the conventional hybrid integrated circuit 1, the outer device is formed by injection of molten resin, but the substrate 2 on which circuit elements are formed and mounted generally has a thickness of 0.635 mm. It is deformed by the curing shrinkage stress of the molten resin and the injection pressure of the molten resin. Furthermore, it is virtually impossible to reduce the stress and pressure by a molding method because of the trade-off between the basic required characteristics of the resin used and its moldability.
そのため、基板２に形成した膜抵抗素子の抵抗値が変化
し、著しくは基板２が割れる等の問題点があった。かか
る問題点は、基板２を厚くして基板２の耐屈曲性を高め
ることで解決されるが、厚さ０．６３５ ｍｍのものに
換えて１ｍｍ程度に基板２を厚くしても耐屈曲性の改善
は不十分であり、十分の耐屈曲性を具備せしめるためさ
らに基板２を厚くすることは、混成集積回路１を大形化
させると共に、小径のスルーホールの形成が困難になる
等の新規問題点が発生する。As a result, the resistance value of the film resistance element formed on the substrate 2 changes, and there are problems such as the substrate 2 being cracked. This problem can be solved by increasing the bending resistance of the substrate 2 by making the substrate 2 thicker, but even if the substrate 2 is made thicker to about 1 mm instead of 0.635 mm, the bending resistance will not be improved. However, the improvement is insufficient, and making the substrate 2 even thicker in order to provide sufficient bending resistance will not only increase the size of the hybrid integrated circuit 1 but also make it difficult to form small-diameter through holes, etc. A problem occurs.
本発明の目的は、基板２の厚さを増すことなく耐屈曲性
を高め、混成集積回路の性能および信頼性を向上させる
ことである。An object of the present invention is to increase the bending resistance without increasing the thickness of the substrate 2, thereby improving the performance and reliability of a hybrid integrated circuit.
本発明の混成集積回路は、その実施例を示す第１図によ
れば、回路素子（図示せず）を形成し個別回路素子３を
搭載してなる絶縁基板２の表面に、基板２を覆う樹脂外
装置のモールド形成に対する耐性および電気的絶縁性を
有する帯状の補強部材１２を設けたことを特徴とする。According to FIG. 1 showing an embodiment of the present invention, the hybrid integrated circuit of the present invention covers the surface of an insulating substrate 2 on which circuit elements (not shown) are formed and individual circuit elements 3 are mounted. The present invention is characterized by the provision of a band-shaped reinforcing member 12 that has resistance to mold formation of a resin-covered device and has electrical insulation properties.
上記手段によれば、基板を厚くすることなく基板の機械
的強度を補強部材が補うため、樹脂外装をモールド形成
しても該基板の変形が抑制されるようになる。そのため
、該変形によって基板の割れることが皆無となり、基板
に形成した膜抵抗素子は抵抗値の変化が低減し、混成集
積回路の性能および信頼性を向上する効果が得られるよ
うになった。According to the above means, since the reinforcing member supplements the mechanical strength of the substrate without increasing the thickness of the substrate, deformation of the substrate can be suppressed even when the resin exterior is molded. Therefore, there is no possibility of the substrate cracking due to the deformation, and the change in resistance value of the film resistance element formed on the substrate is reduced, resulting in the effect of improving the performance and reliability of the hybrid integrated circuit.
以下に、図面を用いて本発明の実施例による混成集積回
路を説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Hybrid integrated circuits according to embodiments of the present invention will be described below with reference to the drawings.
第１図は本発明の第１の実施例による混成集積回路を示
す模式側断面図（イ）とその樹脂外装の一部分を除去し
た平面図（ロ）、第２図は混成集積回路の膜抵抗変化を
本発明方法と従来技術について対比させた図、第３図は
本発明の第２の実施例による混成集積回路の模式断面図
、第４図は本発明の第３の実施例による混成集積回路の
模式断面図、第５図は本発明の第４の実施例による混成
集積回路における補強部材の形成パターンを示す平面図
である。第１図、第３図〜第５図において、第６図の混
成集積回路と共通部分には同一符号を使用する。FIG. 1 is a schematic side sectional view (a) showing a hybrid integrated circuit according to a first embodiment of the present invention, and a plan view (b) with a part of the resin exterior removed, and FIG. 2 is a film resistance of the hybrid integrated circuit. Figure 3 is a schematic cross-sectional view of a hybrid integrated circuit according to a second embodiment of the present invention, and Figure 4 is a diagram comparing changes between the method of the present invention and the prior art. FIG. 5 is a schematic cross-sectional view of the circuit, and is a plan view showing a pattern of forming reinforcing members in a hybrid integrated circuit according to a fourth embodiment of the present invention. 1 and 3 to 5, the same reference numerals are used for parts common to the hybrid integrated circuit of FIG. 6.
第１図において混成集積回路１１は、導体パターンや膜
構成の抵抗素子および外部接続用端子等の回路素子（図
示せず）の形成された表面に個別回路素子３．帯状の補
強部材１２を搭載と７だアルミナ基板２をステージ４に
搭載し、それらをステージ４と同一板材から形成した多
数のリード端子５の内側の端部と共に樹脂外装置で被覆
してなる。回路素子３を基板２の形成回路に接続する金
属細線６および、基板２の形成回路とり一ド端了５とを
接続する金属細線７も、樹脂外装置内に埋め込まれるよ
うにする。In FIG. 1, a hybrid integrated circuit 11 has individual circuit elements 3. A band-shaped reinforcing member 12 is mounted and an alumina substrate 2 is mounted on a stage 4, and these are covered with a resin outer device together with the inner ends of a large number of lead terminals 5 formed from the same plate material as the stage 4. The thin metal wire 6 that connects the circuit element 3 to the forming circuit of the substrate 2 and the thin metal wire 7 that connects the forming circuit lead terminal 5 of the substrate 2 are also embedded in the resin-exposed device.
電気的１ｔ！ｉ縁性および、樹脂外装置の形成に対し耐
性を具え、望ましくは基板２より高ヤユノグ率である材
料を障子の銭形状に配設した補強部材１２、例えば高品
位のアルミナにてなる補強部材１２は、各装置の射出溶
融温度よりガラス転移温度が高いポリイミド系の接着剤
または、該射出溶融温度より高軟化点のろう材（例えば
金−錫はんだ）を使用し、回路素子３を搭載した基板２
の表面に接着する。Electric 1t! A reinforcing member 12 made of a material having high resistance and resistance to the formation of resin outer devices and preferably having a higher Yayunog rate than the substrate 2 in the shape of a shoji coin, for example, a reinforcing member made of high-grade alumina. 12 uses a polyimide adhesive whose glass transition temperature is higher than the injection melting temperature of each device or a brazing material (for example, gold-tin solder) whose softening point is higher than the injection melting temperature, and the circuit element 3 is mounted. Board 2
Adhere to the surface.
なお、アルミナ基板２の寸法（縦×横×厚さ）が２３ｎ
ｕｗ Ｘ ２３ｎ＋ｍ Ｘ Ｏ，６３５ｎｖであり、各
装置の外形寸法（縦×横×厚さ）が２８ｆｆｉ１１×２
８ＩｌｌＩ＋×４ＩｌｌＩＩ＋であるとき、一実施例に
おいてアルミナにてなる補強部材１２は、幅１ 、２ｎ
ｍ 、厚さ０．６３５ｍｍのものを適当な長さに切断し
て、第１図（Ｄ）に示すようなパターンにポリイミド系
接着剤で接着し形成した。In addition, the dimensions (length x width x thickness) of the alumina substrate 2 are 23n.
uw X 23n+m
8IllI+×4IllII+, in one embodiment, the reinforcing member 12 made of alumina has a width of 1 and 2n.
A piece having a thickness of 0.635 mm was cut into appropriate lengths and bonded with a polyimide adhesive to form a pattern as shown in FIG. 1(D).
かかる混成集積回路１１において補強部材１２は、各装
置の形成に対し基板２の変形を抑制し、その結果、基板
２に形成された膜抵抗素子の抵抗値は、各装置の形成に
よる変化量が低減されるようになる。In such a hybrid integrated circuit 11, the reinforcing member 12 suppresses the deformation of the substrate 2 as each device is formed, and as a result, the resistance value of the film resistance element formed on the substrate 2 changes by the amount of change due to the formation of each device. will be reduced.
第２図において、縦軸は面積抵抗がＩＫΩ／口砥抗厚膜
のの変化率ΔＲ／Ｒｏ（％）、横軸は混成集積回路の製
造工程であり、本発明および従来技術による抵抗膜の形
成時の抵抗値は、基板２に回路素子を搭載するおよび、
基板２の回路端子をリード端子５に接続するワイヤボン
ディングによって変化しない、そして、各装置を形成し
たとき本発明方法による抵抗膜の抵抗値が−０，０５％
程度低下するのに対し、従来技術による抵抗膜の抵抗値
は−０，４〜−０，６５％程度低下するようになる。In FIG. 2, the vertical axis shows the rate of change in sheet resistance IKΩ/resistance resistance thick film ΔR/Ro (%), and the horizontal axis shows the manufacturing process of the hybrid integrated circuit. The resistance value at the time of formation is determined by mounting the circuit element on the substrate 2 and
It does not change due to the wire bonding that connects the circuit terminal of the substrate 2 to the lead terminal 5, and when each device is formed, the resistance value of the resistive film by the method of the present invention is -0.05%.
In contrast, the resistance value of the conventional resistive film is reduced by about -0.4 to -0.65%.
第３図において混成集積回路２１は、回路素子（図示せ
ず）の形成された表面に個別回路素子３゜帯状の補強部
材１２を搭載したアルミナ基板２をステージ４に搭載し
、四方を補強部材１２に囲われた基板２の表面に電気絶
縁性および耐湿性の優れたジャクジョンコーティングレ
ジン２２を被着したのち、それらをステージ４と同一板
材から形成した多数のリード端子５の内側の端部と共に
樹脂外装置で被覆したものである。In FIG. 3, a hybrid integrated circuit 21 is constructed by mounting an alumina substrate 2 on a stage 4 on which individual circuit elements are mounted and a 3° band-shaped reinforcing member 12 on the surface on which circuit elements (not shown) are formed. The inner ends of a large number of lead terminals 5 are formed from the same plate material as the stage 4 after coating the surface of the substrate 2 surrounded by the terminals 12 with a jacksion coating resin 22 having excellent electrical insulation and moisture resistance. It is also covered with a resin outer device.
このように構成した混成集積回路２１は、電気絶縁性お
よび耐湿性が各装置より優れたジャクションコーティン
グレジイ２２を使用することによって、特性の安定化お
よび信頬性が確保されるようになる。The hybrid integrated circuit 21 configured in this manner has stable characteristics and reliability by using the junction coating resin 22 which has better electrical insulation and moisture resistance than other devices. .
第４図において混成集積回路３１は、回路素子（図示せ
ず）の形成された表面に個別回路素子３を搭載し裏面に
帯状の補強部材１２を接合させたアルミナ基板２をステ
ージ３２に搭載し、それらをステージ３２と同一板材か
ら形成した多数のリード端子５の内側の端部と共に樹脂
外装置で被覆したものである。ステージ３２は、ステー
ジ４の中央部を削り貫いた口字形状であり、基板２をそ
の周辺部で支持するようになる。In FIG. 4, a hybrid integrated circuit 31 includes an alumina substrate 2 mounted on a stage 32, on which individual circuit elements 3 are mounted on the front surface on which circuit elements (not shown) are formed, and a strip-shaped reinforcing member 12 is bonded to the back surface. , and the inner ends of a large number of lead terminals 5 formed from the same plate material as the stage 32 are covered with a resin outer device. The stage 32 has an opening-shaped shape cut through the center of the stage 4, and supports the substrate 2 at its periphery.
かかる混成集積回路３１は、基板２の表面に形成および
搭載した回路素子の配設位置を考慮することなく、補強
部材１２を設けられるという利点を有する。Such a hybrid integrated circuit 31 has the advantage that the reinforcing member 12 can be provided without considering the arrangement position of the circuit elements formed and mounted on the surface of the substrate 2.
上記実施例において各補強部材１２は、基板２の辺と平
行する格子状に設けられているが、本発明はかかる格子
状の配設に限定されず実施可能であり、例えば第５図に
示すように、基板２の表面または裏面に内接する角形お
よび、該角形の対向コーナを結ぶ十字形に補強部材１２
を設けることで、実施例と同等の効果が得られる。In the above embodiment, the reinforcing members 12 are arranged in a grid pattern parallel to the sides of the substrate 2, but the present invention is not limited to such a grid arrangement and can be implemented, for example, as shown in FIG. As shown in FIG.
By providing this, the same effect as in the embodiment can be obtained.
以上説明したように本発明によれば、基板を厚くするこ
となく基板の機械的強度を補強部材が補うため、樹脂外
装をモールド形成しても該基板の変形が抑制されるよう
になる。そのため、該変形によって基板の割れることが
皆無となり、基板に形成した膜抵抗素子は抵抗値の変化
が著しく低減し、混成集積回路の性能および信顧性を向
上する効果が得られた。As described above, according to the present invention, the reinforcing member supplements the mechanical strength of the substrate without increasing the thickness of the substrate, so that deformation of the substrate can be suppressed even when the resin exterior is molded. Therefore, there was no chance of the substrate cracking due to the deformation, and the change in resistance of the film resistance element formed on the substrate was significantly reduced, resulting in the effect of improving the performance and reliability of the hybrid integrated circuit.
第１図は本発明の第１の実施例による混成集積回路、
第２図は本発明方法と従来技術による膜抵抗変化の対比
図、
第３図は本発明の第２の実施例による混成集積回路、
第４図は本発明の第３の実施例による混成集積回路、
第５図は本発明の第４の実施例による混成集積回路の補
強部材の形成パターン、
第６図は従来の混成集積回路を示す模式断面図、である
。
図中において、
２は絶縁基板、
３は個別回路素子、
８は樹脂外装、
１１．２１．３１は混成集積回路、
１２は補強部材、
を示す。
（ロ）
不発ロ月の第１のＴ方ヒ、りｊによろ混酸１責回路第
１ 図
Ａ衾日月方法と４１１束はΦ１゛によう部目丘坑庫化ｎ
対比図第 ２ 図
不老θ月の為２ｔｙ＋１；！ｅ夕］によう３昆成隼棉回
路第 ５ 図
不発ロ月ｎ晃３の実と例を二よろ５昆洗壊積回路第 ４
図
Ａ交明刀第４ｎ実記例によう５昆へ隼精回＠め神強舒材
ｎ形減パターン
第 ５ 図FIG. 1 is a hybrid integrated circuit according to a first embodiment of the present invention, FIG. 2 is a comparison diagram of membrane resistance changes according to the method of the present invention and the prior art, and FIG. 3 is a hybrid integrated circuit according to a second embodiment of the present invention. circuit, FIG. 4 shows a hybrid integrated circuit according to a third embodiment of the present invention, FIG. 5 shows a formation pattern of a reinforcing member of a hybrid integrated circuit according to a fourth embodiment of the present invention, and FIG. 6 shows a conventional hybrid integrated circuit. It is a schematic cross-sectional view showing a circuit. In the figure, 2 is an insulating substrate, 3 is an individual circuit element, 8 is a resin exterior, 11.21.31 is a hybrid integrated circuit, and 12 is a reinforcing member. (b) Mixed acid 1st circuit due to unexploded 1st T direction
1 Figure A: Sun Moon method and 411 bundles are Φ1゛.
Comparison chart 2nd figure 2ty + 1 for ageless θ month;! e evening] niyo 3 Konsei Hayabusa circuit No. 5 Figure misfire Rozuki n Akira 3 fruits and examples 2 Yoro 5 Konsei demolition circuit No. 4
Figure A Komeito No. 4n Practical Example to 5 Kun to Hayabusa Seiki @me Shen Qiang Shu Material n-type Reduction Pattern Figure 5
Claims (1)
面および裏面の少なくとも一方に、該基板を覆う樹脂外
装（８）のモールド形成に対する耐性および電気的絶縁
性を有する帯状の補強部材（１２）を設けたことを特徴
とする混成集積回路。A band-shaped reinforcing member (12) having electrical insulation and resistance to mold formation of a resin sheath (8) covering the board is provided on at least one of the front and back surfaces of the insulating substrate (2) on which circuit elements are formed and mounted. ) is provided.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23072688A JPH0279450A (en) | 1988-09-14 | 1988-09-14 | Hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23072688A JPH0279450A (en) | 1988-09-14 | 1988-09-14 | Hybrid integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0279450A true JPH0279450A (en) | 1990-03-20 |
Family
ID=16912342
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23072688A Pending JPH0279450A (en) | 1988-09-14 | 1988-09-14 | Hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0279450A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5186525A (en) * | 1990-08-10 | 1993-02-16 | Honda Giken Kogyo Kabushiki Kaisha | Hydraulic braking pressure control system for vehicle |
| JP2010125783A (en) * | 2008-11-28 | 2010-06-10 | Apic Yamada Corp | Mold-molding method, method for producing mold-molded article, substrate with stiffener, and molding die |
| EP2395820A1 (en) | 2010-06-10 | 2011-12-14 | Fujitsu Limited | Board reinforcing structure, board assembly, and electronic device |
| WO2012049895A1 (en) * | 2010-10-15 | 2012-04-19 | 日本電気株式会社 | Module with built-in component, electronic device comprising same, and method for manufacturing module with built-in component |
-
1988
- 1988-09-14 JP JP23072688A patent/JPH0279450A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5186525A (en) * | 1990-08-10 | 1993-02-16 | Honda Giken Kogyo Kabushiki Kaisha | Hydraulic braking pressure control system for vehicle |
| JP2010125783A (en) * | 2008-11-28 | 2010-06-10 | Apic Yamada Corp | Mold-molding method, method for producing mold-molded article, substrate with stiffener, and molding die |
| EP2395820A1 (en) | 2010-06-10 | 2011-12-14 | Fujitsu Limited | Board reinforcing structure, board assembly, and electronic device |
| US8604347B2 (en) | 2010-06-10 | 2013-12-10 | Fujitsu Limited | Board reinforcing structure, board assembly, and electronic device |
| WO2012049895A1 (en) * | 2010-10-15 | 2012-04-19 | 日本電気株式会社 | Module with built-in component, electronic device comprising same, and method for manufacturing module with built-in component |
| US9148971B2 (en) | 2010-10-15 | 2015-09-29 | Lenovo Innovations Limited (Hong Kong) | Component built-in module, electronic device including same, and method for manufacturing component built-in module |
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