JPH0276081A - Pattern inspection device - Google Patents

Abstract

PURPOSE:To simplify position alignment and to eliminate the influence of the deviation of size due to the compression/expansion of a pattern by discriminating the kind of the pattern without performing the comparison of raw patterns as it is, and attaching tolerance in the comparison of the position of the pattern by using coordinate data corresponding to the kind of the pattern. CONSTITUTION:A pattern comparator 24 decides that the patterns coincide with each other when the output of a pattern detection circuit 20 S(20 M) changes and the position of a detected pattern is positioned near to a reference position and the kind is same. In other words, the raw images of the pattern are not compared, and the coincidence of the image of the pattern with the kind of the image of a specific pattern is confirmed, and a coordinate position where the pattern at that time exists is compared with that of a reference value, and it is decided that the coincidence of the pattern can be obtained when those coordinate positions are within prescribed tolerance, thereby, it is possible to respond to dislocation while decreasing the amount of reference data. In such a manner the position alignment can be simplified, and the influence of the deviation of size due to the compression/expansion of the pattern can be eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a pattern inspection device for inspecting patterns on printed circuit boards, etc., and in particular to a pattern inspection device improved to facilitate comparison with a reference pattern. Regarding.

<Prior Art> Two methods, the design rule method and the comparison method, have been conventionally used to inspect fine patterns on printed boards and the like.

The design rule method uses pattern 10 as shown in Figure 10.
The purpose is to check dimensions d such as the width and spacing of the lines, and detect bridges χ1 and chips χ2 that deviate from design standards, such as design rules such as the minimum line width.

Although this method is effective for detecting minute defects, it has the disadvantage that it cannot detect large defects such as pattern disappearance v1 and wide bridges y2 as shown in FIG.

On the other hand, the comparative method is tested using the configuration shown in FIG.

Reference numeral 11 indicates a reference pattern of, for example, a printed board, which serves as a reference, and 12 indicates a measurement pattern of the printed board to be measured. These reference patterns 11 and measurement patterns 12
are photographed by cameras 13 and 14, and the photographed images are converted into digital images DP7 and DP2 by analog/digital converters 15 and 16, respectively. These digital images DP+ (Figure 13 (a)) and DP2 (Figure 13
Figure (b)) is Exclusive Eve or Gate 1 respectively.
7 and the mismatched pixels DP of these images
3 (FIG. 13(c)) is detected.

This mismatched pixel is input to the measurement circuit 18, and the measurement circuit 18 measures the size and position of this mismatched pixel.

Further, this pattern inspection device is often used in combination with the design rule method.

Furthermore, as shown in FIG. 14, the reference pattern 11 and camera 13 in FIG. It may also be measured by inputting it to the other gate 17.

<Problems to be Solved by the Invention> However, although the pattern inspection apparatus using the above comparative method has the advantage of being able to detect defects such as the one shown in FIG. 11, it has the following problems.

(b) Measurement pattern 1 relative to the position of reference pattern 11
It is necessary to align the two positions sufficiently well.

For example, as shown in Fig. 15, the digital image @DP5 (Fig. 15 (b)) of the reference pattern 11 is shifted by one pixel from the digital image @DP4 (Fig. 15 (a)) of the measurement pattern 12. If there is, the image DP6, which is an exclusive or, will be detected by the amount of deviation as shown in FIG. 15(c).

The resolution of inspection is often set at 10 to 20 μm, but for this purpose the deviation between the two patterns must be suppressed to less than this, which is extremely difficult.

(b) Furthermore, it is susceptible to the effects of expansion and contraction of the reference pattern 11 and measurement pattern 12.

Even if one corner of these patterns is made to exactly match each other, the position of the other corner will shift.

For example, if the expansion/contraction rate of the reference pattern 11 and the measurement pattern 12 is different by 0.01%, the outer shape of the printed board is 30cm
If it is 30cm, there will be a deviation of 30cm x 0.01% = 30μm from one corner to the other corner, and the patterns will not match.In the case of a printed board, a dimensional deviation of about 100μm will not cause a problem in mounting, so this Deviations must be allowed.

(c) Furthermore, in the case of the configuration shown in FIG. 14, the capacity of the image memory 19 for storing the reference pattern becomes large, which is uneconomical.

For example, a 30cm x 30cm pattern is 10μm x 1
When stored with a resolution of 0 μm (30 cm/10 μm) 9 x 10” bits in 2: 100
It is MB bytes, and although it is not impossible to achieve, it is extremely uneconomical.

Therefore, the present invention eliminates the drawbacks of the comparative method: ① difficulty in alignment, influence of zero dimension deviation, ② large capacity storage means for reference patterns, and achieves economical. In order to provide a pattern inspection device that is accurate and has high reliability, we provide a photographing means that photographs a specific pattern of the object to be measured and outputs it as a two-dimensional image signal, and an analog/
A digital conversion means, a pattern processing means that receives this digital signal, detects a pattern using it, and outputs a detection signal, and a position of the photographed image separated from the synchronization signal included in the image@signal is inputted. A coordinate counting means outputs the coordinate signal using the coordinate signal, and a coordinate signal is output when the detection signal is in a predetermined pattern using the coordinate signal at the time when the coordinate signal and the detection signal are input and the detection signal is detected. The comparison means determines that the patterns match if the difference is within a predetermined tolerance.

Function: Instead of comparing the patterns as raw images, confirm that the measured pattern image matches the type of image of a specific pattern, and then use the coordinate position of the pattern at this time as the coordinate position of the reference value. If these coordinate positions are within a predetermined tolerance range, it is determined that the patterns match, thereby reducing the amount of reference data and making it resistant to positional deviations.

<Example> Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of one embodiment of the present invention. Note that the same reference numerals are given to parts having the same functions as in the conventional case, and the explanation thereof will be omitted as appropriate.

The analog/digital converter 15 converts the image of the reference pattern 11 into a digital image DP7, separates the pixel clock PCLKv, and outputs it to each of the pattern detection times 1%2O3. The analog/digital converter 16 converts the image of the reference pattern 12 into a digital image @DP8, separates the pixel clock P CL Ka and outputs it to the pattern detection circuit 20M.

The pattern detection circuit 2O3 (20M) is connected to a pattern processing circuit 2Is (21M) to which a digital image DP7 (DP8) is input and examines the vicinity of a specific pattern of the image, and an image clock PCLKv (PCLKa) to which it is input. A Jmg generation counter 22S that generates a coordinate signal indicating the (χ, V) coordinate position of the image by counting.
(22M) and a holding circuit 23S (23M) that stores the coordinate signal output from the coordinate generation counter 22S (22M) when a specific pattern output is generated at the output end of the pattern detection circuit 20S (20M). has been done.

Among these, the pattern processing circuit 21S (21M) detects a portion of a specific shape in the pattern.

For example, to detect the left corner of a pattern, output 1'' only when the 3x3 pixel neighborhood of the central pixel forms a pattern as shown in Figure 2. As shown in Fig. 3, this configuration uses a delay circuit HDS+ (HDM
+), HDS2 (HDM2), and latch LAS+
(LAM+)~LASs (LAM
a) and 9-person gate ANDS (AND
M).

The holding circuit 23S (23M> is the pattern processing circuit 21
3, when a predetermined pattern is detected, "1" is output, so at this time the coordinate generation counter 223 (22M)
The χ, y coordinates input as a coordinate signal are captured, and the pattern type and χ, V coordinates are encoded to generate a code signal CD? (CD8) is output to the pattern comparator 24.

The pattern comparator 24 includes a pattern detection circuit 20S (2
0M) changes, and when the position of the detected pattern is close to the reference position and the types are the same, it is determined that the patterns match.

Specifically, the output of the pattern detection circuit 20S (20M) is set as code signals CD7 and CD8 having (pattern type, χ coordinate, y@mark), (Sa, χa, 7/a) and (Sb, χb ,!/b) when 5a=Sb
(1) (χa, ya) (χb, yb) (2) is determined to match. Equation (2) is more specifically 1χa-yb1, lya! /bl<δ11χa−χ
b l+lya −yb l<δ2[(χa−χb)
2+(ya-yb)2]112×δ3 (χa-χb)2+(ya-yb)'<δ4 An appropriate determination formula is selected and used.

By using such a determination formula, if the coordinate values of the measured pattern are included in δ1 to δ4, it is determined that the patterns match, and a tolerance is set for positional and dimensional deviations. ti, alignment can be facilitated.

The above explanation is based on the case of detecting one specific pattern for simplicity, but in order to detect multiple patterns, for example, three patterns at the same time, the configuration shown in FIG. 4 may be used. In FIG. 4, only the measurement pattern side will be explained, but the same applies to the reference pattern side.

The digital image D P 8 is input to pattern processing circuits R 25M, 26M, 27M each processing a different pattern to detect whether it is one of various types of patterns as shown in FIG. 2, for example. The output terminal of each pattern processing circuit 25M, 26M, 27M is an OR gate 28M
is connected to the input end of the

Therefore, when any of the predetermined patterns is detected by the pattern processing circuit, its output becomes, for example, 1°, which is output to the data terminal of the holding circuit 29M, and the OR gate 28
It is output to the input terminal of M.

When the matching data is input via the OR gate 28M, the holding circuit 29M captures and stores the χ coordinate and V coordinate at this time via the coordinate generation counter 22M.

As described above, the holding circuit 29M controls the type of pattern,
The χ and y coordinates are retained. The holding circuit 29M encodes these signals and outputs them as a code signal CD6-.

FIG. 5 shows another embodiment in which the output processing of the pattern processing circuit in FIG. 4 is changed.

The configuration is such that each output of the pattern processing circuits 25M, 26M, and 27M is input to an encoder 30M and outputted as one code signal to a holding circuit 31M.

FIG. 6 is a block diagram showing another embodiment of the present invention.

In this configuration, the camera and the like on the reference pattern side are removed and replaced with an image memory 32. The memory capacity of the image memory 32 when configured in this way is, for example, assuming that a 30 cm x 30 cm printed board is to be detected with a resolution of 10 μm, χ and V each have a capacity of 30 cm/10 um = 3 x 10'b2'', that is, 2 bytes. 1 byte (
If 256 types of patterns are used, a total of 5 bytes is sufficient. Since there is only one check pattern like this in every 100@ resolution (one spot per 1mm), the overall capacity of the image memory 32 is [30cm/(10μm x 100)] 2 x 105 locations = 500 bytes is sufficient. It is.

This memory capacity is significantly smaller than the memory capacity according to the conventional comparison method.

FIG. 7 is a block diagram showing the configuration of a third embodiment of the present invention.

This is an example of a pattern inspection device configured using a microprocessor. In this case, the pattern detection circuit 20M
output data to the microprocessor 3 via bus 33.
The image is taken into the memory 35 and subjected to image processing under the control of step 4.

For example, if the inspection time is 10 seconds, it is sufficient to process 105 locations as described above, so the processing time may be 10 seconds/10'-100 μs per location. Therefore, as shown in FIG. 7, even if the processing is performed by software using a microprocessor and its memory, the processing time becomes possible. In this case, there is an advantage that coordinate difference calculations can be processed flexibly.

FIG. 8 is a diagram showing the configuration of a fourth embodiment of the present invention.

In this embodiment, the output data of the pattern detection circuit 20M is stored in FIFO (First
1n-First out) is read out from the microprocessor 34 via the memory 36. In this way, there is no need to synchronize pattern comparison and detection, and there is an advantage that processing can be performed even if patterns are locally crowded.

FIG. 9 is a block diagram showing the configuration of a fifth embodiment of the present invention.

In this embodiment, the output data of the pattern detection circuit 37M and the coordinate generation counter are stored in the memory 38, and after the photographing is completed, the memory 38 is connected to the bus 33 to process both images again. Therefore, in this case, the memory 38 is used in place of the holding circuit 23M shown in FIG.

This is a configuration that can be adopted when processing time is available, and if such a configuration is adopted, the number of circuits can be reduced and costs can be reduced.

Although the above embodiments have been described with reference to patterns on printed boards, the invention is not limited to this, and includes, for example, photomasks for printed boards, reticles for ICs, etc.
It can also be used to inspect photomasks, hybrid ICs, and liquid crystal substrate patterns.

<Effects of the Invention> As specifically explained above in conjunction with the embodiments, according to the present invention, rather than comparing raw patterns as they are, the type of pattern is determined and the corresponding coordinate data is used.
Since a tolerance is provided for this positional comparison, alignment becomes easy, and it is also possible to eliminate the influence of dimensional deviation due to expansion and contraction of the pattern.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of one embodiment of the present invention, FIG. 21a is an explanatory diagram showing an example of a pattern processed by the pattern processing circuit in FIG. 1, and FIG. 3 is a concrete diagram of the pattern processing circuit in FIG. 1. 4 is a block diagram showing another embodiment of the pattern processing circuit in FIG. 1, and FIG. 5 is a block diagram showing a second embodiment of the pattern processing circuit in FIG. 1. , FIG. 6 shows the second embodiment of the present invention.
7 is a block diagram showing the structure of the third embodiment of the present invention. FIG. 8 is a block diagram showing the structure of the fourth embodiment of the present invention. The figure is a block diagram showing the configuration of the fifth embodiment of the present invention, FIGS. 10 and 11 are explanatory diagrams showing pattern defects, and FIG. 12 shows a configuration for detecting patterns using a conventional comparison method. A block diagram, FIG. 13 is an explanatory diagram illustrating the drawbacks of detecting an image using the configuration shown in FIG. 12, and FIG. 14 is a block diagram showing a configuration for detecting a pattern using the conventional second comparison method. FIG. 15 is an explanatory diagram illustrating problems in a configuration for detecting a pattern using a conventional comparison method. 10...Pattern, 11...Reference pattern, 12.
...Measurement pattern, 13.14...Camera, 15.1
6...Analog/digital converter, 18...Measuring circuit, 1...Image memory, 2O3, 20M...Pattern detection circuit, 213.21M...Pattern processing circuit, 22S, 22M...・Coordinate generation counter, 23S, 2
3M...Holding circuit, 24...Pattern comparator, 25
M, 26M, 27M... pattern processing circuit, 29M.
...Holding circuit, 30M...Encoder, 32...Image memory, 34...Microprocessor, 35...
memory. Figure 2/Z Figure 3 nνρ2 Latch η Extension Word Figure 5 Figure 5 L zut Figure 7/τ] U7ytz
Figure 12 Figure 14/Z Figure 75 C) (Lola (
Hano

Claims (1)

[Claims] Photographing means for photographing a specific pattern of the object to be measured and outputting it as a two-dimensional image signal; analog/digital conversion means for converting this image signal into a digital signal; pattern processing means for detecting the image signal and outputting a detection signal thereof; coordinate counting means for inputting the position of the photographed image separated from the synchronization signal included in the image signal and outputting the coordinate signal using this; If the coordinate signal is within a predetermined tolerance when the detection signal is in the predetermined pattern using the coordinate signal at the time when the coordinate signal and the detection signal are input and the detection signal is detected; A pattern inspection device comprising: comparison means for determining that the patterns match.