JPH0252432A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH0252432A JPH0252432A JP20442888A JP20442888A JPH0252432A JP H0252432 A JPH0252432 A JP H0252432A JP 20442888 A JP20442888 A JP 20442888A JP 20442888 A JP20442888 A JP 20442888A JP H0252432 A JPH0252432 A JP H0252432A
- Authority
- JP
- Japan
- Prior art keywords
- protective film
- film
- plasma
- semiconductor substrate
- ultraviolet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 42
- 238000004519 manufacturing process Methods 0.000 title claims description 15
- 239000000758 substrate Substances 0.000 claims abstract description 29
- 230000001681 protective effect Effects 0.000 claims abstract description 28
- 238000000034 method Methods 0.000 claims abstract description 14
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 12
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 12
- 230000001678 irradiating effect Effects 0.000 claims description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 5
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 5
- 229910052739 hydrogen Inorganic materials 0.000 abstract description 15
- 239000001257 hydrogen Substances 0.000 abstract description 15
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 abstract description 14
- 230000007423 decrease Effects 0.000 abstract description 8
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 6
- 230000000694 effects Effects 0.000 description 6
- 239000010410 layer Substances 0.000 description 6
- 239000000969 carrier Substances 0.000 description 5
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 3
- 239000002253 acid Substances 0.000 description 3
- 230000002411 adverse Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 229910000069 nitrogen hydride Inorganic materials 0.000 description 2
- 230000002829 reductive effect Effects 0.000 description 2
- 241000282376 Panthera tigris Species 0.000 description 1
- 229910020776 SixNy Inorganic materials 0.000 description 1
- 241000908656 Vestiaria coccinea Species 0.000 description 1
- PBZHKWVYRQRZQC-UHFFFAOYSA-N [Si+4].[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O Chemical compound [Si+4].[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O PBZHKWVYRQRZQC-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- 238000005234 chemical deposition Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000003795 desorption Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- -1 hydrogen ions Chemical class 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920001220 nitrocellulos Polymers 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000036961 partial effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 230000001012 protector Effects 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Landscapes
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は半導体装置、特に集積回路−１−にプラズマを
用いて窒化シリコン膜等のプラズマ保護膜を形成する半
導体装置の製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a semiconductor device, and particularly to a method for manufacturing a semiconductor device in which a plasma protective film such as a silicon nitride film is formed on an integrated circuit-1- using plasma. be.
ので来の技術）
閏来、このような分野の技術としては、第２図に示すよ
うなものがあった。以下、その製造方法を図を用いて説
明する。Since then, there have been technologies in this field as shown in Figure 2. The manufacturing method will be explained below with reference to the drawings.
第２図はＲ来の半導体装置の製造方法を示すだめの半導
体装置の断面図である。FIG. 2 is a cross-sectional view of a useless semiconductor device showing a method of manufacturing a semiconductor device according to the present invention.
先ず半導体基板１上に公知の技術を用いて集積回路を形
成する。即ち、半導体基板１上にデー１−酸［ヒ膜２を
形成し、その上にゲート電極３を形成する。ゲート酸（
ヒ膜２の両１１１１部における半導体基板１の表層部に
は、拡散層４を形成する。First, an integrated circuit is formed on a semiconductor substrate 1 using a known technique. That is, a di-acid film 2 is formed on a semiconductor substrate 1, and a gate electrode 3 is formed thereon. Gate acid (
A diffusion layer 4 is formed in the surface layer portion of the semiconductor substrate 1 at both 1111 portions of the filler film 2 .
次いで、これらのゲート電極３及び拡散層４を含む半導
体基板１上の全面に、例えば常圧ＣＶＤ法（Ｃｈｃｍｉ
ｃａｌ Ｖａｐｏｒ Ｄｅｐｏｓｉｔｉｏｎ法：化学的
堆積法）により中間絶縁膜５を形成する。この中間絶縁
膜５に既知のホトリソ・エツチング技術を用いてコンタ
クトホール６を形成し、続いてその一ヒにアルミニウム
等から成る金属配線層７を形成する。Next, the entire surface of the semiconductor substrate 1 including the gate electrode 3 and the diffusion layer 4 is subjected to, for example, atmospheric pressure CVD (Chcmi).
The intermediate insulating film 5 is formed by a cal vapor deposition method (chemical deposition method). A contact hole 6 is formed in this intermediate insulating film 5 using known photolithography and etching techniques, and then a metal wiring layer 7 made of aluminum or the like is formed in the contact hole 6.
ここに、金属配線層７と拡散層４は、コンタクトポール
６を介して接続され、ＭＯ８形トランジスタを含む所定
の集積回路がＪシ成される。Here, the metal wiring layer 7 and the diffusion layer 4 are connected via the contact pole 6, and a predetermined integrated circuit including an MO8 type transistor is formed.
そのｔ→〉、中間絶縁膜５及び金属配線層７上に窒化シ
リコン（ＳｉｘＮｙ）膜から成るプラズマ保護膜８を１
トラ成する。このプラズマ保護膜８の形成は、シラン（
ＳｉＨ４）とアン′モニア（ＮＨ３）雰囲気中において
、例えば温度３８０°Ｃ程度のプラズマＣＶＤ法を施す
ことによって行なうことができる、このように形成され
たプラズマ保護Ｍ８は、酸化保護膜等に比較して特に耐
湿性の面で優れており、半導体装置の信頼性向上等に貢
献している。t→〉, a plasma protective film 8 made of silicon nitride (SixNy) film is formed on the intermediate insulating film 5 and the metal wiring layer 7.
Become a tiger. This plasma protective film 8 is formed using silane (
The plasma protection M8 formed in this way, which can be performed by plasma CVD at a temperature of about 380°C in an atmosphere of SiH4) and ammonia (NH3), has a higher It is particularly excellent in terms of moisture resistance, and contributes to improving the reliability of semiconductor devices.
（発明か解決しようとする課題）。(an invention or a problem to be solved).
しｈ化ながら、上記の半導体装置の製造方法においては
、プラズマ（ＩｉＷＩ模８の形成に際し、ゲート酸（ヒ
膜２中に水素が収り込まれ易く、これに起因）ノζポッ
トキャリアの増加がもたらされるという問題があり、そ
の解決が困難であった。即ち、プラズマ１呆護１模８は
通常ＳｉＨ４とＮ Ｈ３とから形成さｈるため、プラズ
マ中の水素分圧は高く、ゲート酸化膜２中に水素が収り
込まれ易い状態になっている。ゲート酸化膜２中に入っ
た水素はホットキャリアの増加をもたらし、キャリアの
ライフタイムの低下及びＭＯ３Ｉ−ランジスタのしきい
値電圧の変動等の悪影響を及ぼす。However, in the above method for manufacturing a semiconductor device, an increase in ζ pot carriers due to the gate acid (hydrogen is likely to be trapped in the arsenal film 2) during the formation of the plasma (IiWI model 8). This problem has been difficult to solve.That is, since plasma 1 is normally formed from SiH4 and NH3, the hydrogen partial pressure in the plasma is high, and gate oxidation is difficult. Hydrogen is easily trapped in the film 2. Hydrogen entering the gate oxide film 2 causes an increase in hot carriers, resulting in a decrease in carrier lifetime and a decrease in the threshold voltage of the MO3I-transistor. adverse effects such as fluctuations.
本発明は前記ｂη来技術がもっていた課題として、ゲー
ト酸化膜中の水素によりホットキャリアが増加する点に
ついて解決した半導体装置の製造方法を提供するもので
ある。The present invention provides a method for manufacturing a semiconductor device that solves the problem of the prior art, which is the increase in hot carriers due to hydrogen in the gate oxide film.
（課題を解決するための手段）
本発明は前記課題を解決するなめに、半導体基板上に集
積回路を形成した後、プラズマを用い゛ζ前記集積回路
上にプラズマ保護膜を形成する半導体装置の製造方法に
おいて、前記プラズマ保護膜を形成した後、そのプラズ
マ保ｒ”ＪＩ！ ）−に波長２０（’ｌ１−３００ｎ及
び照射強度２０−６００ ｍＷ／Ｃｍ２の範囲内の紫外
線を照射するようにしたものである。また、前記紫外線
を照射するプラズマ保護膜としては、窒化シリコン膜、
酸化シリコン膜及び窒素酸シリコン膜を用いるとよい。(Means for Solving the Problems) In order to solve the above problems, the present invention provides a semiconductor device in which an integrated circuit is formed on a semiconductor substrate and then a plasma protective film is formed on the integrated circuit using plasma. In the manufacturing method, after forming the plasma protective film, the plasma protective film is irradiated with ultraviolet rays having a wavelength of 20 ('l1-300n) and an irradiation intensity of 20-600 mW/Cm2. In addition, the plasma protective film for irradiating the ultraviolet rays may include a silicon nitride film,
It is preferable to use a silicon oxide film and a silicon nitrate film.
（作用）
本発明によれば、以上のように半導体装置の製造方法を
楢成したので、プラズマ保護膜形成後にそのプラズマ保
護膜上から所定の紫外線を照射することは、ゲート酸化
膜中に含まれた水素に紫外線のエイ・ルギーを与え、水
素をゲート酸化膜から脱離させるように働（−
この働きにより、１〜ランジスタ素子等におけるホラｌ
−キャリアの増加が防止され、ライフタイムの低下やし
きい値電圧の変動等の悪影響を除去することができる。(Function) According to the present invention, since the method for manufacturing a semiconductor device has been improved as described above, irradiating a predetermined ultraviolet ray from above the plasma protective film after forming the plasma protective film does not include the components contained in the gate oxide film. It acts to desorb hydrogen from the gate oxide film by applying energy energy from ultraviolet rays to the hydrogen that has been absorbed (- This action reduces the energy consumption of
- An increase in carriers is prevented, and negative effects such as a decrease in lifetime and fluctuations in threshold voltage can be eliminated.
そして、このような紫外線照射は、窒化シリコン膜、酸
化シリコン膜及び窒素酸シリコン膜のいずれかから成る
プラズマ保護膜に対しても同様の作用を及ぼす。したが
って、前記課題を解決することができる。Further, such ultraviolet irradiation has a similar effect on the plasma protective film made of any one of a silicon nitride film, a silicon oxide film, and a silicon nitride film. Therefore, the above problem can be solved.
（実施例）
第１図は本発明の実施例における半導体装置の製造方法
を示す斜視図である。(Example) FIG. 1 is a perspective view showing a method of manufacturing a semiconductor device in an example of the present invention.
ステージ１１上にはシリコン等から成る半導体基板１２
が載置されている。この半導体基板１２には、第１図の
従来の半導体基板と同様に集積回路が形成され、その上
に中間絶縁膜及び金属配線層が形成され、さらにその上
に最終保護膜としてのプラズマＦＡ＜”！膜が形成され
ている。プラズマ保護膜は例えば窒化シリコン（Ｓｉｘ
Ｎｙ）膜から成り、従来と同様の方法によって形成され
ている。On the stage 11 is a semiconductor substrate 12 made of silicon or the like.
is placed. An integrated circuit is formed on this semiconductor substrate 12 in the same way as the conventional semiconductor substrate shown in FIG. "! film is formed. The plasma protective film is made of silicon nitride (Six
Ny) film, and is formed by a conventional method.
［−記のように形成された半導体基板１２を前述の如く
ステージ１１上に載置し、この状態において半導体基板
１２上のプラズマ保護膜上に紫外線光源１３を用いて紫
外線を照射する。その際の照射条件は、例えばステージ
温度４０〜２００℃、紫外線波長２００〜３００ｎｎ、
紫外線照射強度２０〜６００ｍＷ／ｃｍ２及び照射時間
１０〜１２０ｓｅｃ程度とする。[- The semiconductor substrate 12 formed as described above is placed on the stage 11 as described above, and in this state, the plasma protective film on the semiconductor substrate 12 is irradiated with ultraviolet light using the ultraviolet light source 13. The irradiation conditions at that time are, for example, a stage temperature of 40 to 200°C, an ultraviolet wavelength of 200 to 300 nn,
The ultraviolet irradiation intensity is about 20 to 600 mW/cm2 and the irradiation time is about 10 to 120 seconds.
このような照射条件において所定の紫外線照射を力伍す
ことにより、半導体基板１２のゲート酸化膜中に収り込
まれた水素を脱離させることができる。即ち、ゲート酸
化膜中には、プラズマ保護膜の形成に際して取り込まれ
た水素が例えばＮＨ基やＳＨ基として含まれているが、
これらは紫外線照射によって与えらｈなエネルギーによ
り分解し、グー１〜酸化膜から脱離する。これにより、
半導体基板１２上に所望の半導体装置を得ることができ
る。By refraining from irradiating a predetermined amount of ultraviolet rays under such irradiation conditions, hydrogen trapped in the gate oxide film of the semiconductor substrate 12 can be released. That is, the gate oxide film contains hydrogen incorporated during the formation of the plasma protective film, for example, as NH groups and SH groups.
These are decomposed by the energy given by ultraviolet irradiation and are detached from the goo 1 to oxide film. This results in
A desired semiconductor device can be obtained on the semiconductor substrate 12.
前記ゲート酸化膜からの水素の脱離は、第３図及び第４
図によって説明される。第３図はステージ１１の温度を
５０°Ｃ１照射強度を５７０ｍＷ／ｃｒｒＩ２として紫
外線を照射した際の照射時間と基板電流値との関係を示
すものである。また、第４図は紫外線照射時間を３０ｓ
ｅｃとしたときの照射強度と基板電流値との関係を示す
ものである。Desorption of hydrogen from the gate oxide film is shown in FIGS. 3 and 4.
Illustrated by the diagram. FIG. 3 shows the relationship between the irradiation time and the substrate current value when ultraviolet rays are irradiated at a stage 11 temperature of 50° C. and an irradiation intensity of 570 mW/crrI2. In addition, Figure 4 shows the ultraviolet irradiation time is 30 seconds.
It shows the relationship between the irradiation intensity and the substrate current value when ec.
第３図において、照射時間０〜３０ｓｅｃ程度の範囲で
は、照射時間の増加に伴い基板電流が著しく減少し、照
射時間約３０ｓｅｃの基板電流は、紫外線照射を行なわ
ないものに対し約１／２となることが分かる。ここに、
基板電流とは、例えばＭＯＳトランジスタのドレインに
一定電圧を印加したとき、ソース・トレイン間に流れる
電流以外の電流を指すものである。In Fig. 3, in the range of irradiation time from about 0 to 30 seconds, the substrate current decreases significantly as the irradiation time increases, and the substrate current at about 30 seconds of irradiation time is about 1/2 of that without ultraviolet irradiation. I know it will happen. Here,
The substrate current refers to a current other than the current flowing between the source and the train when, for example, a constant voltage is applied to the drain of a MOS transistor.
これより、半導体基板１２のプラズマ保護膜上に所定の
紫外線を照射することによって基板電流が減少する、即
ち紫外線照射によってゲート酸化膜中に収り込まれてい
た水素イオン（トＩ＋）が減少していることが分かる。From this, by irradiating the plasma protection film of the semiconductor substrate 12 with a predetermined amount of ultraviolet rays, the substrate current is reduced, that is, the hydrogen ions (I+) trapped in the gate oxide film are reduced by the ultraviolet irradiation. I can see that
第４図において、照射時間３０ｓｅｃでは照射強度の増
大に伴い基板電流が減少し、照射強度的５７０ｍＷ／ｃ
ｍ２吋近においてその減少が顕著になることが分かる。In Figure 4, when the irradiation time was 30 seconds, the substrate current decreased as the irradiation intensity increased, and the irradiation intensity was 570 mW/c.
It can be seen that the decrease becomes noticeable near m2 inches.
以−ヒのように、本実施例においては、半導体基板１２
のプラズマ保護膜に所定の紫外線照射を行なうことによ
り、ゲート酸化膜中に含まれた水素を脱離させることが
できる。その結果、トランジスタ素子等におけるホラ１
へキャリアの増加を防ぎ、ライフタイムの低下やしきい
値電圧の変動等の悪影響を防止することができる。As shown below, in this embodiment, the semiconductor substrate 12
By irradiating the plasma protective film with a predetermined amount of ultraviolet rays, hydrogen contained in the gate oxide film can be desorbed. As a result, the hole 1 in transistor elements etc.
It is possible to prevent an increase in hemocarriers and prevent adverse effects such as a decrease in lifetime and a fluctuation in threshold voltage.
なお、本発明は図示の実施例に限定されず、種々の変形
が可能であり、例えば次のような変形例が挙げられる。Note that the present invention is not limited to the illustrated embodiment, and can be modified in various ways, such as the following modifications.
の 前記実施例ではプラズマ保護膜として窒化シリコン
膜を用いるものとしたが、これに代え−（酸化シリコン
（Ｓｉ○）膜或は窒素酸シリコン（Ｓ Ｌ ＯＮ ）
ｖ、から成るプラズマ保護膜に対しても本発明の適用が
可能である。In the above embodiment, a silicon nitride film was used as the plasma protection film, but instead of this, a silicon oxide (Si○) film or a silicon nitride film (SLON) was used.
The present invention can also be applied to a plasma protective film made of V.
（２） ＋’＋ｉｆ記実施例ではプラズマ保護膜を最
終保護膜とし−（用いる場合について示したが、例えば
酸化シリ：１７膜を中間絶縁膜として用いるような場合
にあっても、本発明の適用が可能て′ある。(2) +'+if In the embodiment, the case where the plasma protective film is used as the final protective film is shown. It is possible to apply.
（３） 半導体装置は第２図で例示したものに限らず、
池の種々の半導体装置に対して適用可能である６
（４） 照射条件は前記実施例で例示したもの以外に、
半導体装置の形式、プラズマ保護膜の材質及び膜厚等に
応じて適当な条件を選択することができる。(3) Semiconductor devices are not limited to those illustrated in FIG.
(4) In addition to the irradiation conditions exemplified in the above example, the irradiation conditions are applicable to various semiconductor devices.
Appropriate conditions can be selected depending on the type of semiconductor device, the material and thickness of the plasma protective film, etc.
（発明の効宋）
以上詳イ４１！に説明したように本発明によれば、プラ
ズマ保護膜形成後、プラズマ保護膜に所定条件の紫外線
を照射するようにしたので、プラズマ保護膜形成に際し
ゲート酸化膜中に取り込まれた水素を脱離させることが
できる。これにより、ホットキャリアの増加が防止され
、ライフタイムの低下やトランジスタのしきい値電圧の
変動等の悪影響を除去することが可能となる。したがっ
て、集積回路におけるトランジスタ素子等の特性安定化
及び高信頼性化を図ることができる。(Efficacy of invention in Song Dynasty) Details 41! As explained in , according to the present invention, after the plasma protective film is formed, the plasma protective film is irradiated with ultraviolet rays under predetermined conditions, so that the hydrogen incorporated into the gate oxide film during the formation of the plasma protective film is desorbed. can be done. This prevents an increase in hot carriers and makes it possible to eliminate adverse effects such as a decrease in lifetime and fluctuations in the threshold voltage of the transistor. Therefore, it is possible to stabilize the characteristics and increase the reliability of transistor elements and the like in an integrated circuit.
また、プラズマ１呆護股として、窒化シリコン膜、酸化
シリコン膜及び窒素酸シリコン膜のいずれを用いる場合
にあっても、それらの生成法から考慮して同様の効果が
期待できる。Furthermore, regardless of whether a silicon nitride film, a silicon oxide film, or a silicon nitride film is used as the plasma 1 protector, similar effects can be expected in consideration of the method of producing them.
第１図は本発明の実施例における半導体装置の製造方法
を示す斜視図、第２図は従来の半導体装置の製造方法を
示す半導体装置の断面図、第３図は本発明の実施例の製
造方法における紫外線照射時間と基板電流値との関係図
、及び第４図は本発明の製造方法における紫外線照射強
度と基板電流値との関係図である。
１１・・・・・・ステージ、１２・・・・・・半導体基
板、１３・・・・・・紫外線光源。FIG. 1 is a perspective view showing a method for manufacturing a semiconductor device according to an embodiment of the present invention, FIG. 2 is a cross-sectional view of a semiconductor device showing a conventional method for manufacturing a semiconductor device, and FIG. FIG. 4 is a diagram showing the relationship between ultraviolet irradiation time and substrate current value in the method, and FIG. 4 is a relationship diagram between ultraviolet irradiation intensity and substrate current value in the manufacturing method of the present invention. 11... Stage, 12... Semiconductor substrate, 13... Ultraviolet light source.
Claims (1)
用いて前記集積回路上にプラズマ保護膜を形成する半導
体装置の製造方法において、 前記プラズマ保護膜を形成した後、そのプラズマ保護膜
上に波長２００〜３００ｎｎ及び照射強度２０〜６００
ｍＷ／ｃｍ＾２の範囲内の紫外線を照射することを特徴
とする半導体装置の製造方法。 ２、請求項１記載の半導体装置の製造方法において、窒
化シリコン膜、酸化シリコン膜及び窒素酸シリコン膜の
いずれかから成る前記プラズマ保護膜に前記紫外線を照
射する半導体装置の製造方法。[Claims] 1. A method for manufacturing a semiconductor device, in which an integrated circuit is formed on a semiconductor substrate and then a plasma protective film is formed on the integrated circuit using plasma, comprising: after forming the plasma protective film. On the plasma protective film, a wavelength of 200 to 300 nm and an irradiation intensity of 20 to 600 nm are applied.
A method for manufacturing a semiconductor device, comprising irradiating ultraviolet light within a range of mW/cm^2. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the plasma protection film made of any one of a silicon nitride film, a silicon oxide film, and a silicon nitride film is irradiated with the ultraviolet rays.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20442888A JPH0252432A (en) | 1988-08-16 | 1988-08-16 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20442888A JPH0252432A (en) | 1988-08-16 | 1988-08-16 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0252432A true JPH0252432A (en) | 1990-02-22 |
Family
ID=16490376
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20442888A Pending JPH0252432A (en) | 1988-08-16 | 1988-08-16 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0252432A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05102137A (en) * | 1991-10-08 | 1993-04-23 | Sharp Corp | Forming method for silicon nitride passivation film |
| US6589257B1 (en) | 1998-06-10 | 2003-07-08 | Tapic International Co., Ltd. | Artificial neural tube |
| US6736901B2 (en) | 2001-08-10 | 2004-05-18 | Toshiba Machine Co., Ltd. | Vertical chemical vapor deposition system |
| JP2009224791A (en) * | 2009-05-26 | 2009-10-01 | Tokyo Electron Ltd | Film-forming method |
-
1988
- 1988-08-16 JP JP20442888A patent/JPH0252432A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05102137A (en) * | 1991-10-08 | 1993-04-23 | Sharp Corp | Forming method for silicon nitride passivation film |
| US6589257B1 (en) | 1998-06-10 | 2003-07-08 | Tapic International Co., Ltd. | Artificial neural tube |
| US6736901B2 (en) | 2001-08-10 | 2004-05-18 | Toshiba Machine Co., Ltd. | Vertical chemical vapor deposition system |
| JP2009224791A (en) * | 2009-05-26 | 2009-10-01 | Tokyo Electron Ltd | Film-forming method |
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