JPH0241962Y2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a receiver saving circuit that minimizes power consumption. More specifically, with an extremely simple circuit configuration,
This is intended to reduce as much as possible the current consumption of a receiver such as a portable wireless communication device during reception standby.

The saving circuit of conventional portable radio communication equipment is
In order to reduce current consumption during reception standby, a clock circuit was used to apply power intermittently, and the clock circuit was stopped or cut off only while a signal was being received, and power was continuously applied. However, this clock circuit has a problem in that it has a complicated circuit configuration in order to stably operate the saving cycle and/or to stably and reliably stop or cut off the saving cycle using the squelch signal of the squelch section. The dot was hot.

The present invention has been devised in view of the above-mentioned points, and is designed to achieve a saving effect with an extremely simple circuit configuration. That is, a switching element is inserted into the power supply line to the local oscillation section, a saving resistor is connected in parallel to this switching element, and the switching element is turned off by a squelch signal from the squelch section. As a result, the current flowing to the local oscillator during reception standby is made as small as possible so as to be close to the limit of reception sensitivity within the receivable range, thereby saving power consumption.

An embodiment of the present invention will be described below with reference to FIGS. 1 and 2. FIG. 1 shows an electric circuit of a receiving section of a portable radio communication device. In this figure, 1 is an antenna, and this antenna 1 is connected to a mixing section 3 via a high frequency amplification section 2. 4
is a local oscillation section (including a buffer amplifier and a multiplier, if any), and the output side of this local oscillation section 4 is connected to the mixing section 3. The mixing section 3
The output side passes through an intermediate frequency amplification section 5, a detection section 6,
It is connected to a speaker 8 via an audio amplification section 7. Further, the output side of the detection section 6 is a squelch section 9.
The output side of the squelch section 9 is connected to the audio amplification section 7. The above configuration is the same as that of the conventional receiving section.

Next, reference numeral 10 denotes a saving control unit specific to the present invention, and this control unit 10 has a power supply line 11 from the power terminal (Vcc) of the battery to the local oscillation unit 4 inserted between the emitter and the collector. It is mainly composed of a pnp transistor 12 as a switching element and a saving resistor 13 connected in parallel between the emitter and collector of this transistor 12, and the base of the transistor 12 is connected to the squelch section through a resistor 14. It is connected to the output side of 9. The saving resistor 13 is
When the transistor 12 is off, the current supplied from the power supply terminal (Vcc) to the local oscillator 4 is limited to be as small as possible within the receivable range. The resistance value is selected so that the output level of section 4 is close to the lowest level of QS sensitivity (receiving sensitivity) of the receiving section.

Next, the operation of the present invention will be explained using the characteristic diagram shown in FIG. FIG. 2 shows the QS sensitivity (reception sensitivity) and IM (Inter Modulation) characteristics of the receiving section with respect to the output level of the local oscillator 4 in FIG. 1. In order to improve the IM characteristics under normal reception conditions, The output level of the local oscillator 4 is adjusted to be raised to the _P1 point and output to the mixer 3. Point P ₂ in the figure indicates the output level of the local oscillator ₄ when the QS sensitivity is lowered to the lowest point within the receivable range due to IM characteristics. This is brought about by power supply to the local oscillation section 4 from the power supply terminal (Vcc) via the power supply terminal (Vcc).

First, the operation when the antenna 1 is not receiving a signal during reception standby will be described. At this time, the squelch signal of the squelch section 9 is H
Since the voltage is at the low level, the transistor 12 of the control unit 10 is in an off state. Therefore, power is supplied from the power supply terminal (Vcc) to the local oscillation unit 4 via the saving resistor 13, so that the current supplied to the local oscillation unit 4 becomes small. That is, the current during reception standby is limited to a small value, and power consumption is small. At this time, since the output level of the local oscillator 4 is at point _P2 in FIG. 2, the receiver is in a sensitivity state that allows reception.

Next, when the antenna 1 receives a signal, the squelch signal of the squelch section 9 changes from the H level to the L level, so the transistor 12 of the control section 10 turns on. Therefore, the power supply terminal (Vcc)
Power is supplied to the local oscillator 4 through the emitter and collector of the transistor 12, and the output level rises from point _P2 to point _P1 . Therefore, mixing section 3
The IM characteristics of will be in the best state and the normal reception state will be entered.

Since the present invention is constructed as described above, it is possible to perform the saving function with an extremely simple circuit configuration compared to the conventional example which uses a clock circuit for saving. Therefore, an inexpensive saving circuit can be provided. It is particularly effective when used in portable radio communication devices, where the standby time for reception is several times longer than the time for actual transmission and reception.

It goes without saying that the conventional saving clock circuit can be used in combination with the saving circuit according to the present invention.

[Brief explanation of the drawing]

FIG. 1 is an electrical circuit diagram showing an embodiment of a receiver saving circuit according to the present invention, and FIG. 2 is a characteristic diagram of the circuit shown in FIG. 1... Antenna, 2... High frequency amplification section, 3...
Mixing unit, 4...Local oscillation unit, 5...Intermediate frequency amplification unit, 6...Detection unit, 7...Audio amplification unit, 8...Speaker, 9...Squelch unit, 10...Control unit, 1
1... Power supply line, 12... Transistor (switching element), 13... Resistor for saving,
14...Resistor, _P1 , _P2 ...Local oscillation output level.

Claims (1)

[Claims for Utility Model Registration] (1) Mix the received signal with the oscillation frequency signal of the local oscillator, convert it into an intermediate frequency signal, input it to the audio amplification unit via the detection unit, and squelch the audio amplification unit. In a receiver controlled by a squelch signal of the local oscillator, a switching element is inserted into the power supply line of the local oscillator and turns off and on depending on the presence or absence of the squelch signal of the squelch, and a switching element is connected in parallel to the switching element. A saving circuit for a receiver, characterized in that it is equipped with a saving resistor. (2) In the utility model registration claim described in paragraph 1, the switching element consists of a transistor, the emitter of this transistor is connected to the power supply side, the collector is connected to the local oscillation part side, and the base is connected to the output side of the squelch part. The receiver's saving circuit consists of a saving resistor connected in parallel between the emitter and the collector.