JPH0231828B2 - - Google Patents

Info

Publication number
JPH0231828B2
JPH0231828B2 JP57139507A JP13950782A JPH0231828B2 JP H0231828 B2 JPH0231828 B2 JP H0231828B2 JP 57139507 A JP57139507 A JP 57139507A JP 13950782 A JP13950782 A JP 13950782A JP H0231828 B2 JPH0231828 B2 JP H0231828B2
Authority
JP
Japan
Prior art keywords
transmission
data
time
logic level
transmission lines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57139507A
Other languages
Japanese (ja)
Other versions
JPS5928674A (en
Inventor
Morikazu Itani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kubota Corp
Original Assignee
Kubota Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kubota Corp filed Critical Kubota Corp
Priority to JP57139507A priority Critical patent/JPS5928674A/en
Publication of JPS5928674A publication Critical patent/JPS5928674A/en
Publication of JPH0231828B2 publication Critical patent/JPH0231828B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/54Testing for continuity

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)

Description

【発明の詳細な説明】 本発明は伝送線断線検出方法に関し、その目的
は伝送線を介して繰り返してデータを伝送するに
際し、迅速に伝送線の断線を検知できる方法を提
供することにある。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a transmission line disconnection detection method, and an object thereof is to provide a method that can quickly detect a transmission line disconnection when data is repeatedly transmitted via the transmission line.

従来のデータ送受信方法を第1図に示す。この
第1図は、4本の伝送線l1〜l4と、その他に1本
のストローブ信号線l5との合計5本の信号線で送
信側(TX)と受信側(RX)とを接続し、送信
側(TX)では4ビツトの桁直列の各データD1
D2,D3…を第2図aのように前記伝送線l1〜l4
ビツト並列で順次印加すると共に、送信(TX)
ではこれと共に第2図bのストローブ信号P1
ストローブ信号線l5に印加される。受信側(RX)
ではストローブ信号線l5にストローブ信号Pが発
生する度にその時の4本の伝送線l1〜l4の状態を
データとして読み込むように構成されている。し
かし、従来ではこのようなデータ伝送中に伝送線
l1〜l4の断線チエツクは何ら実施されておらず、
前記断線が発生した場合には誤つたデータを受信
側(RX)で読み込んでしまう恐れがあり、この
誤つたデータによる処理を中断させることができ
ないのが現状である。
A conventional data transmission/reception method is shown in FIG. In this figure, the transmitting side (TX) and the receiving side (RX) are connected by a total of five signal lines, four transmission lines l1 to l4 and one strobe signal line l5 . On the transmitting side (TX), each 4-bit digit series data D 1 ,
D 2 , D 3 . . . are applied in bit parallel to the transmission lines l 1 to l 4 as shown in FIG.
At the same time, the strobe signal P1 of FIG. 2b is applied to the strobe signal line l5 . Receiving side (RX)
The configuration is such that each time the strobe signal P is generated on the strobe signal line l5 , the states of the four transmission lines l1 to l4 at that time are read as data. However, conventionally, during such data transmission, the transmission line
No disconnection checks were performed for l 1 to l 4 .
If the disconnection occurs, there is a risk that erroneous data will be read on the receiving side (RX), and the current situation is that it is not possible to interrupt processing based on this erroneous data.

そこで本発明は、全ビツトが同時に論理レベル
“H”に反転しないNビツトのデータを順次伝送
するN本の伝送線を、1つのデータの送信終了の
たびにデータ送信終了時刻から次のデータ送信開
始時刻の間に送信側で少なくとも所定時間にわた
つて全て論理レベル“H”に反転させ、受信側で
は一定時間以上にわたつてN本の前記伝送線が同
時に論理レベル“H”に反転しないことを検出し
て断線発生と判定するものであつて、以下本発明
の具体的な一実施例を第3図と第4図に基づいて
説明する。なお、ここでは電子料金はかりからプ
リンタ装置にデータを伝送する場合を例に挙げて
説明する。
Therefore, the present invention has developed a system that uses N transmission lines for sequentially transmitting N-bit data in which all bits do not invert to logic level "H" at the same time. During the start time, all N transmission lines are inverted to logic level "H" for at least a predetermined time on the transmitting side, and the N transmission lines are not simultaneously inverted to logic level "H" for a predetermined time or more on the receiving side. A specific embodiment of the present invention will be described below with reference to FIGS. 3 and 4. Note that an example in which data is transmitted from an electronic toll scale to a printer device will be described here.

1は送信側としての電子料金はかり、2は受信
側としてのプリンタ装置、l1〜l4は電子料金はか
り1とプリンタ装置2とを結ぶ4本の伝送線であ
る。電子料金はかり1側では、伝送すべきデータ
として、風袋、重量、価格、単価などのデータを
有しており、電子料金はかり1側のマイクロコン
ピユータAはデータ送出ルーチンが次のように構
成されている。
1 is an electronic toll scale as a transmitting side, 2 is a printer device as a receiving side, and l 1 to l 4 are four transmission lines connecting the electronic toll scale 1 and the printer device 2. The electronic toll scale 1 side has data such as tare, weight, price, unit price, etc. as data to be transmitted, and the microcomputer A on the electronic toll scale 1 side has a data sending routine configured as follows. There is.

マイクロコンピユータAでは、送信するデータ
の順番が、第4図aのように風袋→重量→価格→
単価の順の繰り返しサイクルであることが決めら
れており、1つのデータの送信終了時刻と次のデ
ータ送信開始の間の時間t2をF16〔ビツトで書け
ば、伝送線l1〜l4を全て論理レベル“H”にした
状態〕に保持して伝送するよう構成されている。
なお、ここでデータの伝送はビツト並列桁直列で
それぞれ伝送されており、各データ伝送時間t1
等しく、次のデータまでの前記時間t2も等しい。
また、マイクロコンピユータAは各データの伝送
に同期して従来と同様にストローブ信号線l5に第
4図bのようにストローブ信号P1が発生する。
In microcomputer A, the order of data to be transmitted is tare → weight → price → as shown in Figure 4 a.
It is determined that the cycle is repeated in the order of the unit price, and the time t 2 between the end time of one data transmission and the start of the next data transmission is F 16 [If written in bits, the transmission line l 1 to l 4 The configuration is such that all signals are held at a logic level of "H" for transmission.
Here, the data is transmitted in parallel bits and serially, and each data transmission time t1 is equal, and the time t2 until the next data is also equal.
Further, the microcomputer A generates a strobe signal P1 on the strobe signal line l5 as shown in FIG. 4b in synchronization with the transmission of each data, as in the conventional case.

上記データを伝送線l1〜l4を介して読み込むプ
リンタ装置2側では、マイクロコンピユータB
が、ストローブ信号線l5にストローブ信号Pが発
生したタイミングの前記伝送線l1〜l4の状態をデ
ータとしてその都度読み込まれる。また、プリン
タ装置2側では、アンドゲート3が伝送l1〜l4
論理積を取り、このアンドゲート3が第4図cの
ように一致を検出するとその度に再トリガが可能
な単安定マルチバイブレータ4を第4図dのよう
にトリガする。ここで単安定マルチバイブレータ
4の規定時間Tは、T>t1+t2に設定されている
ため、伝送線l1〜l4が正常であるならば規定時間
T以内に再トリガされて、単安定マルチバイブレ
ータ4の出力Qは“H”レベルに維持されるが、
伝送線l1〜l4のうちの少なくとも1つが断線する
と単安定マルチバイブレータ4は前記規定時間T
以内に再トリガされないため、出力Qが論理レベ
ル“L”に復帰する。単安定マルチバイブレータ
4の出力Qが論理レベル“L”に復帰するネガテ
イブエツジで、パルス発生器5は割込みパルス
P2の発生が指示される。この割込みパルスP2
マイクロコンピユータBに割込み信号として作用
し、割込みがかけられたマイクロコンピユータB
は、ストローブ信号P1による通常の読み込み動
作を中止して断線報知のためのルーチンを実行す
るよう構成されている。なお、断線報知のルーチ
ンとしては、例えば伝送断線を表わすコード等を
プリントアウトする動作を挙げることができる。
On the printer device 2 side, which reads the above data via transmission lines l1 to l4 , a microcomputer B
The states of the transmission lines l1 to l4 at the timing when the strobe signal P is generated on the strobe signal line l5 are read each time as data. In addition, on the printer device 2 side, an AND gate 3 performs the AND of the transmissions l 1 to l 4 , and when this AND gate 3 detects a match as shown in FIG. Trigger the multivibrator 4 as shown in FIG. 4d. Here, the specified time T of the monostable multivibrator 4 is set to T > t 1 + t 2 , so if the transmission lines l 1 to l 4 are normal, it will be retriggered within the specified time T and the monostable multivibrator 4 will be activated again. Although the output Q of the stable multivibrator 4 is maintained at “H” level,
If at least one of the transmission lines l 1 to l 4 is disconnected, the monostable multivibrator 4 will not operate for the specified time T.
Since it is not retriggered within this time, the output Q returns to logic level "L". At the negative edge when the output Q of the monostable multivibrator 4 returns to logic level "L", the pulse generator 5 generates an interrupt pulse.
The occurrence of P 2 is indicated. This interrupt pulse P2 acts on microcomputer B as an interrupt signal, and the microcomputer B to which the interrupt was applied
is configured to abort the normal reading operation using the strobe signal P1 and execute a routine for notifying disconnection. The disconnection notification routine may include, for example, an operation of printing out a code indicating a transmission disconnection.

上記実施例では、時間t2の間の全域にわたつて
F16を送信するよう構成したが、これは時間t2
間で、アンドゲート3が正確にデータを読み取る
に要する時間以上あればよい。
In the above example, over the entire area during time t 2
Although the configuration is configured to transmit F 16 , it is only necessary to transmit F 16 during time t 2 , which is longer than the time required for the AND gate 3 to read the data accurately.

以上説明のように本発明によると、伝送線が少
なくとも一本断線すると、速やかにこの断線状態
を検知することができ、誤つた読み取りデータに
よる処理動作の中断等を指示することができる。
As described above, according to the present invention, when at least one transmission line is disconnected, this disconnection state can be quickly detected, and an instruction can be given to interrupt processing operations due to erroneously read data.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のデータ送受信方式の送信側と受
信側の接続図、第2図は第1図の波形図、第3図
は本発明の具体的な一実施例の構成図、第4図a
〜dは第3図の伝送フオーマツトと受信側内部の
要部波形図である。 1……電子料金はかり〔送信側〕、2……プリ
ンタ装置〔受信側〕、3……アンドゲート、4…
…単安定マルチバイブレータ、5……パルス発生
器、A,B……マイクロコンピユータ、l1〜l4
…伝送線、l5……ストローブ信号線、P2……割込
みパルス。
Fig. 1 is a connection diagram of the transmitting side and receiving side of a conventional data transmission/reception system, Fig. 2 is a waveform diagram of Fig. 1, Fig. 3 is a block diagram of a specific embodiment of the present invention, and Fig. 4 a
.about.d are diagrams of the transmission format of FIG. 3 and main part waveforms inside the receiving side. 1...Electronic toll scale [sending side], 2...printer device [receiving side], 3...and gate, 4...
...monostable multivibrator, 5...pulse generator, A, B...microcomputer, l1 to l4 ...
...Transmission line, l 5 ... Strobe signal line, P 2 ... Interrupt pulse.

Claims (1)

【特許請求の範囲】[Claims] 1 全ビツトが同時に論理レベル“H”に反転し
ないNビツトのデータを順次伝送するN本の伝送
線を、1つのデータの送信終了のたびにデータ送
信終了時刻から次のデータ送信開始時刻の間に送
信側で少なくとも所定時間にわたつて全て論理レ
ベル“H”に反転させ、受信側では一定時間以上
にわたつてN本の前記伝送線が同時に論理レベル
“H”に反転しないことを検出して断線発生と判
定する伝送線断線検出方法。
1 N transmission lines that sequentially transmit N-bit data in which all bits do not invert to logic level "H" at the same time are connected between the data transmission end time and the next data transmission start time each time transmission of one data is completed. The transmission side inverts all of them to logic level "H" for at least a predetermined period of time, and the reception side detects that the N transmission lines do not simultaneously invert to logic level "H" for a predetermined period of time or more. A transmission line disconnection detection method that determines that a disconnection has occurred.
JP57139507A 1982-08-10 1982-08-10 Disconnecting detection of transmission wire Granted JPS5928674A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57139507A JPS5928674A (en) 1982-08-10 1982-08-10 Disconnecting detection of transmission wire

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57139507A JPS5928674A (en) 1982-08-10 1982-08-10 Disconnecting detection of transmission wire

Publications (2)

Publication Number Publication Date
JPS5928674A JPS5928674A (en) 1984-02-15
JPH0231828B2 true JPH0231828B2 (en) 1990-07-17

Family

ID=15246897

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57139507A Granted JPS5928674A (en) 1982-08-10 1982-08-10 Disconnecting detection of transmission wire

Country Status (1)

Country Link
JP (1) JPS5928674A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4525456B2 (en) 2005-04-28 2010-08-18 株式会社デンソー Control device, short detection device, load drive system and program

Also Published As

Publication number Publication date
JPS5928674A (en) 1984-02-15

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