JPH02302173A - Picture processing system - Google Patents

Picture processing system

Info

Publication number
JPH02302173A
JPH02302173A JP1121620A JP12162089A JPH02302173A JP H02302173 A JPH02302173 A JP H02302173A JP 1121620 A JP1121620 A JP 1121620A JP 12162089 A JP12162089 A JP 12162089A JP H02302173 A JPH02302173 A JP H02302173A
Authority
JP
Japan
Prior art keywords
clock
image
write
image data
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1121620A
Other languages
Japanese (ja)
Other versions
JP2858661B2 (en
Inventor
Katsumi Nagata
勝美 永田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP1121620A priority Critical patent/JP2858661B2/en
Publication of JPH02302173A publication Critical patent/JPH02302173A/en
Application granted granted Critical
Publication of JP2858661B2 publication Critical patent/JP2858661B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a magnified picture corresponding to a magnified size by using a readout clock with a frequency different from a frequency of a write clock so as to read out a picture data written in a storage means through the use of a prescribed write clock while applying repetitive processing. CONSTITUTION:A readout control circuit 6 reads out a picture data after repetitive processing via a selector 43 from line buffers 41, 42 as it is or while applying repetitive processing as required. A clock generating circuit. 7 consists of a couple of frequency dividers 71, 72 generating write and readout clocks. The frequency divider 72 generates a write clock synchronously with a picture input clock by applying 1/4 frequency division to the original oscillation clock, while the frequency divider 71 applies 1/3 frequency division to the original oscillation clock to generate the readout clock having a clock period with 75% of the write clock.

Description

【発明の詳細な説明】 「産業上の利用分野」 本発明は、画像拡大機能を有する、ファクシミリ、プリ
ンタ、イメージスキャナ等に用いられる画像処理装置に
係り、特に所定クロックで記憶手段への書き込みと読み
出しをしながら所定走査ライン方向における画像データ
の拡大を行う画像処理方式に関する。
Detailed Description of the Invention "Industrial Application Field" The present invention relates to an image processing device having an image enlargement function and used in facsimiles, printers, image scanners, etc. The present invention relates to an image processing method that enlarges image data in a predetermined scanning line direction while reading the data.

「従来の技術」 従来よりファクシミリやイメージスキャナにおいてはイ
メージセンサにより読み取られた画像データを所定サイ
ズに拡大して他側受信機側に伝送する場合があり、又レ
ーザプリンタその他のページプリンタにおいてもビデオ
メモリに展開した画像データを所定サイズに拡大してプ
リントエンジン側に出力する場合があり、このような画
像データを所定サイズに拡大する方式として例えば所定
走査ライン方向における画像データを、所定の画素クロ
ック周波数に基づいて複数のラインバッファに交互に書
き込みと読み出しを行いながら画像処理を行う装置にお
いて、前記読み出し時において画像データを所定の拡大
率に対応する間隔に位置する画素データを反復して読み
出す事により実質的に画素数の増大を図り1画像データ
の拡大を図る方式が存在する。(特開昭82−247E
i73号他) 又所定走査ライン方向における画像データを、所定の画
素クロック周波数に基づいて複数のラインバッファに交
互に書き込みと読み出しを行いながら画像処理を行う装
置において、前記書き込み時(n)と読み出し時(m)
のクロック周波数を異ならせるとともに、その周波数比
(m/n)を画像拡大率に対応させて設定する事により
画像データの拡大を図る方式も存在する。(特開昭59
−178863号他) 「発前記解決しようとする課題」 しかしながら画像データの反復処理を行う前者の方式で
はA5−A3(2001)のように全ての画素毎に反復
処理を行う場合若しくは反復割合いの多いB5−e A
3(1213%)や85 mB4(141%)(7)場
合ニハ反復画素がほぼ均等割合いで分散される為に画像
歪がWJ著ニ現レしイカ、A4−>84(122%)更
i、:ハB5−eA4(115%)のように拡大率が小
になればなる程反復割合いが減少する為に反復画素が一
部に偏って配置され、結果として画像歪が大になり画像
再現性等に問題が出る。
``Prior Art'' Conventionally, facsimiles and image scanners sometimes enlarge image data read by an image sensor to a predetermined size and transmit it to the other receiver, and laser printers and other page printers also enlarge the image data read by an image sensor and transmit it to the other receiver. In some cases, the image data developed in the memory is enlarged to a predetermined size and output to the print engine side, and one method for enlarging such image data to a predetermined size is, for example, by converting image data in a predetermined scanning line direction to a predetermined pixel clock. In a device that performs image processing while alternately writing and reading data into a plurality of line buffers based on frequency, pixel data located at intervals corresponding to a predetermined magnification ratio of image data is repeatedly read out during the reading process. There is a method for substantially increasing the number of pixels and enlarging one image data. (Unexamined Japanese Patent Publication No. 82-247E
i73 et al.) In a device that performs image processing while alternately writing and reading image data in a predetermined scanning line direction to a plurality of line buffers based on a predetermined pixel clock frequency, the writing (n) and reading Hours (m)
There is also a method of enlarging image data by varying the clock frequencies of the images and setting the frequency ratio (m/n) corresponding to the image enlargement rate. (Unexamined Japanese Patent Publication No. 59
-178863, etc.) ``Problem to be solved before generation'' However, in the former method of iteratively processing image data, there are cases where iterative processing is performed for every pixel as in A5-A3 (2001), or when the repetition rate is Many B5-e A
3 (1213%) and 85 mB4 (141%) (7), the image distortion is caused by WJ's current model, A4->84 (122%), because the repeated pixels are distributed almost equally. , :HaB5-eA4 (115%) As the magnification becomes smaller, the repetition rate decreases, so the repetition pixels are arranged unevenly in some parts, resulting in large image distortion and image distortion. Problems arise with reproducibility, etc.

又後者の技術においては、原発振クロックに対し分周比
が異る複数のクロック発生器を用いて書き込み及び読み
出しクロックを生成する構成を取る為に、きめ細かな変
倍率を得る為にはそれだけ前記書き込み及び読み出しク
ロックを生成する為の原発振クロックを高速化せねばな
らず、装置のコスト高を招く。
In addition, in the latter technology, a configuration is adopted in which write and read clocks are generated using multiple clock generators with different frequency division ratios for the original oscillation clock, so in order to obtain a finer scaling ratio, the above-described The original oscillation clock for generating the write and read clocks must be made faster, which increases the cost of the device.

本発明はかかる従来技術の欠点に鑑み、拡大率を小に設
定した場合においても画像歪が顕著化する事なく画像再
現性や判読性の面で好ましい拡大画像を得る事の出来る
画像処理方式を提供する事を目的とする。
In view of the drawbacks of the prior art, the present invention provides an image processing method that can obtain an enlarged image that is preferable in terms of image reproducibility and legibility without causing significant image distortion even when the enlargement ratio is set to a small value. The purpose is to provide.

又本発明の他の目的は画素クロックを生成する原発振ク
ロックを高速化する事なく変倍サイズに対応させて精度
よく拡大画像を得る事の出来る画像処理方式を提供する
車を目的とする。
Another object of the present invention is to provide a vehicle that provides an image processing method capable of obtaining an enlarged image with high accuracy in correspondence with the variable size without increasing the speed of the original oscillation clock that generates the pixel clock.

「課題を解決する為の手段」 本発明は反復処理のみで画像拡大を行う事なく、又書き
込み時(n)と読み出し時(m)のクロック周波数を異
ならせるのみで画像拡大を行わせるのではなく、両者を
組み合わせて原画像データの入力クロックと異なる周波
数を有するクロックを用いた書き込み若しくは読み出し
動作と、前記原画像データの反復処理動作の組み合わせ
により、結果として二段階の変倍処理動作を行う事によ
り前記再動作の短所を夫々打ち消し合って好ましい画像
拡大処理を行う事の出来るものである。
``Means for Solving the Problems'' The present invention does not enlarge the image only through repetitive processing, and only by changing the clock frequency during writing (n) and reading (m). Instead, by combining the two, a write or read operation using a clock having a frequency different from the input clock of the original image data, and an iterative processing operation of the original image data, resulting in a two-stage scaling operation. By doing so, it is possible to cancel out the disadvantages of the re-operation and perform preferable image enlargement processing.

即ち本発明は、例えば原画像データの入力クロックに同
期する書込みクロックを用いて原画像に対応するデータ
を記憶手段に書き込んだ後、前記書き込みクロックより
高い周波数を有する読み出しクロー、りを用いて前記画
像データを記憶手段より読み出す事により見掛は上の画
像縮小動作を行いつつ、該目的とする拡大率より大なる
゛反復率で反復処理動作を行う事により、所望倍率の拡
大画像を得んとするものである。
That is, in the present invention, for example, after data corresponding to an original image is written into a storage means using a write clock synchronized with an input clock of the original image data, the data corresponding to the original image is written using a read clock having a higher frequency than the write clock. By reading the image data from the storage means, an enlarged image of a desired magnification can be obtained by performing a repetitive processing operation at a repetition rate higher than the desired magnification while performing an apparent image reduction operation. That is.

「作用」 かかる技術手段によれば前記第1の動作により実質的に
画像縮小を行いつつ反復処理動作を行う為に、結果とし
て目的とする画像拡大率より大なる反復率での反復処理
動作が可能となり、この結果B5−* A4(115%
)のように拡大率が小なる場合でも各画素の反復割合い
をほぼ均等に配分することが可能となり、結果として画
像歪が顕著化する事なく画像再現性や判読性の面で好ま
しい拡大画像を得る事が出来る。
"Operation" According to this technical means, since the iterative processing operation is performed while substantially reducing the image by the first operation, as a result, the iterative processing operation is performed at a repetition rate higher than the target image enlargement rate. As a result, B5-* A4 (115%
) Even if the magnification ratio is small, it is possible to distribute the repetition rate of each pixel almost equally, and as a result, image distortion does not become noticeable and the enlarged image is favorable in terms of image reproducibility and readability. can be obtained.

例えば前記両クロック周期の比を75%にした場合、画
像拡大率が115%の場合でも反復率は153%に設定
する事が出来、又画像拡大率が122%の場合において
は反復率を163zと各画素間の反復割合の均等化を達
成する事が出来、前記効果が一層達成される。
For example, if the ratio of the two clock cycles is set to 75%, the repetition rate can be set to 153% even when the image enlargement rate is 115%, and the repetition rate can be set to 163% when the image enlargement rate is 122%. This makes it possible to equalize the repetition rate between each pixel, thereby further achieving the above effect.

一方前記読み出しクロックは画像拡大率を設定する為に
書き込みクロックと異なる周波数に設定したものではな
く、単に前記反復処理動作の反復率を高める為に設定さ
れるものである為に、拡大率に対応させてクロック周期
を可変にする必要はなく固定クロック周期で足りる。
On the other hand, the read clock is not set to a different frequency from the write clock in order to set the image enlargement rate, but is simply set to increase the repetition rate of the repetitive processing operation, and therefore corresponds to the enlargement rate. There is no need to make the clock cycle variable by changing the clock cycle; a fixed clock cycle is sufficient.

即ち読み出しクロック周期を拡大率に対応させで可変さ
せる必要がない事は結果として前記書き込み及び読み出
しクロックを生成する為の原発振クロックを高速化させ
る必要が全くなく、且つ前記各クロックを生成する為の
分周回路も2つで足り装置構成の煩雑化を避ける事が出
来る。
That is, there is no need to vary the read clock period in accordance with the enlargement ratio, and as a result, there is no need to speed up the original oscillation clock for generating the write and read clocks, and there is no need to increase the speed of the original oscillation clock for generating the write and read clocks. Since only two frequency dividing circuits are required, it is possible to avoid complicating the device configuration.

尚、前記読み出しクロックの周期比を75%にした場合
、反復処理動作を行う事なくそのまま読み出した場合7
5%に縮小した画像が得られる。
In addition, when the period ratio of the read clock is set to 75%, if the readout is performed as is without performing any repetitive processing operation, 7.
An image reduced to 5% is obtained.

従って86%(A4−B5)や81%(84mA4)の
縮小率を得たい場合、前記読み出しクロックを用いて記
憶手段側より読み出しながら同一画素の反復処理を行っ
て見掛は上の拡大処理(t3)を行えばよく、これによ
り多少の画像歪は出るが従来の間引き処理を行う場合の
ように必須画素が欠落する事がない為に判読性の高い縮
小画像を得る事が出来る。尚前記クロックによる縮小処
理は書き込み動作時に行う事が出来る。
Therefore, if you want to obtain a reduction rate of 86% (A4-B5) or 81% (84mA4), you can repeatedly process the same pixel while reading it from the storage means using the readout clock, and the apparent enlargement process ( t3), and although this causes some image distortion, it is possible to obtain a reduced image with high readability because essential pixels are not missing unlike in the case of conventional thinning processing. Note that the reduction processing using the clock can be performed during a write operation.

請求項4)項はかかる点も含めてクレーム化したもので
原画像データの入力クロックと異なる周波数を有するク
ロックを用いた書き込み若しくは読み出し動作と、前記
原画像データの反復処理動作の組み合わせにより、結果
として二段階の変倍処理動作を行う事により所望倍率の
変倍画像を得る事を特徴とする。
Claim 4) is a claim that includes this point, and the result is obtained by combining a write or read operation using a clock having a frequency different from the input clock of the original image data and an iterative processing operation of the original image data. The present invention is characterized in that a variable magnification image with a desired magnification is obtained by performing a two-step variable magnification processing operation.

「実施例」 以下、図面を参照して本発明の好適な実施例を例示的に
詳しく説明する。ただしこの実施例に記載されている構
成部品の寸法、材質、形状、その相対配置などは特に特
定的な記載がない限りは、この発明の範囲をそれのみに
限定する趣旨ではなく、単なる説明例に過ぎない。
"Embodiments" Hereinafter, preferred embodiments of the present invention will be described in detail by way of example with reference to the drawings. However, unless otherwise specified, the dimensions, materials, shapes, and relative arrangements of the components described in this example are not intended to limit the scope of this invention, but are merely illustrative examples. It's nothing more than that.

第1図は本発明の実施例に係る拡大若しくは縮小機能を
有する画像処理装置を示す全体ブロック図である。
FIG. 1 is an overall block diagram showing an image processing apparatus having an enlargement or reduction function according to an embodiment of the present invention.

lは、例えば−真相当分の画像データをドツト状に展開
して格納するビデオメモリで、該画像データ格納の際に
予め所定の変倍サイズに対応させて副走査方向に間引き
若しくは反復制御された状態で格納させている。(副走
査方向の変倍処理は本発明の要部でない為にその説明は
省略する。) 2は制御部で、ビデオメモリ1に格納されたイメージデ
ータを−1走査うイン毎若しくはnビットづつシフトレ
ジスタ21にパラレルに読み出した後、クロック生成回
路7により生成された書き込みクロックに基づいてシフ
トレジスタ21内の画素データを順次シフトしながら一
時記憶手段4側にシリアルに出力可能に構成している。
1 is a video memory that stores, for example, image data corresponding to the true value expanded into dots, and when storing the image data, it is thinned out or repeatedly controlled in the sub-scanning direction in correspondence with a predetermined variable size. It is stored in this condition. (Since the magnification processing in the sub-scanning direction is not an essential part of the present invention, its explanation will be omitted.) 2 is a control unit that controls the image data stored in the video memory 1 every -1 scan or every n bits. After being read out to the shift register 21 in parallel, the pixel data in the shift register 21 is sequentially shifted based on the write clock generated by the clock generation circuit 7 and is configured to be serially output to the temporary storage means 4 side. .

一時記憶手段4はトグル動作を行う2組のラインバッフ
ァ41.42とセレクタ43からなり、主走査同期信号
に基づいて一走査ライン毎に交互にセレクタ43を切換
えて、前記クロ7り生成回路7により生成された書き込
みクロックと読み出しクロックに基づいて前記ラインバ
ッファ41.42への書き込みと読み出しを並行して行
うように構成している。
The temporary storage means 4 consists of two sets of line buffers 41 and 42 that perform toggle operations and a selector 43, and switches the selector 43 alternately for each scanning line based on the main scanning synchronization signal to Writing and reading from the line buffers 41 and 42 are performed in parallel based on the write clock and read clock generated by the line buffers 41 and 42.

6は、前記ラインバッファ41.42よりセレクタ43
を介して反復処理後の画像データをそのまま、若しくは
必要に応じて反復処理を行いながら読み出す読み出し制
御回路で、第2図に示すように、Nビットシフトレジス
タ61と、所望の画像拡大率に対応する反復指定信号を
送出する反復指定回路60と、該指定回路60より送口
された反復指定信号に基づいて、NビットレジスタB1
より出力される対応画素データの読み出しを反復して行
う反復制御回路B2からなる。
6 is a selector 43 from the line buffer 41.42.
This is a readout control circuit that reads out the image data after iterative processing via the N-bit shift register 61 and the desired image enlargement ratio, as shown in FIG. a repetition designation circuit 60 that sends out a repetition designation signal to
It consists of an iterative control circuit B2 that repeatedly reads out corresponding pixel data output from the pixel data.

7は書き込み及び読み出しクロックを生成する一対の分
周器71.72からなるクロック生成回路で、夫々分周
器72により原発振クロックを4分周する事により画像
入力クロックと同期する書き込みクロックが生成され、
一方原発振クロックを分周器71により3分周する事に
より書き込みクロックの75%のクロック周期を有する
読み出しクロックが生成される事になる。
7 is a clock generation circuit consisting of a pair of frequency dividers 71 and 72 that generate write and read clocks, and by dividing the original oscillation clock by 4 using each frequency divider 72, a write clock synchronized with the image input clock is generated. is,
On the other hand, by dividing the original oscillation clock by three using the frequency divider 71, a read clock having a clock period of 75% of the write clock is generated.

かかる実施例によれば前記した本発明の作用を円滑に達
成し得る。
According to such embodiments, the effects of the present invention described above can be smoothly achieved.

即ち本実施例は画像入力クロックと同期する書き込みク
ロックを用いて制御部(ビデオメモリ)内のシフトレジ
スタに格納された原画像データをそのまま一時記憶手段
に格納した後、前記書き込みりaツクの751周期に設
定した読み出しクロックに基づいて読み出しながら読み
出し制御回路にて反復処理を行うように構成している為
に、前記クロック周期比だけ反復制御回路3で行う反復
数を実際の拡大率より大に設定出来る。
That is, in this embodiment, the original image data stored in the shift register in the control unit (video memory) is stored as it is in the temporary storage means using a write clock synchronized with the image input clock, and then the write clock 751 of the write a Since the configuration is such that the readout control circuit performs repetitive processing while reading based on the readout clock set to the period, the number of repetitions performed by the repetition control circuit 3 is made larger than the actual magnification rate by the clock period ratio. Can be set.

例えば前記したように画像拡大率が目5zの場合でも反
復率は153z、又画像拡大率が122%の場合におい
ては反復率を183zに設定出来る。
For example, as described above, even when the image enlargement rate is 5z, the repetition rate can be set to 153z, and when the image enlargement rate is 122%, the repetition rate can be set to 183z.

尚、前記クロック周期比75%より大なる88%や81
%の縮小率を得たい場合においても前記したように反復
制御回路により見掛は上の拡大処理を行えばよい事は前
記した通りである。
Note that the clock cycle ratio is 88% or 81%, which is greater than 75%.
As mentioned above, even when it is desired to obtain a reduction rate of 1.5%, the above-mentioned apparent enlargement processing can be performed using the iterative control circuit as described above.

「発明の効果」 以上記載した如く本発明によれば、拡大率を小に設定し
た場合においても画像歪が顕著化する事なく画像再現性
や判読性の面で好ましい拡大画像を得る事が出来るとと
もに、又書き込みクロックと周波数の異なる読み出しク
ロックを用いるも画素クロックを生成する原発振クロッ
クを高速化する必要がなく、結果として装置構成が簡単
化する。
"Effects of the Invention" As described above, according to the present invention, even when the magnification ratio is set to a small value, it is possible to obtain an enlarged image that is preferable in terms of image reproducibility and legibility without noticeable image distortion. In addition, even if a read clock having a frequency different from that of the write clock is used, there is no need to increase the speed of the original oscillation clock that generates the pixel clock, and as a result, the device configuration is simplified.

等の種々の著効を有す。It has various effects such as

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例に係る画像拡大用の画像処理装
置を示す概略ブロック図である。第2図は前記処理装置
に用いる読み出し制御回路を示すブロック図である。
FIG. 1 is a schematic block diagram showing an image processing device for image enlargement according to an embodiment of the present invention. FIG. 2 is a block diagram showing a read control circuit used in the processing device.

Claims (1)

【特許請求の範囲】 1)所定クロックで記憶手段への書き込みと読み出しを
しながら所定走査ライン方向における画像データの拡大
を行う画像処理方式において、所定の書込みクロックを
用いて記憶手段に書き込まれた画像データを、前記書き
込みクロックと異なる周波数の読み出しクロックを用い
て反復処理を行いながら読み出す事により所望倍率の拡
大画像を得る事を特徴とする画像処理方式 2)前記書込みクロックが、原画像データの入力クロッ
クに同期するクロックであり、前記読み出しクロックが
前記書き込みクロックより高い周波数を有するクロック
である請求項1)記載の画像処理方式 3)前記読み出しクロックを固定しておき、画像反復処
理時の画素反復数のみを変化させる事により夫々異なる
倍率の拡大画像を得る事を特徴とする請求項1)記載の
画像処理方式 4)所定クロックで記憶手段への書き込みと読み出しな
がら所定走査ライン方向における画像データの拡大を行
う画像処理方式において、原画像データの入力クロック
と異なる周波数を有するクロックを用いた書き込み若し
くは読み出し動作と、前記原画像データの反復処理動作
の組み合わせにより、結果として二段階の変倍処理動作
を行う事により所望倍率の変倍画像を得る事を特徴とす
る画像処理方式
[Claims] 1) In an image processing method that enlarges image data in a predetermined scanning line direction while writing to and reading from a storage means at a predetermined clock, the image data written to the storage means using a predetermined write clock is An image processing method characterized in that an enlarged image of a desired magnification is obtained by repeatedly reading image data using a read clock having a frequency different from that of the write clock. 3) The image processing method according to claim 1, wherein the read clock is a clock synchronized with an input clock, and the read clock has a higher frequency than the write clock. 4) Image processing method according to claim 1), characterized in that enlarged images with different magnifications are obtained by changing only the number of repetitions. 4) Image data in a predetermined scanning line direction while being written to and read from the storage means at a predetermined clock. In an image processing method for enlarging images, a combination of a write or read operation using a clock having a frequency different from the input clock of the original image data and an iterative processing operation of the original image data results in a two-step scaling process. An image processing method characterized by obtaining a variable magnification image of a desired magnification by performing operations.
JP1121620A 1989-05-17 1989-05-17 Image processing method Expired - Lifetime JP2858661B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1121620A JP2858661B2 (en) 1989-05-17 1989-05-17 Image processing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1121620A JP2858661B2 (en) 1989-05-17 1989-05-17 Image processing method

Publications (2)

Publication Number Publication Date
JPH02302173A true JPH02302173A (en) 1990-12-14
JP2858661B2 JP2858661B2 (en) 1999-02-17

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ID=14815764

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Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE40859E1 (en) 1997-02-24 2009-07-21 Genesis Microchip (Delaware) Inc. Method and system for displaying an analog image by a digital display device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE40859E1 (en) 1997-02-24 2009-07-21 Genesis Microchip (Delaware) Inc. Method and system for displaying an analog image by a digital display device
USRE41192E1 (en) * 1997-02-24 2010-04-06 Genesis Microchip Inc. Method and system for displaying an analog image by a digital display device
USRE42615E1 (en) 1997-02-24 2011-08-16 Genesis Microchip (Delaware) Inc. Method and system for displaying an analog image by a digital display device
USRE43573E1 (en) 1997-02-24 2012-08-14 Genesis Microchip (Delaware) Inc. Method and system for displaying an analog image by a digital display device

Also Published As

Publication number Publication date
JP2858661B2 (en) 1999-02-17

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