JPH02298140A - Method and equipment for controlling multi-channel communication - Google Patents

Abstract

PURPOSE:To attain high speed communication control at every communication path by providing a shared memory accessed from both a communication adaptor and a host software to a channel between both, receiving/giving the data via the common memory and operating the host software and a communication control section independently. CONSTITUTION:A communication adaptor 3 and a host program 4 are connected logically through one connection port 5 and the transmission/reception of the data are implemented by the shared memory provided on the connection port 5. Service sections a-e except a call service section (f) in the host program 4 and processing sections a-e except a call processing section (f) in the communication adaptor 3 apply operation instruction and report to an opposite party corresponding to identifiers a-e via the connection port 5. Since the plural communication control sections are operated independently, high speed communication is realized with a different communication protocol from each channel.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a communication method, particularly to a communication method and apparatus suitable for multi-line communication control.

[Conventional technology]

With faster communication speeds and larger volumes of communication data, the communication control method for information processing devices such as personal computers and workstations is changing so that the system processor controls the line controller and performs all data transmission control and data processing. 9 For example, the system has changed to a method in which a communication adapter is provided, and in addition to a line controller, a processor dedicated to communication control processing, memory, etc. are provided in the communication adapter to reduce the load on the communication control processing on the system processor9. Tokusho 63-18188, in which a familiar person appeared first
In No. 2, "Communication Adapter Control System and Communication Adapter," a communication adapter is provided with a processor dedicated to communication and a shared memory, and data is received and transferred via this shared memory. Also.

Two communication adapters are connected to the system processor to control two different lines, creating a so-called gateway that absorbs differences in protocol conversion and transmission speed between the two lines.

[Problem to be solved by the invention]

However, when controlling multiple lines using the above technology, a communication adapter is required for each line, which not only increases the scale, but also requires the system processor to control each adapter that is distributed over several pieces. It is not easy to manage, and it is not easy to exchange information between communication processors in different communication adapters.

especially.

When connecting to an integrated service digital network (15DN), three channels, for example 2B+D, are multiplexed on one line, and the D channel is in charge of call control for the two B channels. It is not easy to share each channel of 2B+D with three adapters.

SUMMARY OF THE INVENTION An object of the present invention is to provide a communication control method and apparatus for controlling multiple lines such as rsDN easily and at high speed.

[Means to solve the problem]

In order to achieve the above object, the present invention provides a multi-line communication control method for controlling communication of a plurality of lines, the communication control group consisting of a plurality of communication control units corresponding to communication paths that are a plurality of lines. In addition, one channel is provided to connect this communication control group to the higher-level software that controls it, and the identifier in the command from the higher-level software is One communication control unit is specified. Furthermore, a call control unit is provided in the communication control group, and multi-line communication control is performed while passing call commands to the call control unit directly or indirectly through one of the communication control units. conduct. In addition, the call control unit is made directly visible from the host software, and the identifier in the command specifies either the call control unit or the communication control unit to perform multi-line communication control. be.

Furthermore, it is possible to control each communication path using different communication procedures as necessary.

Furthermore, a shared memory that can be accessed from both sides is provided in the channel between the communication adapter and the host software, and data is received and passed through the shared memory.

[Effect]

Because the host software and communication control unit operate independently, high-speed communication control is possible for each communication path.

It is also possible to easily change the communication procedure for each communication channel. Furthermore, since the host software and a plurality of communication control units are connected through one channel, the interface is simple, and not only the control becomes simple, but also errors in operating procedures are reduced.

〔Example〕

Hereinafter, one embodiment of the present invention will be described using the drawings.

FIG. 1 is a block diagram showing an example of the configuration of a multi-line communication control system in which the present invention is adopted. In the figure, 1 is a workstation main body, and this main body 1
is equipped with a communication adapter 3 as a communication control group, and the host program 4 controls the communication adapter 3.
The communication adapter 3 and the host program 4 are logically connected through one connection port 5, and data exchange is performed in a shared memory provided in the connection port 5, which will be described in detail later. The communication adapter 3 includes, for example, an l5DN line 3 for connecting to an l5DN that provides a 2B+D basic interface.
71 and a handset 365 for making calls are connected. The 15DN line 371 can use, for example, two B channels and one D channel at the same time for voice and data communications.In this embodiment, there are two types of channel usage as follows.

(,) Data communication (D channel) + Data communication (B channel) + Data communication (B channel) (b) Data communication (
D channel) + data communication (B channel) 10 voice communication (
B channel) For configuration (a), the handset 365 is not necessarily required.

As is clear from FIG. 1, the communication adapter 3 includes adapter processing units a51. Data communication processing unit C52゜transmission control unit c
53. Data communication processing unit d54. Transmission control unit d55. Call processing unit f56. Data communication processing unit b57. Audio processing section e
58. It is composed of a transmission control section g59 and a line multiplexing section 60. Here, data communication processing unit 52C2 transmission control unit c53
is one communication control section, data communication processing section 54d, transmission control section d55 is one communication control section, data communication processing section b5
8. The transmission control section g59 is one communication control section.

The adapter processing section a'51 and the audio processing section e58 are each one communication control section. Further, the call processing section f56 and the transmission control section g59 constitute a call control section.

On the other hand, the upper program 4 is the adapter service part a41.
．． Data communication service section C42, data communication service section d43. Call service section f44. Data communication service department b
45. It consists of a telephone service section 846. Each service section a except for the call service section f in the upper level program 4
Each of the processing units a to e other than the call processing unit f in the communication adapter 3 and the call processing unit f in the communication adapter 3 can issue operational instructions and reports only to the other party corresponding to the identifier ae through the connection port 5.

The call service section f44 of the host program 4 is a section that performs connection services for data or telephone communications, and is connected to service sections other than the data communication service section b45, and issues call setting instructions to the communication adapter 3 through the service sections ae. is served. The reason why the call service section f44 and the data communication service section b45 are not connected is because D channel data communication is limited to the packet switching method and call control is not required.

The adapter processing unit a51 performs overall management and management of the communication adapter 3, such as initialization and self-diagnosis, as will be detailed later.
Take control. After the power is turned on, the adapter processing section a51 operates first.

The data communication processing section c52 and the transmission control section c53 are sections that perform data communication on the B1 channel. The data communication processing unit c52 is in charge of an interface with the data communication service unit C42, commands related to calls are sent to the call processing unit f56, and commands related to other data communication are sent to the transmission control unit c.
The transmission control unit c53 transmits the data to the layer 2 of the 7N model of open system interconnection (○SI).
Here, for example,
HDLC-B A (Illight Level
Data Link Control Proc
HDLC-BA, HDLC-UN or HDLC-BA, HDLC-UN
()Iigh Level Data Link
Control Procedure (Unbalanced Regular Response Mode Class) Data communication control is performed using the circuit switching method.

The call processing unit f56 corresponds to the network layer portion of O8I layer 3 and performs call control for data communication and voice communication. Data communication processing unit c52 and data communication processing unit d54
CCITT in response to call setting requests from voice processing unit e58.
Call control is performed in accordance with Recommendation R.451.

The data communication processing section d54 and the transmission control section d55 are sections that perform data communication on the B2 channel. The data communication processing unit d54 is in charge of the interface with the data communication service unit d43, commands related to calls are sent to the call processing unit f56, and commands related to other data communication are sent to the transmission control unit d.
Similarly to the transmission control unit c53, the transmission control unit d55 transmits the data to the 55.
Performs data communication control using the C-UN circuit switching system.

The data communication processing unit b57 is a part that performs D channel data communication. Once a command is received from the data communication service section b45, it is passed to the transmission control section g59.

The voice processing unit e58 is a part that performs voice communication.

A shared memory in the connection port 5 is provided with an area for inputting and outputting audio. This is called an audio file, and audio communication is performed between the audio file, the handset 365, and the B1 channel or B1 channel.
If the handset 365 is connected to the 15DN network between either of the two channels, it becomes normal telephone communication, and if the handset 365 is connected to the voice file, messages can be recorded and played back locally. Additionally, by connecting an audio file to an 15DN, you can record the other party's voice and play and transmit the contents of the audio file. When recording, use ADPCM (Adaptive
Differential Pulse Code
64K audio using
Compress from bps to 32 Kbps or 24K bps to extend recording time. When playing, expand to 64
Return to Kbps digital audio. Voice and data communications can be communicated simultaneously if they are on different channels.

The transmission control unit g59 corresponds to the data link layer part of the SI layer 2, and controls the transmission of the D channel.
TT Recommendation 1.44.1 (LAPD: Link Ac
cess procedure on the
D-channel) and sent to the D-channel.

The line multiplexing unit 60 corresponds to the OSI physical layer part of layer 1, and is based on CCITT recommendation 1.430.
1, B2 channel multiplexing, etc.

In summary, it can be seen that the communication adapter 3 in this embodiment has three types of functions: a data communication function, a voice communication function, and a call control function.

Data communication uses all channels: D channel, B1 channel, and B2 channel. In the D channel, CCIT
H
DLC-BA packet switching method or HDLC-
Data communication is performed using the line switching method using BA and HDLC-UN, and the transmission speed is 16 Kbps for the D channel.
The B1°B2 channel is 64 Kbps. Naturally, the D channel, B1 channel, and B2 channel are capable of data communication independently.

Voice communication is performed by selecting either the B1 channel or the B2 channel, and it is also possible to record and play back audio files.

Call control uses the D channel. Performs channel connections for data and voice communications. The control method is based on CCITT Recommendation 1.441 (LAPD), I.

Follow the steps in 451.

FIG. 2 shows an example of a network usage pattern to which this embodiment is applied. Workstation (WS) 1
．． 11, host computer 12, gateway (GW
) 13 and 14 incorporate the communication adapter 3 shown in the embodiment of FIG. 1 and are connected to the 15DN 15. Among them, the host 1-computer 12 and GWs 13 and 14 do not have the handset cell 1-, and GW 13.14 has the WS
IC;.

17.18.19 and local area network (L
AN), and the data is transferred from the LAN to l5DN1.
5. It has the role of connecting from l5DN15 to the LAN. At this time, by packetizing the data and storing and transmitting it, for example, 10 Mbps LAN and 64 Kb
Absorbing the difference in transmission speed with PS l5DN15,
Differences in communication procedures between LAN and 15DN15 are absorbed by protocol conversion.

I5 Each device connected to DNI 5 is Bl.

B2. It has three channels (D) and can communicate with different parties in any combination.

In Figure 2, the following three communication forms are listed.

(a) Communication between WSs (b) Cluster communication (C) Communication between LANs Communication between WSs in (a) is between WSI and WSII.
1 and B2 channels to simultaneously communicate data and voice. Naturally, voice is a real-time communication. The cluster communication in (b) is 1:n communication in which the host computer 12 communicates with a plurality of WSs via the GW 13. At this time, the GW 13 becomes a terminal control device and controls the WSI 6° 17 that operates as a terminal. The inter-LAN communication in (c) is for connecting the GW 13 and GW 14 via the 15DN 15 to make the LAN of the GW 13 and the LAN of the GW 14 appear logically as one LAN.

This allows, for example, WSI7 to operate as if it were connected to the same LAN.
As shown in Figure 2, the host computer 12, gateway (
GW) 13.14 does not have handsera 1~, but it is possible to attach a handset. In the case where the GW 13.14 is installed remotely from the host computer 12, for example, it becomes difficult to add a WS connected to the LAN and perform a trial run, or to investigate the cause of a failure. In such a case, host computer 1
If handsets are provided in GW 2 and GW 12 and 13, maintenance personnel can easily perform test runs and investigate the cause of failures while talking to each other using the handsets.

FIG. 3 is a diagram showing an example of a WSI body device,
Here, Hitachi's workstation 2050/
Let's take 32 as an example. The main body 101 has option slots No. 11 to No. 67, and the communication adapter 3 shown in FIG. 1 can be installed in any of the empty slots 106 from No. 1 to No. 5. 1"!, remove the dummy package 111 from that slot and insert it. The upper program in Figure 1 is the basic memory package 1
09 and an optional memory package installed in the main memory slot 110, and executed by the CPU package 105.

Next, the interface between the host program 4 and the communication adapter 3 shown in FIG. 1 will be explained. The operation instruction from the host program 4 to the communication adapter 3 is called a startup command.
A report from the communication adapter 3 to the higher-level program 4 is called a report command. The startup command and report command are connected to connection port 5.
It is delivered via. The startup command and the report command flow simultaneously, but only one command each. That is, although there are logically five channels in FIG. 1, there is physically one channel.

The format of the startup command is shown in FIG. 4, and the format of the report command is shown in FIG. 5. Both the startup command and the report command consist of 8 words and 16 bits/word. The startup command code and the report command code represent the type of command, and the parameters are command modification information. The sequence number is used in the order in which the commands are issued.For example, it is incremented by 1 each time a startup command is issued, and if the sequence number of the startup command is copied and passed as is in the report command, then the same type of startup command can be used in the upper program 4. Even if you issue the command continuously, you can check the report command code and sequence number to find out which startup command the response was issued to. The identifier encodes the destination of the startup command and the report command, and indicates the corresponding processing section of the communication adapter 3 or the corresponding service section of the higher-level program 4.

FIG. 6 shows the service section and processing section that correspond to the identifier.

There are five types of identifiers from 00 to 04. A large amount of data accompanying the startup command and report command, such as transmission and receipt data, is stored in a shared memory within the connection port S and transferred. Pointers in the start command and report command indicate the start address of the data, and the data length is the size of the data. A call identifier is used to identify multiple calls that exist simultaneously between one service unit and processing unit6.
For example, if an incoming call is received during a call, a call identifier different from that used during the call is used to notify the higher-level program, thereby implementing a call waiting service or the like.

Figure 7 shows the types and codes of startup commands, report commands, and service parts that can use these commands.

The processing section is shown.

An example of how to use the start command and the report command will be explained using the sequence charts shown in FIG. 8 and subsequent figures. The letters a to e in parentheses next to the startup command and report command are abbreviations for identifiers.

FIG. 8 is a rise resequence diagram. When the communication adapter 3 is powered on, the adapter processing section a5 in FIG.
1 operates and 5 After initializing the communication adapter 3, perform a self-diagnosis, display the results, and issue the end command "In1tiali".
zed(a)" to the adapter service section a41 of the upper program 4. The adapter service section a41 stores data communication processing section C52゜d54.b57. call processing section f56. The program for the audio processing section 858 is set and a program loading command "IPL(a)" is issued. When the adapter processing unit a51 receives the "IPL(a)" command, it loads the corresponding program into the communication adapter 3, and after finishing, sends the loading end command "IPL end(a)".
)" and jumps to the loaded program. The program of the transmission control unit c53, d55 is loaded immediately before data communication is performed.Transmission control unit g59
Although the two-line multiplexing unit 60 can be realized by a program, a dedicated LSI is used here, so no program loading is performed.

FIG. 9 is a diagram showing an example of a data communication sequence using the B1 channel. Communication adapter 3 and l5DN15
In the sequence between 2 and 3, thick lines mean use of the D channel, and thin lines mean use of the B channel. First, when a call setup request is sent from the call service section f44 to the data communication service section c42, the data communication service section c42 issues a call setup request command "'Cal 1 (c)." When the data communication processing unit c52 receives this and passes it to the call processing unit f56,
The call processing unit f56 performs control according to the procedure of 1.451, and the transmission control unit g59 sends a call setup message (SET UP) to the D channel of 15DN15 while controlling the data link using LAPD and sends a response message (CONN). wait. Call setup acceptance message (CAL)
L PROC) is the call setup message (
This is a message to notify that the SET UP) has been received.

I S D N 15 Response message (CONN)
) comes, a response confirmation message (C○
N N A, G K) is returned, and a call setting end command “Ca1led” is sent to the data communication service unit c42.
(c)” is returned.

At the time when the data communication service section c42 notifies the call service section f44 that a call has been set up, the B1 channel is connected to the other party, and from then on, communication will be on the B1 channel. The data communication service section c42 first sets the program of the transmission control section c53 in the shared memory in the connection port 5 and issues a program loading command "'I".
P L (c) ” is issued.Data communication processing unit c
When 52 receives "I P L (C)", it loads the corresponding program into 1 communication adapter 3 and returns the loading end command "I P L and (c)".
When the IPL ends, the data communication service unit c42 issues a link setting command "Connect (c)",
Upon receiving this, the transmission control unit c53 uses the B1 channel to output the asynchronous balanced mode setting frame rsABMJ according to the HDLC-BA procedure, and waits for the report frame rUAJ.When the report frame rUAj arrives, the data communication service unit Link setting end command to c42
"Connected (c)" is returned, and the B1 channel link is now established and information transfer is possible.

The data transmission procedure begins with the data communication service section c4.
2 sets the transmission data in the shared memory in the connection port 5 and issues a transmission command "S N D (c)".

The transmission control unit c53 sends this as an information transfer frame "work" to the El channel according to the HDLC-BA procedure, and waits for a notification frame rRRJ from the other party. r
Upon receiving the RRJ frame, the transmission control unit c53
Send end command “SN” to data communication service section c42
D BufRel(c)''' is returned to notify that the transmission has ended and the buffer containing the transmission data has been released.

To disconnect the B1 channel link, send the link disconnection command "D 1sc" from the data communication service section c42.
onnect (c)” and receive it f,=
The transmission control unit c53 outputs the disconnection mode setting frame rDISCJ to the B1 channel, and outputs the report frame rUA.
Wait for J. When the report frame rUAJ comes.

"Disconnection completion report command to data communication service department c42"
D 1sconnected (c)" is returned, which means that the information transfer link of the B1 channel is disconnected. Call disconnection follows the same procedure as call setup. From the call service section f44 to the data communication service section c42. When the call disconnection request is received, the data communication service unit C42 issues a call disconnection request command “' Ki 11 (c)”. The data communication processing unit c52 receives this and the call processing unit f5.
6, the call processing unit f5.6 and the transmission control unit g59 control and send a disconnection message (DISC) to the call processing unit 5DN15.
When the release message (REL) arrives, a release completion message (REL COMP) is returned to the l5DN15, and a disconnection completion command is sent to the data communication service section c42.
llad (c)” is returned. Data communication service section c4
The B1 channel is completely released from the 15DN 15 when the call service section f44 is notified that the call has been disconnected.

The procedure for receiving a call or receiving data is as shown in the right half of FIG. The start-up sequence is as shown in FIG. 8, and the steps after start-up will be explained here.

The transmission control unit g59 transmits I5DN15 through the D channel.
When you receive a call setup message (SET UP) from
This is notified to the call processing unit f56, and the call processing unit f56
Select an empty channel among the 1 and B2 channels. now,
Assume that channel B2 is vacant. The call processing unit f56 is
B2 channel data communication processing unit d54. It notifies the call service section f44 through the data communication service section d43 that the call has arrived using the incoming call report command "Ca1l Req (d)" and waits for an instruction from the call service section f44. Reception message (CA
LL PROC). Call service department f44
Now, when you are ready to set up a call, please contact the data communication service department d.
43. Call processing unit f56 through data communication processing unit d54
Incoming call confirmation command ゛'CAL L Cnf(d)
”, and the call processing unit f56 that received this performs control according to the procedure of 1.451, and transmits the data from the transmission control unit g59 to l5D.
Sends a response message (CONN) to NL5. The B2 channel is now connected to the other party. l5D
Response confirmation message (CONN ACK) from N15
) is a message that notifies that the 15DN 15 has received the response message (CONN).

Next, the host program 4 uses the program loading command “I P L (d)” to load the transmission control unit d55.
This program will be loaded into the communication adapter 3, but since this procedure is the same as described above, it will be omitted here. When the transmission control unit d55 receives the asynchronous balanced mode setting 7L/-msABMJ from the B2 channel while operating according to HDLC-BA,
At the same time as transitioning to the link establishment state and returning a report frame rUAJ, a link setting report command “Conn” is sent to the data communication service unit d43 through the data communication processing unit d54.
ect Req(d)" reports that there is a link setup request and that it has been established. This makes it possible to send and receive data on the B2 channel. Information transfer frame "
When the transmission control unit d55 receives the notification frame r
The RRJ notifies the other party that the information transfer frame "TE" has been received, and also sends a reception report command "R" to the data communication service section d43 through the data communication processing section d54.
CV(d)" to notify that data has been received. After the data communication service section d43 processes the received data,
Reception confirmation command “RCV Buf Re1(d)
”, the transmission control unit d55 returns the reception buffer to the transmission control unit d55, and the transmission control unit d55 receives the disconnection mode setting frame r from the B2 channel.
Upon receiving DIscJ, it transitions to a link disconnection state, returns a report frame rUAJ, and reports that the link has been disconnected to the data communication service unit d43 through the data communication processing unit d54 using a link disconnection report command “DisconnectReq (cl)”. When the transmission control unit g59 receives a disconnection message (DISC) from the D channel, it notifies the call processing unit f56 of the disconnection message (DISC), and the call processing unit f56 sends a call disconnection report command to the call service unit f44 through the data communication service unit d43. )'' with l5D
Notification that there is a call disconnection request from N15 and waits for an instruction from the call service section f44. When the call service section f44 is ready to disconnect the call, the data communication service section d4
3. Returning a call disconnection confirmation command “K11lCnf(d)” to the call processing unit f56 through the data communication processing unit d54;
The call processing unit f56 that receives this performs control according to the procedure of 1.45!1, and sends a release message (REL) from the transmission control unit g59 to the 15DN15. 15DN15 notifies that it has received the release message (REL) with a release completion message (REL COMP). This means that the B2 channel is completely released from l5DN15.

10th V7! i is a diagram showing an example of a voice communication sequence. Call setting and call processing are performed by the telephone service section e46 and voice processing section e58 shown in FIG. The processing procedure is the same as in the case of data communication in FIG.

In the case of the call on the left side of FIG. 10, the telephone service unit e46 sends the call setting end command from the voice processing unit a58.
ed (e)", in the case of the incoming call shown on the right side of FIG. (CONN), and a response confirmation message (CONN) is sent from l5DN15.
ACK), the handset 365 is connected to either the B1 or B2 channel and ready to talk. You can send a voice message while talking on the phone. When the telephone service section e46 sets the message voice in the shared memory in the connection port 5 in FIG. 1 and issues a playback command "Play Back (e)" to the voice processing section e58, the voice processing section e58 is disconnected from the handset 365, and the message voice stored in the shared memory is sent to the channel. When all message voices have been sent,
The audio processing unit a58 issues a playback end command “Play Back End (a) to the telephone service unit e46.
” and reconnects the handset 365 to the original channel.

If you want to record the other party's voice during a call, do it as shown on the right side of Fig. 10, from the telephone service section e46 to the voice processing section e.
58, a recording command "Recard (e)" is issued. The voice processing unit e58 also records the voice input to the handset 365 in the shared memory specified by the telephone service unit e46, and after the specified time has elapsed, the voice processing unit e58 records the voice input to the handset 365.
Enter the recording end command “Recorded (e)”
The recorded voice can also be heard on the handset 365 if necessary. The procedure for disconnecting the call is the same as that for data communication in FIG. 9, and will not be described here.

FIG. 11 is a block diagram showing an embodiment of another multi-line communication control system in which the present invention is adopted. In the figure, 101 is a workstation main body. Similar to FIG. 1, the main body 101 is equipped with a communication adapter 301, and a host program 401 controls the communication adapter 301. The communication adapter 301 and a host program 401 that controls the communication adapter 301 are logically connected through a connection port 501 . Top program 401
The configuration is the same as the example in Figure 1, with adapter service part a4
11. Data communication service department c421, data communication service department d431. Call service section f441. Data communication service department b451. It consists of a telephone service department e461.

The configuration of the communication adapter 301 is also the same as the example shown in FIG. 1, with adapter processing units a511. Data communication processing unit c521. Transmission control unit c531. Data communication processing unit d 541. Transmission control unit d551. Call processing unit f561. Data communication processing unit b
571. Audio processing unit e581. Transmission control unit g591. It consists of a line multiplexing section 601. In this embodiment, the call service section f
441 and the call processing unit f561 are connected via an adapter service unit a441 with an identifier a to an adapter processing unit a551. This has the advantage that call control and data communication or voice communication are separated, and commands between the service section in the host program 401 and the processing section in the communication adapter 301 are simplified.

FIG. 12 shows the format of the start command, and FIG. 13 shows the format of the report command. The difference from FIGS. 4 and 5 is that a request identifier and a response identifier are newly provided. The request identifier is used when the call service section f441 issues a call setup request to the communication adapter 301 to specify a data communication processing section and a voice processing section to be set up a call.

The response identifier is used to specify the data communication service section and voice service section to which the call processing section f561 receives a call and notifies the call service section f441 of the received call.

FIG. 13 shows examples of types and codes of startup commands and report commands, and service units and processing units that can use these commands. What is different from FIG. 7 is the call-related command “C
a1l”, “Ca1led”.

“Ca1l Req”, “Ca1l Cnf”, ”
K11l'', 1lled''.

“K11l Req”, “K11l Req”, “
K11l Cnf" is handled by the adapter service section a411 and the adapter processing section a511, but the rest remains the same. Therefore, the processing procedure is also the same as that shown in FIGS. 9 and 10.
In the diagram, the commands “Ca1l” and “Ca1led”
y “Ca1l ReQ” + “Ca1l Cnf”
, “K11l”, “K11led”, “ill
"Req".

The procedure itself does not change except that the identifiers of ")[ill Cnf" are all a.

FIG. 26 is a block diagram showing a configuration example of another multi-line communication control system in which the present invention is adopted. In the figure, 102 is a workstation main body. Similar to FIG. 1, the main body 102 is equipped with a communication adapter 302, and a host program 402 controls the communication adapter 302. The communication adapter 302 and a host program 402 that controls the communication adapter 302 are logically connected through a connection port 502 . Upper program 402
The configuration is the same as the example in Figure 1, with adapter service part a4
12. Data communication service department c422, data communication service department d432. Call service section f442. Data communication service department b452. It consists of a telephone service department e462.

The configuration of the communication adapter 302 is also the same as the example shown in FIG. 1, with adapter processing units a512. Data communication processing unit c522. Transmission control unit c532. Data communication processing unit d542. Transmission control unit d552. Call processing unit f562. Data communication processing unit b5
72. Audio processing unit e582. The transmission control section g592 consists of a line multiplexing section 60. In this embodiment, the call service section f442
The difference from the embodiment shown in FIG. 1 is that the call processing unit f562 is directly connected to the call processing unit f562. This allows call-related commands and other commands to be separated by identifier.
Service section in the upper program 402 and communication adapter 3
Commands between the processing units in 02 are simplified and errors are less likely to occur. Further, for example, if there is an incoming call from another party while talking on the handset 365, the call processing section f and the call service section f are directly connected, unlike in FIG. can. The formats of the startup command and the report command are the same as the example shown in FIG. 11, and are shown in FIGS. 12 and 13. The request identifier is sent by the call service unit f442 to the communication adapter 302.
It is used to specify the data communication processing unit and voice processing unit to be set up when making a call setup request.

The response identifier is used to designate the data communication service section and voice service section to which the call is received when the call processing section f562 receives a call and notifies the call service section f442 of the received call.

Figure 27 shows the types and codes of startup commands and report commands, and examples of service units and processing units that can use these commands.What differs from Figure 7 is commands related to calls,
"Ca1l", "Ca1led", "Ca1l"
"Req".

“Ca1l Cnf”, “K11l”, 1Kill
ed”, “K11l Req”.

The rest remains the same except that "K11l Cnf" is handled by the call service section f442 and the call processing section f562. Therefore, the processing procedure is also as shown in FIGS. 9 and 10.
Command “Ca1l”, Ca1led”, “C
a1lReq', “Ca1l Cnf” Jj[1
111T, “K11led”, #1llRe
q'' and ``K11l Cnf'' are all changed to f, but the procedure itself remains unchanged.

Next, an example of the hardware of the communication adapter 3 that realizes FIGS. 1, 11, and 26 will be described. Hereinafter, the implementation method will be explained based on the embodiment shown in FIG. 1, but it goes without saying that the same structure can be applied to the embodiments shown in FIGS. 11 and 26 as well.

FIG. 15 is a block diagram of the communication adapter 3. Regarding this configuration, for example, 1-33
Please refer to No. 563 "Multi-line communication control method",
Now, a system processor section 23 is provided in the workstation main body 1, and a communication adapter 3 is mounted on this main body 1.

The communication adapter 3 is connected to an ISDN line 371 that provides a 2B+D basic interface and a handset 365 for communication. System processor section 23
is C, which controls the entire main body 1 and the communication adapter 3.
It is composed of a main memory 21 in which programs and data for the PU2 and CPU2 are stored. System processor section 2
3 and the communication adapter 3 are connected by the system bus 22.
The communication adapter 3 includes sub-processor sections 32 and 33 that perform data communication on the B1 or B2 channel, a main processor section 34 that performs voice communication on the B channel, data communication on the D channel, call control on the D channel, etc., and data communication on the D channel. communication,
LA that performs data link layer level processing for call control
PD processing unit 35, line driver 37 that multiplexes and separates D channel, B1 channel, B2 channel, B1 channel, B2 channel
A B channel control section 36, a system processor section 23, a main processor section 34. It is composed of a memory sharing section 31 that exchanges data while sharing memory with sub-processor sections 32 and 33.

The upper program 4 in Figure 1 is the main memory 2 in Figure 15.
1 and executed by CPU 2. Line multiplexing section 60 in FIG. The transmission control unit g59 is the line driver 3 in FIG.
7. The transmission control section C53 and the transmission control section d55 shown in FIG. 1 are implemented by the LAPD processing section 35, and are program-processed by the CPU and RAM of the sub-processor sections 32 and 33 shown in FIG.

Other adapter processing unit a51, data communication processing unit c5
2. Data communication processing unit d54. Data communication processing unit b57
．． Call processing unit f56. The audio processing section 858 is all program-processed by the CPU 341 and RAM 343 of the main processor section 34 shown in FIG. However, a part of the adapter processing unit a51 is stored in the ROMa342 and the CPU a341
is executed.

The connection port 5 in FIG. 1 corresponds to the memory share unit 31 in FIG. 15, and the shared memory inside the connection port 5 is realized by RAM e 312 on the memory share unit 3.

The system processor section 23 and the memory share section 31 are connected by a system bus 22. Memory share section 31. Main processor section 34. The sub-processor units 32 and 33 are each connected to a local bus e313 to exchange data. Local bus a3 of main processor section 34
45 includes a line driver 37. LAPD processing section 35. B
A channel control section 36 is connected, and the main processor section 34 controls them. The 2B+D channels of the 15DN line 371 are separated and multiplexed by the line driver 37, and the D channel among the channels is sent to the LAPD processing unit 35.
The B2 channel is connected to a B channel control section 36. The B channel control section 36 controls the B1 and B2 channels to the handset 365 and the sub-processor sections 32, 33 . . . according to instructions from the main processor section 34. It is connected to the main processor section 34.

Main processor section 34, sub-processor sections 32, 33, LA
The PD processing section 35 and the system processor section 22 each have a CPU (central processing unit), memory, and bus, and can operate independently.

The main processor section 34 is a ROM (read-only).
memory) a 342. RAMa 343, ROMa
CPU3 that executes programs in 342 and RAM343
41. and a controller a344, which are connected to a local bus a345. ROMa34
2 is for self-diagnosis of the communication adapter 3 and RAM a 34
It is a read-only memory that stores a program for loading the program stored in 3 from RAM e 312, and has a capacity of 32 bytes.6 communication adapter 3
When the power is turned on, the CPUa341 executes this ROMa342.
s RAM a3 executed from the beginning of the program
43 is a readable/writable memory that stores programs for processing voice communication and call control procedures, and 128
The controller a344, which has a byte capacity, controls the bus between the local bus e313 and the local bus 8345, and the CPU a341 controls the ROMa342. Performs access control when accessing RAMa343, ROMa3
42. The CPUa 34 L that executes RAMa 343 uses, for example, an 8-pin 1-microcomputer manufactured by Hitachi, Ltd., HD64180S, which operates at 10 MHz.

The sub-processor section 32 is a subordinate processor that operates under the main processor section 34. The sub-processor section 32 is
AMb322. CPUb321. which executes the program in RAMb322. It consists of a controller b324 and a serial controller b322 that transmits and receives data to a line 326 connected to the B1 or B2 channel, and these are connected to a local bus b325. RAM
b322 is a readable/writable memory that stores programs for processing HDLC-BA and HDLC-UN, which are B channel data link control procedures;
has a capacity of bytes. The controller b324 performs path control between the local bus e313 and local bus C335, access control when the CPU b321 accesses the RAM b322, and command handshaking for the main processor section 34 to instruct the sub-processor section 32 to operate and receive reports. Take control. The CPU b 321 and the serial controller b 323 that execute the programs in the RAM b 322 are, for example, a 1-chip 8-bit microcomputer manufactured by Hitachi, Ltd., HD64180S, which operates at 10 MHz. The sub-processor section 32 does not have a ROM, so the main processor section 34 has a controller b32.
The program is downloaded to the RAM b 322 via the CPU 4, and then the CPU b 321 is started.

The sub-processor section 33 is a subordinate processor that operates under the main processor section 34. The sub-processor section 33 is
AMc332. CPUc331. which executes the program of RAMc332. It consists of a controller c334 and a serial controller c332 which sends and receives data to a circuit @336 connected to the B1 or B2 channel, which are connected to a local bus c335. RAM
c332 is a readable/writable memory that stores programs for processing HDLC-BA and HDLC-UN, which are B channel data link control procedures;
The controller c334, which has a byte capacity, controls the path between the local bus e313 and the local bus C335, controls access when the CPU c331 accesses the RANc332, and allows the main processor unit 34 to instruct the sub-processor unit 33 to perform one operation. , the CPU c331 that executes the RAMc332 and the serial controller c333 that performs command handshake control for receiving reports are, for example, Hitachi's 1-chip 8 that operates at 10MHz.
It is assumed that a bit microcomputer, HD64180S, is used. The sub-processor section 33 does not have a ROM. Therefore, the main processor section 34 uses the RA via the controller C334.
The program will be downloaded to Mc332, and then CPUc331 will be started.

The LAPD processing unit 35 is a LAPD dedicated processing unit that operates under the main processor unit 34. LA, PD processing unit 35 is a CPU that executes a program in ROMd352.
d351. Serial controller d353 that transmits and receives data to and from the D channel line 372, and controller d3
Consisting of 54, these are. It is connected to local bus d355.

The ROMd 352 is a read-only memory that stores a program for processing LAPD, which is a D channel data link control procedure. The controller d354 performs path control between the local bus a345 and the local bus 6345, and the LAPD processing unit 35 uses, for example, a μPD72305 manufactured by NEC Corporation.

The B channel control unit 36 controls the ADPCM361°C0DE
C (roller decoder) 363. Driver 364 and line switching circuit 362 for connecting to hand sent 365
It is controlled by the main processor unit 34 through a local bus a345. ADPCM361 is l5DN
Bl, B2 channel of line 371 or handset 3
65 to 64 KbpsP 0M audio to 32 Kbp
s or 24 Kbps and record it to RAMe312, or compress the audio of RAM5312 to 64 Kbps.
This is a compression/expansion circuit for decompressing the PCM audio and sending it to the B1, B2 channel or the handset 365.

The C0DEC363 is a digital-to-analog conversion circuit that exchanges 64 KbpsP 0M audio and analog audio.The 1-line switching circuit 362 is a B1 channel 373.
, B2 channel 374 to the line 326, line 336, ADPCM 361 or CODEC 363, or for directly connecting ADPCM 361 and CODEC 363. ADPCM361, for example,
NEC's μPD77C30, C0DEC363 is 1
It is assumed that HD44278 manufactured by Hitachi, Ltd. is used.

The line driver 37 connects C through the local bus a345.
l5DN controlled and multiplexed by PUa 341
Line 371 to D channel 372, B1 channel 37
3. To separate the B2 channel 374, for example, μPD98201OF manufactured by NEC Corporation is used.

The memory share unit 31 is composed of a RAM e 312 and a controller e311. RAMe312 is a readable/writable shared memory that can be accessed from both the system bus 22 and local bus e313, and has a capacity of 512 bytes.
311 is memory conflict arbitration when RAMe 312 is simultaneously accessed from the system bus 22 and local bus e 313, the main processor section 34, and the sub processor section 3.
2. Performs bus contention arbitration in response to a request to use the local bus e312 from the sub-processor section 33, and command handshake control for the system processor section 23 to issue operational instructions to the main processor section 34 and receive reports.

FIG. 16 shows the memory storage state of RAMe 312.

To start up communication adapter 3, use the CPU that will not be used immediately.
a341. The system processor section 23 uses the transmission buffer and reception buffer areas of the CPU b 32L and CPU c 331, and the system processor unit 23 stores the CP in the transmission and reception buffer area of FIG.
Insert the Ua 341 program and instruct the CPUa 341 to load the program.Loading is performed using the ROM a342 program, and the RAM 5312
After loading the corresponding program, the storage state shown in FIG. 16 will be achieved. Areas used by the CPU a 341 include an initial setting block, a D channel, a transmission buffer used for channel data communication, a reception buffer, and a voice storage area used for voice communication. Areas used in the CP'Ub 321 include an initial setting block, a transmission buffer used for B channel data communication, and a reception buffer. Areas used by the CPUc 331 include an initial setting block, a transmission buffer used for B channel data communication, and a reception buffer. The initial setting block is an area used to first agree on operating conditions between the system processor section 23 and the communication adapter 3. For example, the maximum transmission/reception data length and timeout value set in the system processor section 23, the transmission allocated by the adapter, etc. There are buffers, receive buffer locations, sizes, etc. Communication control program A2 Communication control program B
is a program executed by the CPUb 321 and CPUc 331, and the main processor unit 34, which is resident in the RAMe 312, freely downloads the communication control program to the sub-processor unit 32 or 33 as necessary. can be exchanged for. The failure logging area is where communication errors and hardware errors that occur within the communication adapter 3 are recorded.
Commonly used by the CPU 331.

FIG. 17 shows the memory space of four local buses 325, 335, 313° 345 inside the communication adapter 3 of FIG. 15, and this is seen from the CPU connected to each local bus. It can also be said to represent the memory space location of hardware resources. The thick lines in the figure represent the locations of existing local buses, and what is visible from other local buses is the mapping position as shown in FIG. 17.

The local bus b325 has a 1M byte memory space, and from the lowest part of the memory space, a 32 byte RAM b322 where programs are stored and a controller b32.
4, RAMe 312 is allocated to the topmost part of the memory space. Since the sub-processor section 32 is a subordinate processor that operates under the main processor section 34, the sub-processor section 32 is connected to another sub-processor section 33 or the main processor section 3.
4 hardware resources are not visible.

The local bus o335 has a 1M byte memory space, and from the lowest part of the memory space, a byte RAMc 332 and a controller C334 are allocated to 32 where the program is stored, and RAMe312 is allocated to the highest part of the memory space. There is. The sub-processor section 33 is the main processor section 3.
4, the sub-processor section 33 cannot see the hardware resources of another sub-processor section 32 or the main processor section 34.

The local bus e313 has a 1M byte space, and the controller e311 is allocated to the lowest part of the memory space, and the RAMe3L2 is allocated to the highest part of the memory space. In addition, RAMc332. which is a hardware resource of local bus b325 and local bus c335. controller c33
4. RAMb322. In order to make the controller b324 accessible from the local bus a345,
7 is temporarily mapped to the memory space of the local bus e313 as shown in FIG. RAMb 322 and controller b3
24 is local bus b325 and local bus e313
The memory space is different.

This address conversion is performed by the controller b324. Furthermore, the controller C334 performs address conversion for the RAMc332 and the controller C334.

The local bus a345 has a 1M byte memory space, and from the lowest part of the memory space to the ROM a342, RA
Ma343. Controller a 344° Controller d
354. Line driver 37, ADPCM361. C0D
EC363, controller e311. controller c3
34. Controller b324. RAMc332. RAM
b322. RAMe312 is allocated. Controller e311, RAMc332. Controller 334° RAMb322. Although the memory space of the controller b324 is different between the local bus e313 and the local bus a345, this address conversion is performed by the controller a344.

FIG. 18 is a block diagram showing the configuration of the controller e311 of the memory share section 31 in FIG. 15. The controller e311 includes a system bus control unit 3111 that controls the system bus 22, a local bus e control unit 3113 that controls the local bus e313, and a RAM that performs memory conflict arbitration when RAMe312 is simultaneously accessed from the system bus 22 and local bus e313. Control unit 311
2. Start flag 3115. Startup register 3116, report flag 3118. It consists of a report register 3117 and a local bus e contention arbitration section 3114.

The activation flag 3115 and activation register 3116 are as follows.

This is a register that stores a flag indicating the presence or absence of an operation instruction from the system processor section 23 to the main processor section 34, and operation instruction information.Report flag 3118, report register 3
Reference numeral 117 is a register that stores a flag indicating a report from the main processor section 34 to the system processor section 23 and report information.

The local bus e contention arbitration unit 3114
313 as the main processor section 34. Bus access contention arbitration for use by the sub-processor section 32 and the sub-processor section 33 is performed.

The system bus 22 and the local bus e313 are independent asynchronous buses, and they can access RAM without knowing each other.
I want to freely access 312. Therefore, the RAM control unit 3112 grants access rights to the RAMe 312 on a first-come, first-served basis, and when one bus is accessing the RAMe 312, the access from the other bus is made to wait.

Next, using FIG. 18, an explanation will be given of an operation instruction from the system processor section 23 to the main processor section 34, taking transmission as an example. The CPU 2 of the system processor unit 23 has RAMe
After setting the transmission data in 312 and the transmission instruction operation information in the activation register 3116, the activation flag 3115 is set. This causes an interrupt to be generated in the CPU a 341 of the main processor section 34 via the local bus e313. The CPU a 341 learns from this interrupt that the CPU 2 has started the operation. Thereafter, the CPU a 341 saves the contents of the activation register 3116 into the RAMa 343, resets the activation flag 3115, and then starts data transmission according to the contents of the operation instruction. The activation flag 3115 can be read by the CPU 2, and the CPU 2 knows that the main processor section 34 can accept the next operation instruction because the activation flag 3115 has been reset. This is an interface that allows the main processor section 34 to continuously accept operation instructions from the CPU 2 without losing them. Further, this processing is quickly executed as one interrupt processing asynchronously with data communication.

Next, the reception operation will be explained. C, P U a 34
1 stores the received data for the LAPD processing unit 35 in the RAM.
Instruct e312 to store it.

The LAPD processing unit 35 receives data into the RAMe 312 according to the instruction from the CPU a 341, and when the reception operation is completed, the LAPD processing unit 35 notifies the CPU a 341 of the reception by an interrupt. The CPUa 341 is the LAPD processing unit 35
When checking the final state of the data and confirming that the reception was performed normally, the reception report information is set in the report register 3117 and the report flag 3118 is set. This allows C.P.
An interrupt occurs to U2, and CPU2 writes report register 3.
117 is read and the report flag 3118 is reset. Since the report flag 3118 has been reset, the CPUa 341 knows that the CPU 2 can accept the next report from the main processor section 34.

This is an interface that allows the CPU 2 to continuously accept reports from the CPU a 341 without losing them.

The startup register 3116 is a register that can be read/written by the CPU 2, and the report register 3117 is a register that can be read/written by the CPU 2.
This is a register that can be read/written from a 341. In either case, reading is possible because the CPU on the write side performs a register failure check.

Next, an overview of the operation of the local bus e contention arbitration section 3114 will be explained. Bus use request signal (REQ) and use permission signal (
ACK) is the main processor section 34゜sub processor section 32
, a signal requesting that the sub-processor unit 33 use the local bus θ313, and a signal permitting use of the local bus θ313. (ADR) is 20 address signals representing 1M byte space, (DATA) is a data signal consisting of 8 bits, (
AE) is an address enable signal that informs that (ADR) is enabled, (R/W) is a read/write signal that indicates the read/write direction, (RDY) is (DAT
A) is a ready signal that indicates that it has become valid,
These signals are sent to the main processor section 34. Sub-processor unit 32. This signal is common to the sub-processor section 33.

FIG. 19 shows that the main processor section 34 uses RAM s 31
An example of a time chart for reading and writing 2 is shown from the main processor unit 34 to the local bus e313.
When the use request signal (REQa) of the local bus eM is turned on, the local bus eM coordination unit 3114 checks the bus usage status and, if the local bus e313 is in use, waits for the end of use and then issues the use permission signal (ACKa). Turn it on to give the main processor section 34 the right to use the bus. Main processor section 3
4, when (ACKa) turns on, the (R/W) signal is set in the read direction and RAMe312 reads out.
Outputs the address of (ADR,) to turn on (AE). The local bus e control unit 3113 constantly monitors whether the controller e311 or the RAM e312 is accessed by (ADR) of the local bus e313. Now, (AE), (ADR) and (R/W)
When it is determined that there is a read request to the RAMe312, the local bus e control unit 3113 reads the RAMe312.
Instructs the e control unit 3112 to read data from the RAM a 312. When the data is read, the local bus e control unit 3113 outputs this to the (DATA) signal and turns on the (RDY) signal for a predetermined period. In the main processor section 34, (RDY
) The data will be extracted from (DATA) at the timing when the signal is turned on. The method of termination is that the local bus e contention arbitration unit 3114 turns off (ACK a ) after seeing (RDY) turn from on to off, and as a result, in the main processor unit 34, (RE Q a ),
Immediately turn off (R/W), (ADR), and (AE).

(DATA) turns off at the timing when (RDY) turns off. After (RDY) is turned off.

After a specified time, the local bus e313 is released and can accept the next request for use.

The method for writing data from the main processor section 34 to the RAMe 312 also follows a similar procedure. When the main processor section 34 turns on the use request signal (REQa) of the local bus e313, the local bus eflt arbitration section 3114 checks the bus usage status, and if the local bus e313 is in use, waits for the use to end. , permission signal (AC
Ka) is turned on to give the main processor section 34 the right to use the bus. In the main processor section 34, (ACK a )
When turned on, the (R/W) signal is set in the writing direction, the address and data of RAM e 312 to be written are output to (ADR) and (DATA), and (AE) is turned on. The local bus e control unit 3113 uses the (ADR) of the local bus e313 to control the controller e3.
11 or RAMe 312 is constantly monitored to see if it is accessed.

Now, (AE), (ADR) and (R/W)
When it is determined that there is a write request to RAMe 5312, local bus e control unit 3113 instructs RA, ME control unit 3112 to write data to RAMe 312. The local bus e control unit 3113 turns on the (RDY) signal while writing data. The method of termination is that the local bus e contention arbitration unit 3114 turns off (ACKa) after seeing (RDY) turn from on to off.
As a result, in the main processor section 34, (REQa),
Immediately turn off (R/W), (ADH), and (AE). (DATA) turns off at the timing when (RDY) turns off. After (RDY) is turned off, the local bus e313 is released after a predetermined time and can accept the next usage request.

The controller e311 in FIG. 18 has an adapter identification function, a RAM e 312 position specification function, and a slot identification function.

The adapter identification function allows multiple adapters of the same type to be installed in one workstation or to be used in combination with different adapters. Assign an identification code to the adapter itself in advance.
This can be read from the system processor unit 23.

In FIG. 18, when the controller e311 is mounted on the communication adapter 3, an adapter ID signal 3119 is input to the controller e311 from the adapter board. C.P.
When U2 makes a request to read the adapter ID through the system bus 22, the system bus control unit 3111 uses an adapter ID register (not shown) and sends this adapter ID 3119 signal as is to the CPU 2.6 In this embodiment, the adapter ID is For example, '1011'' in binary
shall be used.

The RAM e position specification function is provided by the R
This allows the AMe 312 to dynamically locate the address visible from the system processor section 23. The system bus control unit 3111 in FIG. 18 has a RAMe pointer. The RAMe pointer is a register indicating the starting position of RAMe 312 as seen from the system bus 22, and is first set by the system processor unit 23. After setting, the system bus control unit 3111
compares the address of the system bus 22 and the RAM e pointer, and when the address matches the RAM e pointer, the RAM e control unit 3
A read/write request to RAMe 312 is made to RAMe 112.

The slot identification function allows the communication adapter 3 to be inserted into a plurality of slots provided in one work station, regardless of the slot. In FIG. 18, each slot is provided with a unique slot number 221 in addition to the system bus 22 signals. The system bus control unit 3111 inputs this slot number 221 and changes the addresses of various registers viewed from the system processor unit 23 according to the number.

The registers visible from the system processor section 23 include the adapter ID, the RAM pointer, and the startup flag 3115. in FIG. Startup register 3116゜Report register 3
117. There is a report flag 3118. For example, as shown in FIG. 20, slot number 0 is assigned "F 30000-F31FF, F" in hexadecimal to the system bus 22 which has a memory space of 16 M / Allocate by byte. As the system bus control unit 3111, for example, a unit similar to that included in the workstation 2050/32 manufactured by Hitachi, Ltd. can be used.

FIG. 21 is a block diagram showing the configuration of the controller 1-roller b324 in FIG. 15. The controller b324 is a local bus control unit 32 that controls the local bus e313.
41, local bus b that controls local bus b325
Control unit 3247, activation flag 3243. Startup register 3
244, a report flag 3246, a report register 3245, and an address converter 3242. Startup flag 324
3. The startup register 3244 includes a flag indicating whether there is an operation instruction from the main processor section 34 to the sub-processor section 32;
This is a register that stores operation instruction information, and report flag 3
246, the report register 3245 is the sub-processor section 32
This is a register that stores flags and report information indicating reports from to the main processor section 34.

When the RAM b 322 is accessed from the local bus e 313, the address conversion unit 3242 performs address conversion to the local bus b 325 shown in FIG. 17. Since only access from the local bus e313 to the local bus b325 is allowed, the data flow in the address translation unit 3242 is unidirectional.

Next, using FIG. 21, an explanation will be given of an operation instruction from the main processor section 34 to the sub-processor section 32, taking transmission as an example. The CPU a 341 of the main processor section 34 has RAMe
After setting transmission data in 312 and setting transmission instruction operation information in activation register 3244, activation flag 3243 is set. As a result, an interrupt is generated in the sub-processor unit 32CPUb321 via the local bus b325. In CPUb 321, this interrupt causes CPUa to
It is known from 341 that the operation has started. After that, C
PUb 321 stores the contents of startup register 3244 in RAM.
b322 and reset the startup flag 3243, data transmission is started according to the contents of the operation instruction. The startup flag 3243 can be read from the CPU a 341, and the CPU a 341 uses the startup flag 3243.
Since the sub-processor section 32 has been reset, it is known that the sub-processor section 32 can accept the next operation instruction. This is an interface that allows the sub-processor unit 32 to continuously accept operation instructions from the CPUa 341 without losing them. Further, this processing is quickly executed as an interrupt processing asynchronously with data communication.

Next, the reception operation will be explained. The cpub 321 sends the received data to the serial controller b323.
Instructs AMe 312 to store it. The serial controller b323 receives data according to the instructions of the CPU b321, and when the receiving operation is completed, the serial controller b323
321 by an interrupt to notify that reception has occurred. C.P.
When the Ub 321 checks the final status of the serial controller b 323 and confirms that reception has been performed normally, it sets reception report information in the report register 3245 and sets a report flag 3246. As a result, CPU a
341, an interrupt occurs, and the CPU a 341 reads the report information in the report register 3245 and resets the report flag 3246. Since the report flag 3246 has been reset, the CPUb 321 knows that the CPUa 341 can accept the next report from the sub-processor section 32.

This is an interface that allows the CPUa 341 to continuously accept reports from the CPUb 321 without losing them.

The startup register 3244 is read from the CPUa341/
Writable register, report register 3245 is CP
This is a register that can be read/written from Ub321. In either case, reading is possible because the CPU on the write side performs a register failure check.

Signal 3248 is from the controller for identifying controller b 324 and controller 1-controller c 334. The controller b324 and the controller 334 are the same circuit, and the controller l03248 identifies the two. In the local bus e control section 3241, the controller I
D3248 is used to determine whether a write/read request has come from the local bus e313 to the subprocessor section 32. The address conversion unit 3242 performs address conversion as shown in FIG. 17 using the controller ID 3248. Note that the controller ID 3248 can also be read by the program of the sub-processor section 32 through the local bus b control section 3247.

FIG. 22 is a block diagram showing the configuration of the controller c334 in FIG. 15. The controller C334 is a local bus e control section 33 that controls the local bus e313.
41, local bus c33 dynamic flag 3343, start register 3344, report flag 3346, report register 33
45 and an address translation section 3342. Start flag 3
343, startup register 3344 is the main processor section 34
The report flag 3346 and the report register 3345 are flags indicating the presence or absence of operation instructions from the sub-processor unit 33 to the main processor unit 34, and registers that store operation instruction information. This is a register that stores report information. Address conversion section 33
42 is the local bus c33 shown in FIG. 17 when the RAMc332 is accessed from the local bus e313.
Address conversion to 5 is performed. Since only access from local bus e313 to local bus c335 is allowed, the arrow is unidirectional.

Next, using FIG. 22, an explanation will be given of an operation instruction from the main processor section 34 to the sub-processor section 33, taking transmission as an example. The CPUa 341 of the main processor section 34 is: RAMe31
After setting the transmission data to 2 and setting the transmission instruction operation information to the activation register 3344, the activation flag 3343 is set. As a result, an interrupt is generated in the CPU c 331 of the sub-processor section 33 via the local bus C335.

In the CPU c 331, this interrupt causes the CPU a to
It is known from 341 that the operation has started. After that, C
, PUc 331 RAs the contents of the startup register 3344.
After saving in M c 332 and resetting the activation flag 3343, data transmission is started according to the contents of the operation instruction. The startup flag 3343 can be read from the CPUa 341, and the CPUa 341 reads the startup flag 334.
3 has been reset, it is known that the sub-processor section 33 can accept the next operation instruction. This means that the sub-processor unit 33 receives operation instructions from the CPUa 341.
This is an interface that allows you to receive and receive messages continuously without losing them. Further, this processing is quickly executed as an interrupt processing asynchronously with data communication.

Next, the reception operation will be explained. The CPUc331 sends the received data to the serial controller C333.
Instructs AMe 312 to store it. The serial controller c333 receives data according to instructions from the CPU c331, and when the receiving operation is completed, the serial controller c333
Notify Uc331 of reception by interrupt.

CPU c 331 is serial controller 0333
When checking the final state of the data and confirming that the reception was performed normally, the reception report information is set in the report register 3345 and the report flag 3346 is set. This allows C.P.
An interrupt occurs to the Ua 34 l, and the CPU a 341 reads the report information in the report register 3345 and resets the report flag 3346. Since the report flag 3346 has been reset, the CPU c 331 knows that the CPU a 341 can accept the next report from the sub-processor section 33.

This is an interface that allows the CPUa 341 to continuously accept reports from the CPUc 331 without losing them.

The startup register 3344 is a register that can be read/written from the CPU and a341, and the report register 3345 is a C
This is a register that can be read/written from the PUc331. In either case, reading is possible because the CPU on the write side performs a register failure check.

Signal 3348 is connected to controller b 324 and controller c.
This is controller ■D for identifying 334. Controller b324 and controller 334 are the same circuit, and controller 103348 identifies the two.

In the local bus C control unit 3341, the controller l0
3348 to determine whether a write/read request has been received from the local bus e313 to the subprocessor section 33. In the address conversion section 3342, the controller I
Controller ID 3348 is used to perform address conversion as shown in FIG. 17. Controller ID 3348 can also be read by the program of sub-processor section 33 through local bus C control section 33.

FIG. 23 is a block diagram showing the configuration of controller a344 in FIG. 15. The controller a344 is a local bus C control unit 34 that controls the local bus e313.
41, local bus a that controls local bus a345
The control section 3443.7 consists of a address conversion section 3442 and an interrupt control section 3444. The address conversion unit 3442
P U a341 is controller a311, RA
Mc332.

Controller c 334. RAMb322. Coni) When accessing the troller b324, address conversion to the local bus e313 shown in FIG. 17 is performed. CPU
Since the access is unidirectional from a 341, the data flow in the address conversion unit 3442 is unidirectional.

The interrupt control unit 3444 receives an interrupt signal lNTe from the activation flag 3115 in the controller e311, an interrupt signal lNTb from the activation flag 3243 in the controller b324, an interrupt signal lNTc from the activation flag 334 in the controller 1-roller c334, and an interrupt signal lNTc from the activation flag 334 in the controller b324.
6, the transmission/reception end interrupt signal from the line driver 37, the abnormality notification interrupt signal from the line driver 37, and the ADPCM end interrupt signal from the DMA control section built in the CPUa 34L.
Control two interrupt signals. AD in interrupt signal
The PCM end interrupt is used for audio recording and playback, and the CPU a 341 built-in DMA and ADPCM 36
1, the CPUa341 sets the recording/playback time in bytes in the DMA control section, and the DMA control section and A
Activate DPCM361. During recording, the DMA control unit transfers compressed audio from ADPCM361 to RAMe31.
2, and at the time of playback, the compressed audio in RAMa 312 is transferred to ADPCM 361, and an ADPCM end interrupt signal is generated at the point where the transfer ends. This allows audio input and output to be performed automatically without intervening programs.

The six interrupt signals are ORed by the interrupt control unit 3444, and when any signal is turned on, the local bus a3
An interrupt is generated to the CPU a 341 via the CPU 45. When the CPU a 341 receives the interrupt, it reads the interrupt cause from the interrupt control unit 3444 through the local bus control unit 3443 and processes the generated interrupt.

When multiple interrupts occur simultaneously, CPUa34
1, and a mask register (not shown) in the interrupt control unit 3444 masks the interrupt with a low priority to make it wait.

FIG. 24(α) is a block diagram showing the configuration of the line switching circuit 362 in FIG.
It consists of a channel selection circuit 3623. register 3621
is a register that stores B1 channel and B2 channel switching information, and is connected to the CPU a34 via the local bus a345.
It is set from 1. As shown in FIG. 3(b), the register 3621 is an 8-bit register, and the register information is 4 bits.
B1 channel selection circuit 3622, B
It is input to the 2-channel selection circuit 3623. The B1 channel selection circuit 3622 selects the B1 channel 373 separated by the line driver 37 from the line 326 of the serial controller b323 according to the contents of the register 3621.
, line 336 . of serial controller c333. GOD
Connect to one or more of EC363 and ADPCM361. Similarly, in the B2 channel selection circuit 3623,
B2 channel 374 separated by line driver 37,
According to the contents of the register 3621, the line 3261 of the serial controller b323, the line 336 of the serial controller c333. C0DEC363, ADPCM
361 or more. The line connected by the B1 channel selection circuit 3622 and the line connected by the B2 channel selection circuit 3623 are logically summed.

The B1 or B2 channel can be connected to handset 365 and also recorded to RAMe 312 at the same time. In this case, register 3621 is "1100000" in binary.
0" or "OOOO1100". When recording and playing locally with the handset 365 and RAM e 312, set the register 3621 as 11o o o o o o " or "OOOO01100" in binary as above. ” to open the cell 373 or B2 channel 374 and disconnect it from the 15DN line 371.

25@ is a diagram showing an example of implementation of the communication adapter 3 in FIG. 15. 0 Communication adapter 3 is 335axe x 10
It is housed in a board 50 with a size of 0 m. Xt in the diagram
all is a 19.6608MHz crystal oscillator, and the waveform is shaped by the controller C311 and the CPU a34
1, CPUb321, and CPUc331. Xta12 is 16, 384
MHz crystal oscillator, controller A344
The waveform is shaped, the frequency is divided by 2, and an 8.192 MHz clock is output to the ADPCM 361 and the LAPD processing section 35. Xta13 is a 12.288 MHz crystal oscillator and is directly connected to line driver 37. The horizontal or vertical rectangular component is a module type pull-up resistor for driving the circuit. The relay is connected from the communication adapter 3 to the l5DN line 3 in the color when the communication adapter 3 is not energized.
This is for separating 71. The two pulse transformers are used to cut the DC components of the transmitted signal and the received signal and combine them with AC. The unmarked IC is a multiplexer circuit for supplying part of the address signals of the system bus 22 and local bus e313 to the RA and Me312, and a circuit for directly connecting part of the address signals of the local bus e313 and local bus a345. One communication adapter 3 has a line connector for connecting the 15DN line 371, a handset connector for connecting the handset 365, and a main body connector for connecting to the main body of the workstation 1. When the communication adapter 3 is inserted into an empty slot of the workstation 1, the communication adapter 3 is electrically and logically connected to the system processor section 23 through this main body connector.

In the above embodiment, a ROM is not used in the sub-processor sections 32.33, but in the embodiment shown in FIG. 1, the structure of the embodiment is unchanged. The sub-processor units 33 each have RAMb322. It has RAM c 332 and uses a method of downloading programs from the main processor section 34 to this RAM, but RAM b 322
．． If a ROM in which a transmission control procedure program is written is used instead of the RAMc 332, the effort of downloading the program can be saved.

Sub-processor section 32. If the entire sub-processor section 33 is each replaced with a single-chip microcomputer, the package shown in FIG. 12 can be made even smaller. At this time, as in this embodiment, the program may be downcoded to RAMb 322 and RAMc 332, or a ROM in which the above program is written in advance may be used instead of these R and AM.

In the embodiment shown in FIG.
Since it does not have M, it is stopped in a reset state when the power is turned on, and cannot move until a program is downloaded from the main processor section 34. Therefore,
The ROMa 342 in the main processor section 34 is made usable by the sub processor sections 32 and 33. First, ROMa
342 memory space is divided into three. Specifically, ROMa in the local bus memory space in FIG. 4 is divided into three parts, and two of them are mapped to the lowest part of the local bus memory space and the local bus C memory space.
RAMb and RAMc are located above it. This is the address conversion unit 32 of the controller b324 in FIG.
42. FIG. 9 Address translation unit 3 of controller 0334
342° Figure 10 The address mapping contents of the address conversion unit 3442 of the controller a34°4 are changed to prevent access to the hardware resources of the main processor unit 34 from the sub-processor units 32 and 33, which is prohibited in this embodiment. Controller 1 to roller b324° to allow controller c3
34. Modify controller a344. In this way, the sub-processor sections 32 and 33 can run the program in the ROMa 342 at the same time as the power is turned on, and can perform self-diagnosis or load the program into the RAM by themselves. Further, even if hardware including RAM fails, failure analysis can be performed using ROM.

In the embodiment shown in FIG. 1, if the LAPD processing unit 35 is removed, it becomes possible to control multiple lines other than the 15DN, and by adding a sub-processor unit, control of multiple lines becomes possible.

Furthermore, in the embodiment shown in FIG. 1, if the LAPD processing unit 35 and line driver 37 are removed, two lines can be directly connected and controlled, and if a sub-processor unit is added, multiple lines can be controlled using a single board. This is possible with a communication adapter. For example, the second
In the GWs 13 and 14 shown in the figure, if communication control on the LAN side is processed by the sub-processor section shown in Fig. 1, the communication data from the LAN can be sent directly to the engineering SDN via the shared memory RAMe 312, reducing the load on the system processor. In addition to being lighter, throughput is improved because there is no data movement.

In Figure 1, local bus B325 and local bus C335
The controller b324 and the controller c334 can be combined into one bus. In this case, 1
Since two CPUs operate on one bus, the performance is somewhat degraded compared to the embodiment shown in FIG.
2: HDLC-BA processing program, RAM c 3
If you load the HDLC-UN processing program on 32 in advance, HDLC-BA and HDLC
-UN can be run by two CPUs at the same time,
If necessary, one HDLC-BA program in RAMb 322 can be shared and used by two CPUs. In this way, each time the transmission control procedure is changed, R
There is no need to download a program from the AM5312, and there is no need to keep a subprocessor program resident in the RAM e 312.

Add ROM or replace ROMa342 with CPUb321
It can also be easily used from the CPUc331. It is also possible to replace the sub-processor section itself with a one-chip microcomputer. At this time, the program may be downloaded as in this embodiment, or a ROM may be used instead of the RAM, and the transmission control procedure may be fixed without replacing the program.

Further, by removing the line driver 37, it is also possible to realize multi-line control in which a plurality of lines are directly connected and controlled.

In Figure 15, local bus b325. local bus c33
5 on the same bus, the communication protocol program can be shared, although performance will be sacrificed to some extent.

〔Effect of the invention〕

As explained above, according to the present invention, a plurality of communication control units operate independently, so a different communication unit j
@ enables high-speed communication. In addition, one channel is provided to connect the communication adapter and the host software that controls it.
The interface becomes simple and control becomes easy.

[Brief explanation of the drawing]

FIG. 1 is a block configuration diagram of a workstation showing an embodiment of the present invention, FIG. 2 is a network configuration diagram using the embodiment of FIG. 1, and FIG. 3 is an arrangement of the workstation housing of FIG. 1. 4 and 5 are diagrams showing the startup command and report command formats of the embodiment of FIG. 1, respectively, and FIG. 6 shows the identifier and service section of the first embodiment,
FIG. 7 is a diagram showing the command list of the first embodiment. FIG. 8 is a startup resequence diagram of the first embodiment. FIG. 9 is a diagram of the first embodiment. FIG. 1o is a voice communication sequence diagram of the first embodiment. FIG. 11 is a block configuration diagram of a workstation showing another embodiment of the present invention. FIGS. 12 and 13 is the first
Figure 1 is a diagram showing the startup command and report command formats, Figure 14 is a diagram showing the relationship between the identifier in Figure 11, the service section, and the processing section, and Figure 15 is a diagram showing one of the hardware block configurations used in the embodiment of the present invention. 16 is a diagram showing the storage state of the shared memory in the embodiment of FIG. 15,
Figure 17 is a diagram showing the memory space of the local bus.
Figure 8, Figure 21, Figure 22. Figures 23 and 24 are diagrams showing the detailed configuration of the representative block in Figure 15, Figure 19 is a time chart of the local bus, Figure 20 is a diagram showing a memory map corresponding to slots, and Figure 25 is a diagram showing the communication adapter. 26 is a block diagram showing still another embodiment of the present invention, and FIG. 27 is a block diagram showing a second embodiment of the present invention.
FIG. 6 is a diagram showing a startup command and others in the embodiment of FIG. 6; Explanation of symbols 1.101...Workstation, 4,401...
・Upper program, 3,301...Communication adapter, 5
1... Adapter processing section, 52, 54. 57... Data communication section, 58... Audio processing section, 53, 55, 59.
...Transmission control unit, 56,561...Call processing unit, 5゜5
01... Connection port, 23... System processor section,
34... Main processor section, 32.33... Sub processor section, 35... LAPD processing section, 36... B channel control section, 37... Line driver. For 2 Figures 3 Figures 4- Figures 6 Figures 7 Figures 8 Figures 12 Figures 13 Figures 14 - 5 Noro ℃? 1 * 177 To the memory 〇 Me9'H^]
Mecsu father ■shi Memiri 12-cho 1q map Y L-1111111 2o 1 21st collection 24-Figure (α)

Claims (1)

[Claims] 1. In a multi-line communication control method for controlling communication of a plurality of lines, a communication control group consisting of a plurality of communication control units each independently controlling data corresponding to a communication path; A multi-channel communication system characterized in that one channel is provided to connect a control group and higher-level software that controls the communication control group, and one of the plurality of communication control groups is specified by an identifier in a command from the higher-level software. Line communication control method. 2. The multi-line communication control method according to claim 1, wherein the communication control group also includes a call control unit, and the higher-level software also specifies the call control unit with an identifier in the command. 3. The multi-line communication according to claim 1, wherein the communication control group includes a call control unit, and a call command from the upper level software is passed to the call control unit via the communication control unit. Control method. 4. A multi-line communication control device that controls communication of a plurality of lines, and includes a call control unit and one or more communication control units that independently control data or voice depending on the communication mode. a communication adapter having a group, and one channel unit connecting the communication adapter and higher-level software that controls the communication adapter, the communication control group or the call control using an identifier in a command from the higher-level software. A multi-line communication control device characterized in that one of the sections is specified. 5. The multi-line communication control device according to claim 4, wherein the channel unit between the communication adapter and the higher-level software has a shared memory, and information is exchanged using the shared memory. . 6. The upper software has one or more communication control programs, and when at least one communication control unit in the communication adapter is in operation, a function of replacing the communication control program of the communication control unit in a stopped state. 5. The multi-line communication control system according to claim 4, further comprising: 7. The multi-line communication control device according to claim 4, wherein the communication adapter has means for multiplexing the plurality of lines, and the multiplexed line is controlled by the communication adapter.