JPH02246041A - Cylinder servo device - Google Patents

Abstract

PURPOSE:To prevent brightness nonuniformity in the EE picture of a video signal desiring to record by prohibiting the phase servo of a cylinder motor in the tape loading and unloading modes, and FF and REW modes of a tape. CONSTITUTION:The cylinder motor 11 which drives a cylinder 1 rotatably in a tape loading mode where a magnetic tape 2 is migrated from a non-winding state to a winding state for the cylinder 1, a tape unloading mode where the magnetic tape 2 is migrated from the winding state to the non-winding state, and a fast tape feed mode where the magnetic tape 2 is fed at high speed as abutting the magnetic tape 2 with the cylinder is provided. And a cylinder servo circuit 14 which performs the speed and phase servo of the cylinder 11, and a phase servo prohibition circuit which prohibits the phase servo at the cylinder servo circuit in each mode are provided. In such a way, it is possible to reduce the fluctuation period of a power source voltage according to the start of the motor, and to suppress the occurrence of the brightness nonuniformity in the EE picture according to the fluctuation of the source voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION (A) Field of Industrial Application The present invention relates to a magnetic recording and reproducing device such as a video tape recorder (VTR) that records and reproduces signals by winding a magnetic tape around a cylinder. In particular, it relates to a cylinder phase servo circuit.

(B) Prior Art Normally, when recording or reproducing in a VTR, speed and phase servo are applied to a cylinder around which a magnetic tape is wound.

The above-mentioned cylinder speed servo is a control that always maintains the rotational speed of the cylinder at 180 rpm, and usually matches the frequency of the FG pulses obtained continuously according to the rotation of the cylinder motor with a reference signal having a predetermined frequency. It is configured to allow In addition, the phase servo synchronizes the PG pulses obtained intermittently according to the rotation of the cylinder (for example, once per rotation of the cylinder motor) with a reference signal during playback, and in addition to this during recording. Te, P
Vertical synchronization signal (V
The cylinder motor is controlled so as to maintain a predetermined phase difference from the sync).

By the way, there are modes other than recording or playback, such as a tape loading mode in which a magnetic tape is pulled out from a tape cassette by a tape pull-out mechanism and wound around a cylinder, and a tape unloading mode in which the wound magnetic tape is stored in a tape cassette. In the loading mode, the fast-forward mode in which the magnetic tape is wound at high speed on the supply reel side in non-playback mode, and the rewind mode in which the magnetic tape is wound at high speed on the take-up reel side, there is no need to rotate the cylinder, and the above-mentioned cylinder servo is also used. No longer needed.

However, in recent years, a method has been proposed in which the four modes described above are executed while the cylinder motor is kept rotating. For example, Sanyo Electric Technical Report Volume 39 (19
(Published in August 1988), pages 24 to 34 show that a magnetic tape is wound around a cylinder, and fast-forwarding and rewinding are performed while the cylinder is kept in a rotating state, and tape loading and unloading are also performed by rotating the cylinder. A so-called full-loading VTR is disclosed.

With this fully loading VTR, you can change from one mode to another, for example from normal play mode to fast forward mode, with the magnetic tape still wrapped around the cylinder, minimizing the time required to change modes. It is possible to suppress it. Further, since the cylinder is rotating, the magnetic tape is prevented from being damaged by the rotating head fixed to the cylinder when executing each of the above-mentioned modes.

(c) Problems to be Solved by the Invention In a VTR configured to maintain the cylinder in a rotating state even in each mode other than recording or playback (excluding stop mode), such as the above-mentioned full loading VTR, it is difficult to stop When changing from one mode to each of the above-mentioned modes, it is necessary to start up the cylinder motor. for example,
When shifting from the stop mode to the FF or REW mode, the cylinder motor and the capstan motor for running the tape start up at the same time, as shown in FIGS. 8A and 8B. Incidentally, the tape take-up reel is driven by a capstan motor which also serves as a capstan motor. Also, when transitioning from the stop mode to the tape loading or unloading mode, the cylinder motor and the tape loading motor for driving the tape pull-out mechanism start up at the same time, as shown in (A) and (C) in Figure 8. .

By the way, when a cylinder motor, capstan motor or tape loading motor suddenly starts rotating at high speed, a large current flows through each motor.
As shown in FIG. 8(D), the power supply voltage of the VTR decreases and fluctuates.

Of the three motors mentioned above, the capstan and tape loading motors generally have good responsiveness to control signals, so they can run for a very short time (for example, 30 m) after startup.
Only a large current flows by 5ec). On the other hand, since the cylinder motor has poor responsiveness, it takes a long time (for example, 25 ec) to enter phase lock. While this phase lock state continues, the phase difference of the PG pulse with respect to the reference signal changes periodically, and the current flowing through the cylinder motor also changes periodically, as shown in Fig. 8 (D). As seen in period (1), the power supply voltage of the VTR itself changes periodically. Moreover, since the cylinder rotates at high speed, the current required to enter phase lock is also larger than that of other motors.

Therefore, it can be said that the long-term drop and fluctuation in the power supply voltage of the VTR is caused by the fact that the cylinder motor is forced to remain in an unlocked state for a long time. The above-mentioned drop and fluctuation in the power supply voltage over a long period of time affects the video system, and if the power supply voltage is used to drive the video camera, it also affects the camera system, and the video signal to be recorded is affected. This causes uneven brightness in the EE image.

(D) Means for Solving the Problems The present invention rotates the cylinder, but the phase servo of the cylinder motor is controlled in modes where the phase servo is not required at all, namely tape loading and unloading modes, FF and REW modes. It is characterized by not doing

(E) Function Since the present invention is configured as described above, fluctuations in the power supply voltage at the start of each mode can be suppressed to an extremely short time.

(f) Example An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit block diagram of a camera-integrated VTR according to this embodiment, and FIG. 2 shows a VTR mechanism whose drive is controlled using the circuit block diagram of FIG.

In this Figure 2, (1) is a cylinder on which the magnetic tape (2) is wound, (4) is a capstan that feeds the tape by sandwiching the magnetic tape between it and the pinch roller (3), (
5) is a pair of tape drawer guides that perform a tape loading operation to pull out a magnetic tape from a tape cassette (6) and wind it around the cylinder (1), and conversely store the pulled out magnetic tape in the tape cassette. It is connected to the loading motor (6) via a driving force transmission mechanism (not shown) and can move forward and backward in the direction of the arrow. Incidentally, the pinch roller (3) is pressed against the capstan (4) in recording, reproduction, FF and REW modes. Furthermore, (7)
is a control head that comes into contact with the magnetic tape to reproduce control signals, (8) and (9) are supply and take-up reels, and the driving force of the capstan motor (10) that drives the capstan (4) is the driving force. The force is selectively transmitted to both reels via a force transmission mechanism and driven.

In Figure 1, (11) is a cylinder motor that rotationally drives the cylinder (1), (10) is a capstan motor that rotationally drives the capstan (4), and (6) is a drive that drives the tape drawer guide (5). It is a tape loading motor.

(12) is an FG detector that emits FG pulses whose frequency changes in proportion to the rotational speed of the cylinder motor (11);
13) is one PG per rotation of the cylinder motor (11).
This is a PG detector that emits pulses. Both detectors magnetically detect the rotation of the rotor of the cylinder motor (11), and the cylinder motor (11) is in a steady state, that is, both the speed servo and the phase servo are servo locked. When in this state, the frequencies of the FG and PG pulses are approximately 720H2 and 30H2, respectively.

(14) is a speed error data creation circuit (15), a phase error data creation circuit (16), a memory (17), a changeover switch (18), and an addition! (19)
This is a cylinder motor control circuit that performs speed and phase servo of the cylinder motor (11).

The speed error data creation circuit (15) has a configuration as shown in FIG. To briefly explain this Figure 3, (21) is a clock generation circuit (21) consisting of an oscillator (
20) is a timer counter that counts clock pulses of a predetermined frequency and outputs the clock pulses as timer data, and (22) is an input capture register (hereinafter referred to as ICR) that latches the timer data when the FG node is input. , (23) is the first register that holds the latch output of TCR (22), (24) is the second register that holds the timer data at the input of the FG pulse before IIyIA, and (25) is the second register that holds the latch output of TCR (22). This is a subtracter that subtracts the value of the second register (24) from the value, and this subtracted value (P) becomes data obtained by counting the period of the FG pulse by the timer counter. Note that the second register (24) is updated with the value held before updating of the second register (23) every time the second register (23) is updated by the latch output of the ICR (22). Later calculation! In (26), P<
When Td, DSP=O When Td, ≦P≦Td+Ts, When P>Td+Ts D S P = M (Td: fixed bias period, Ts: lock range, M: fixed value). Using speed error data (D
SP) is calculated. In addition, speed error data (DSP)
When expressed as a j-bit (j: integer) digital value, it can be expressed as M=21-1. Further, a method of calculating speed error data (DSP) using the above-mentioned functional formula is illustrated in FIG. 5. In this Figure 5, (A
), the horizontal axis represents time (count value), and the vertical axis represents speed error data (DSP).

The phase error data creation circuit (16) has a configuration as shown in FIG. To briefly explain this FIG. 4, a clock generation circuit (30), a timer counter (31)
) have exactly the same configuration as the clock generation circuit (20) and timer counter (21) in FIG.
) and latches the timer data at the rising edge timing of the PG pulse. Changeover switch (38)
is switched in accordance with the mode designation signal, and in the recording mode is switched to the fixed contact (38a) side, and selects the video signal to be recorded, for example, the vertical synchronization signal (Vsyuc) of the captured video signal from a video camera, In the reproduction mode, the switch is switched to the fixed contact (38b) side, and the reference signal outputted from the reference signal generation circuit (33) whose frequency is fixed to 30H2 is selected.

For example, in the playback mode, the latch output latched by the reference signal mentioned above is stored in the third register (34
), the latch output latched by the PG pulse is held in the fourth register (35), and the latch output is held in the fourth register (35), and the latch output is held in the subtracter (36)
Then, the data held in the fourth register (35) is subtracted from the data held in the third register (34) and output as a subtracted value (Q). In the latter stage arithmetic unit (37), when Q<Td', DPI=O Td'≦Q≦Td' + Ts', Q>Td' +
When Ts', phase error data (D
PI) is calculated. In addition, phase error data (DPI)
is expressed as a j-bit digital value, N=21−
It becomes possible to express it by 1.

Furthermore, the calculation method of phase error data (DPH) using the above-mentioned functional formula is illustrated in FIG. 6 (A), in which the horizontal axis is time (count value), and the vertical axis is phase error data (DPH). DPH) is taken.

Here, when the speed condition is optimal, i.e., the cylinder motor is accurately maintained at 1800 rpm, the speed error data (DSP) is in the optimal lock range and phase condition, i.e., the PG pulse is synchronized with the reference signal. When the phase error data (DPI) is in the lock range, the DPH is in the middle of the lock range.

In addition, the ideal phase difference (3
This can be achieved by changing the values Td' and Ts' of the functional formula in 7).

The memory (17) stores phase error data when the cylinder motor (11) maintains an ideal phase state (the D changeover switch (18) stores data according to the mode designation signal output from the mode setting circuit (4o)). , fixed contact (18a) (1
8b). Here, the fixed contact (18
In a), phase error data (DPI) is derived from the phase error data creation circuit (16), and the fixed contact (18)
In b), the stored data (R) from the memory (17) is derived. When the mode designation signal is recording or reproducing mode, the changeover switch (18) is switched to a fixed contact (18a), and in FF, REW, tape loading, or unloading mode, it is switched to a fixed contact (18b).

The adder (19) adds the speed error data (DSP) and the data selected by the changeover switch (18) and outputs the result to the motor driver (41).

When the changeover switch (18) is switched to the fixed contact (18a) side, the motor driver (41)
It is stored in the cylinder motor (41) in proportion to the added value of PH.

The motor is controlled so as to be maintained, that is, speed and phase servo is performed, and the fixed contact (18b) is switched and supplied, and only speed servo is executed.

(42) is an FG detector that detects FG pulses according to the rotation of the capstan motor (10), and the FG pulses of this capstan motor are input to a frequency dividing circuit (43) and divided, and then The speed and phase error data generation circuits (44) and (45) are supplied. The frequency division ratio 1/n of the frequency dividing circuit (43) changes depending on the mode, and when the mode designation signal specifies the normal recording or playback mode, the frequency division ratio is 1/1 (-1), and the frequency division ratio of the FF Or, when specifying the REW mode, it is set to 1/20.

The speed error data creation circuit (44) has substantially the same configuration as that shown in FIG.
is set to correspond to the capstan speed servo, and the speed error data is generated when the capstan motor (10) is in an ideal speed condition.

The phase error data creation circuit (45) is configured as shown in FIG. In this Figure 7, (30a) (3
1a)-(37a) are (30), (31) and (31) in Figure 4, respectively.
Corresponding to (37), the frequency of the reference signal and the arithmetic unit (37)
Td and Ts in the function equation a) are set to values suitable for the phase servo of the capstan motor, and the arithmetic unit (37a
) is the calculated value from the fixed contact (4) of the changeover switch (46).
In 6a), the trace position of the rotating head is detected and tracked using the four types of pilot signals that are generally accepted as the standard for 8FllllVTR.
l;' (Automatic Track Fin
The ATF error signal from the ATF circuit (47) used in the ding) method is A/D converted! (48), it is digitized and output to the fixed contact (46b), and the changeover switch (46) is switched by the mode designation signal, and the calculated value or ATF error data is alternatively converted into phase error data (CPH). ) is output as Here, when the mode designation signal specifies the recording mode, the calculated value is
When the playback mode is specified, ATF error data is selected. In addition, in any mode, each circuit is configured so that the phase state of the capstan motor (10) is as follows.

The memory circuit (50) is similar to the memory circuit (17).

The changeover switch (51) is switched according to the mode designation signal, and is switched to the fixed contact (51a) side in recording or playback mode, and the phase error data (CP
H) is output to the adder (52) at the subsequent stage. Also, FF,
In the REW, tape loading and unloading modes, it switches to the fixed contact (51b) side and outputs the stored data (S) derived to this contact.

The adder (52) collects the speed error data (C8P) and the phase error data (C8P) selected by the changeover switch (51).
CPH) or stored data (S).

As mentioned above, the capstan motor control circuit (53) is formed by the frequency dividing circuit (43), speed and phase error data creation circuit (44) (45), memory (50), changeover switch (51), and adder (52). is configured.

(54), like the motor driver (41), drives the capstan motor (
10) is a motor driver that supplies current to the FF, FF,
In REW, tape loading and unloading modes, only speed servo is used.

(60) is a loading motor control circuit that controls the drive of the tape loading motor (6) according to the mode designation signal. When the mode setting circuit (40) designates the tape loading mode, the magnetic tape is Cylinder(
Tape pull-out guide (5) to the position where it is wound on 1)
The motor driver (61) supplies current to the tape loading motor (6) so as to move the tape loading motor (5), and when the tape unloading mode is specified, the motor driver (61)
6) is supplied with a current of opposite polarity to that in the above case, and the tape guide block (5) is connected to the tape cassette (6).
Execute motor control so that the motor is stored inside.

The mode setting circuit (40) is operated by operating the operation switch.
When each mode of recording, playback, FF, REW, loading, unloading, and stop is selected,
A mode designation signal designating the corresponding mode is supplied to each motor control circuit as described above.

Next, the operation in each mode of the circuit block diagram described above will be explained.

(Tape loading mode) The cassette loading mechanism allows tape cassettes (6
) is in place, the mode designation signal designates the tape loading mode.

Then, as shown in FIGS. 8(A) and (C'), the cylinder motor control circuit (14) and tape loading motor control circuit (60) are activated so that the cylinder motor (11) and tape loading motor (6) start up at the same time. performs motor control. At this time, the changeover switch (18) is switched to the fixed contact (18b) side by the mode designation signal, the phase error data (DPH) is fixed at DPH=→, and the added value of the adder (19) becomes DSP+-. , the current supply from the motor driver (41) to the motor is controlled only by speed error data (DSP), and virtually no phase servo is added.

Therefore, the cylinder motor (11) rotates with only the speed servo applied, and the magnetic tape (2) is wound around the rotating cylinder (1).

Then, when winding of the magnetic tape onto the cylinder (1) by the tape pull-out guides (5) (5) is completed, the cylinder motor (11) and tape loading motor (6)
The motor control circuits (14) and (60) operate so as to stop the cylinder (1), and the cylinder (1) is brought to a stop mode while maintaining the state in which the magnetic tape is wound around the cylinder (1).

(Recording Mode or Playback Mode) When the recording or playback mode is selected from the stop mode, a mode designation signal designating recording or playback is issued, and the changeover switches (18) and (51) switch between the fixed contacts (1
8a) (51a) side, and the cylinder motor (11
) is supplied with current in proportion to DSP+DPH, and on the other hand, current is supplied to the capstan motor (10) in proportion to C5P+CPH, and both motors start up as shown in Figure 8 (A) and CB). Thereafter, both speed and phase servos will be applied to both motors, respectively.

Furthermore, when the recording mode is selected, press the selector switch (3).
8) (46) are switched to the fixed contacts (38a) and (46a), respectively, phase error data (DPH) (CP) is created by the recording phase error data creation system, and the playback mode is selected. When the changeover switch (38
) (46) are switched to the fixed contacts (38b) and (46b), respectively, and phase error data (DPI) (CPH) is created by the phase error data creation system for reproduction.

(FF or REW mode) When the FF or REW mode is selected from the stop mode, a mode designation signal designating the FF or REW mode is issued, and the changeover switches (18) and (51) switch between the fixed contacts (18b) and (51b). ) side, current is supplied to the cylinder motor in proportion to DSP 10→;, while current is supplied to the cab stan motor (10) in proportion to C8P+-2, as shown in Figure 8 (A). Both motors start up as shown in (B), and from then on, only the speed servo is applied to each motor.

(Tape unloading mode) When the unloading mode is selected from the stop mode, a mode designation signal specifying this is issued,
As shown in Figure 8 (A) and (C), the cylinder motor (10)
The cylinder motor control circuit (14) and the tape loading motor control circuit (60) control the motors so that the tape loading motor (6) and the tape loading motor (6) start up at the same time.

At this time, the mode designation signal causes the changeover switch (18) to switch to the fixed contact (18b) side, and the phase error data (
DPH) is fixed as DPH=→;, and the added value of the adder (19) is DSP+-.The current supply to the cylinder motor (11) is controlled only by the speed error data (DSP). Substantially no phase servo is added.

Therefore, the cylinder motor (11) rotates with only the speed servo applied, and the magnetic tape (2) is separated from the rotating cylinder (1), causing the tape cassette (6
), and after the storage is completed, the motor control circuit (14) (60) stops the cylinder motor (11) and tape loading motor (6), and at the same time the cassette loading mechanism loads the tape cassette (6).
discharge.

In this way, in recording or reproducing mode, by not applying phase servo to the cylinder motor (11), the power supply voltage after each motor starts up is as shown in Fig. 8 (E).
As shown in the figure, after a temporary decrease, it does not fluctuate.

In this embodiment, the cylinder motor control circuit (14
) and the capstan motor control circuit (53) can of course be processed by software using a microcomputer. FIG. 9 is a flowchart showing the operation when the cylinder motor control circuit (14) is configured using a microcomputer, and the FG interrupt routine of FIG. 9 is executed every time an FG pulse is input. executed. STEP (100) in the diagram
is an addition that adds the calculated speed error data (DSP) and phase error data (DPI)! This corresponds to the operation (19). In addition, in this embodiment, the drive power source for each motor is common, and the drive of the camera section (not shown) is also performed by the common drive power source. Camera-integrated V
It is particularly effective for TR.

(G) Effects of the Invention As described above, according to the present invention, in tape loading, unloading, FF, and REW modes, it is possible to extremely shorten the period of fluctuation of the power supply voltage accompanying the start-up of the motor. It is possible to suppress the occurrence of brightness unevenness in the EE image caused by this.

[Brief explanation of drawings]

The drawings all relate to one embodiment of the present invention, and Fig. 1 is an overall circuit block diagram, Fig. 2 is a mechanism explanatory diagram, Fig. 3 is a cylinder speed error data creation circuit block diagram, and Fig. 4 is a cylinder phase error diagram. Data creation circuit block diagram, Figure 5 is a diagram showing the cylinder speed servo function formula, Figure 6 is a diagram showing the cylinder phase servo function formula, Figure 7 is a block diagram of the capsun phase error data creation circuit, and Figure 8 is the timing diagram. 9 is a flowchart. (1)...Cylinder, (11)...Cylinder motor, (16)...Phase error data creation circuit, (17)
...Memory (18)...Selector switch.

Claims (1)

[Claims] (1) a tape loading mode in which the magnetic tape is transferred from an unwound state to a wrapped state with respect to the cylinder; a tape unloading mode in which the magnetic tape is transferred from the wound state to the unwound state; a cylinder motor that rotationally drives the cylinder in each mode of a high-speed tape feed mode in which the magnetic tape is brought into contact with the cylinder and is returned at a high rate; a cylinder servo circuit that servos the speed and phase of the cylinder motor; A cylinder servo device comprising: a phase servo prohibition circuit for prohibiting phase servo in the cylinder servo circuit.