JPH02236708A - Electronic computation processing system - Google Patents

Abstract

PURPOSE:To automatically secure the continuity of a processing at every time when a power source is turned on by applying interruption on a central arithmetic unit when the power source is turned off, storing an address by interrupting the processing under execution, and executing the processing starting from that part by reading out a stored address when the power source is turned on. CONSTITUTION:When power source turn-off interruption is applied from a timer unit 13 to an MPU 11, the MPU 11 shifts the processing to an interruption processing, and stops the execution of an application program, and after storing the address of a program executed at the last time in register 16, issues a command to turn off the power source. When the command to turn on the power source is issued from the timer unit 13 again and it is supplied to a power source control unit 12, the power source control unit 12 supplies the power to the MPU 11, a ROM 14, and an analog input/output port 17, then, makes them set at standby states. After reset release by the timer unit 13 is performed, the MPU 11 executes the processing starting from the final address of a preceding processing fetched from the register unit 16. Thereby, it is possible to automatically secure the continuity of the processing at everytime of turn-on the power source.

Description

[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) This invention is applicable to computers and their peripheral devices, for example, where power consumption and heat generation are problems. Regarding electronic computing systems.

(Prior Art) In general, electronic calculation processing systems installed on artificial satellites have problems with power consumption and heat generation. Upon completion of processing, the power is turned off to reduce power consumption and heat generation, thereby preventing increases in power consumption and heat generation. By the way, the central processing unit (hereinafter referred to as MPU) used in the above system
) is reset at the same time as the power is turned on, and the process is executed from a specific address set initially.When periodically controlling the power on/off, it is reset before the power is turned off. The location where the next process is to be performed is set in a flag, and when the power is turned on, the process is restarted by moving from the initial setting address to the address indicated by the flag.

However, in the conventional electronic computing system as described above, the application program must be consciously designed to add and read flags during power on/off processing in the MPU. Therefore, the burden on the user increases. Furthermore, if the number of restart points for processing increases, a storage area for flags corresponding to the number of points will be required, resulting in an increase in the size of the device.

(Problems to be Solved by the Invention) As described above, in conventional electronic calculation processing systems, when saving power and reducing heat generation through periodic power on/off control, the application program side is required to restart processing. must be designed with the operation of the user in mind, which places a heavy burden on the user. Furthermore, in the method of storing restart points attached to flags, as the number of restart points increases, the area for flag storage becomes impossible to ignore, forcing the storage area to expand, leading to an increase in the size of the device. There is.

This invention was made to solve the above problems, and it is possible to automatically ensure the continuity of processing at each turn-on without having to consider operations for restarting processing on the application program side. Another object of the present invention is to provide an electronic calculation processing system that only requires a certain storage area regardless of the number of restart points.

[Configuration of the Invention (Means for Solving the Problems) In order to achieve the above object, an electronic calculation processing system according to the present invention includes a central processing unit that performs various calculation processes according to application programs, and periodically updates the system. In a system in which power is controlled on and off, means for interrupting the central processing unit when the power is turned off, interrupting the processing being executed and sending out the address;
The present invention is characterized in that it comprises a storage section for storing the address sent from this means, and when the power is turned on, the address stored in the storage section is read out and processing is executed from that part.

(Function) In the electronic calculation processing system having the above configuration, since the address being executed is stored by interrupt processing when the power is turned off, processing can be continued from the stored address portion when processing is restarted.

(Embodiment) An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

Figure 1 shows its configuration, where 1l is an MPU that performs various calculation processes according to application programs;
is a power control unit that collectively controls power on/off for other system units; l3 is a timer unit that determines the timing of power on/off of the system;
4 is an RO that stores application programs, for example.
M, 15 is a RAM that stores calculation results of MPUII, etc.;
1B is a register that holds the final address of preprocessing, 17
is an analog input/output port for analog control of other peripheral devices, LP is a power line, LfI is a bus line, and Lo is an on/off command line.

Among these, the power supply control unit 12, RAM unit 15
, in register l6 and timer unit l3? Power is supplied directly from the +4 line LP, and other units}11.
14. 17 is supplied from the power line LP via the power control unit 12, where it is subjected to on/off control. Data, interrupts, etc. between each unit 11-17 are carried out through the bus line LB. The timer unit 13 periodically sends power on/off commands to the power supply control unit 12, resets the MPU IL power supply control unit 12 and the analog human output boat 17 for a certain period of time from the time the power is turned off, and resets the MPU IL power supply control unit 12 and the analog human output boat 17 from the time the power is turned on. The reset will be canceled after a certain period of time.

The operation of the above configuration will be explained below with reference to FIG. 2.

First, in the initial state before the power is turned on, the register 16 contains R.
The start address of the application program stored in OM15 is stored, and the timer unit l3
The MPUIIS power supply control unit 12 and analog input/output board 17 are set to a reset state.

Here, when a power-on command is given from the timer unit 13 to the power supply control unit 12 through the on/off command line L0, this power supply control unit 12
Power is supplied to OM14 and analog input/output port I7. On the other hand, the timer unit l3 connects the MPU II to the power supply control unit l2 after a certain period (W) has elapsed since the power was turned on.
and cancels the reset applied to analog input/output port l7. The MPUIL released from reset reads the address stored in the register 16 and executes the program (E).

Next, when a power-off interrupt is given from the timer unit 13 to the MPU unit 11 via the bus line LB,
MPULI moves to interrupt processing (I), stops execution of the application program, stores the address of the last executed program in register l6, and then instructs timer unit 13 to send the address to MPU unit l1 and analog input/output board 17. Reset of 11. 17 and R
A command is given to turn off the power of the OM unit 14. Next, the timer unit 13 operates 11. 17, and after a certain period of time (R), the power supply control unit 12 is reset to 11. A command is given to stop the power supply to each unit 14 and 17 (S).

A power-on command is issued again from the timer unit 13,
When the power is supplied to the power control unit 12, the power control unit 12 supplies power to the MPU II, ROM 14, and analog input/output port 17, and enters a standby state (W).

Then, after the reset is canceled by the timer unit 13,
The MPU unit 11 executes the preprocessing from the final address taken in from the register unit 1B (E). After that, repeat the same operation.

Therefore, the electronic calculation processing system with the above configuration is
When the power is turned off, interrupt processing is performed on the MPU II, the address of the program being executed is saved in the register 16, and then m[ is turned off for all units, and processing is executed from the saved address when the power is turned on. There is no need to consider operations for restarting processing on the application program side, and the burden on the user can be reduced, and the accuracy of the continuity of divided processing can also be improved. Furthermore, there is no need to attach a flag to a restart point, and there is no problem of securing an area for flag storage.

In the above embodiment, the register 16 is provided for address storage, but if there is room in the RAM 15, the register 16 can be omitted by using a part of it as an address storage area.

[Effects of the Invention] As described above, according to the present invention, it is possible to automatically ensure the continuity of processing at each turn-on without considering an operation for restarting processing on the application program side, and It is possible to provide an electronic calculation processing system that only requires a certain storage area regardless of the number of restart locations.

[Brief explanation of drawings]

FIG. 1 is a block circuit diagram showing an embodiment of an electronic calculation processing system according to the present invention, and FIG. 2 is a timing diagram for explaining the operation of the embodiment. 11...MPUS12...Power control unit, 13
...Timer unit, 14...ROM, 15...
RAM, 1G...Register, 17...Analog input/output port. Applicant's agent Patent attorney Takehiko Suzue

Claims (1)

[Claims] In an electronic computing system that is equipped with a central processing unit that performs various calculation processes according to application programs, and in which the power of the system is periodically controlled to turn on and off, an interrupt is generated to the central processing unit when the power is turned off, means for interrupting the processing and sending out the address;
and a storage section for storing an address sent from the means, and the electronic calculation processing is characterized in that the address stored in the storage section is read out when the power source is turned on, and the processing is executed from that part. system.