JPH02214241A - Fault diagnostic device - Google Patents

Abstract

PURPOSE:To suitably diagnose the fault of a transmission function of each communication node or the fault of a multiplex transmission line by short- circuiting one signal line of a common transmission line to a reference level, using a signal line not short-circuited so as to decide whether or not the data transmission is implemented normally. CONSTITUTION:When a point (a) on a bus 52 is short-circuited, since data transmission/reception is implemented by a node 2 via a bus 51, the system is apparently normal. In the case of applying fault diagnosis, the fault diagnosis function of the node 4 is started to start diagnosis. That is, when a relay 44 is energized by the instruction of a CPU 42, the bus 51 is short-circuited and the communication with the node 2 is disabled and even when a data is sent from the fault diagnostic device 4, the node 2 does not return any ACK signal. Thus, the occurrence of the fault in the system is detected. When only the node 2 does not return the ACK signal, it is discriminated that the fault exists in a branch line (point a) of the bus 52 reaching the node 2.

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a multiplex transmission system in which data is mutually sent and received by time division multiplex communication between a plurality of nodes via a common transmission path. The present invention relates to a failure diagnosis device for a multiplex transmission system that diagnoses failures, such as ground faults in common transmission paths or transmission function failures in nodes.

(Prior Art) Such multiplex transmission systems are applied to various fields. Examples include large-scale communication systems, LANs in intelligent buildings, and home bus systems.In recent years, in particular, in order to prevent the number of signal lines from increasing due to electronic control of automobiles, common multiplex transmission lines are used to connect various parts of vehicles. It is also applied to multiplex transmission systems for automobiles that transmit and receive signals between nodes arranged in the same manner. Such a multiplex transmission system is disclosed, for example, in Japanese Patent Publication No. 61-3218.

Such a multiplex transmission system for vehicles requires high system reliability. For example, in order to increase the reliability of multiplex transmission lines against failures, multiplexed transmission lines are configured with twisted wires consisting of a pair of signal lines, so that signal transmission can be performed even if one signal line of the twisted pair is disconnected. The transmitter/receiver circuit for each note is configured.

(Problems to be Solved by the Invention) In a multiplex transmission system in which the above-mentioned multiplex transmission line is made highly reliable using twisted pair wires, even if one signal line of the twisted pair wires suffers a fault such as a ground fault, the other No. 13 can be transmitted and received normally using the signal line. As a result, users may not be aware of failures occurring in multiplex transmission paths.

As a result, even though we have taken great pains to make the multiplex transmission line highly reliable using twisted pair lines, after a failure occurs in one of the signal lines of the twisted pair line, the multiplex transmission line with degraded reliability is used without anyone noticing. will continue to use multiplex transmission systems. This becomes a big problem in systems that require high reliability.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to make it possible to accurately diagnose the occurrence of a failure when a failure occurs in a multiplex transmission path or a transmitting section of a sending node in a multiplex transmission system.

(Means for Solving the Problem) A fault diagnosis device for a multiplex transmission system according to the present invention transmits and receives data by time division multiplex communication between a plurality of nodes via a common transmission path consisting of a pair of signal lines. Each node is a fault diagnosis device for a multiplex transmission system in which a transmitting/receiving circuit is configured so that data can be transmitted only through one signal line of the common transmission line. It is provided with a short-circuit circuit for short-circuiting to a reference level, and a judgment stage for determining whether data transmission is normally performed using the signal line on the side that is not short-circuited by the short-circuit circuit.

(Function) The short circuit short-circuits one signal line of the common transmission line to a reference level such as ground or a power supply line, thereby making data transmission via the signal line impossible.

Then, the determining means determines whether data transmission can be performed using the remaining other signal line. If data transmission can be performed normally, it can be determined that no fault has occurred in the signal line on the other side. If data transmission cannot be performed, it can be determined that a fault has occurred in the signal line on the other side.

(Example) Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a fault diagnosis apparatus for a multiplex transmission system as an embodiment of the present invention. In this embodiment, the failure diagnosis apparatus of the present invention is used as a failure diagnosis apparatus for a multiplex transmission system for a vehicle.

This multiplex transmission system is a bus-type distributed LA for automobiles.
N, which uses asynchronous time division multiplexing such as a contention method that allocates the right to use the transmission path only when there is a message to be sent to each node, and uses the C3MA/CD method as the access control method (multiplexing method). is adopted.

In Figure 1, 5 indicates two signal lines 51 (or bus)
and 52, each bus 11.
12 are biased to a predetermined voltage level by bias resistor circuits Rat and R2□, and R23 and R24, respectively. Communication notebooks 1 to 4 are configured to access transmission signals to the transmission path 5 via bus interface sections 11, 21, 31, and 41, respectively. Note addresses Nol to No4 are assigned to each of the communication nodes l to 4, respectively.

Communication Note 4 has a fault diagnosis function for the entire Jisdem, and unlike other nodes 1 to 3, relay 4 for bus ground fault
4.45, and is designed to operate as a fault diagnosis device. The relay 44 is configured to ground the bus 11 through a contact point based on the command from the CPLJ 42, and the relay 45 is configured to ground the bus 11 based on the same command from the CPU 42.
2 is configured to provide a ground fault through a contact point.

FIG. 2 shows an example of the configuration of the bus interface section 41. As shown in the figure, the transmitter includes buses 51 and 52 of the transmission line 5.
The differential driver circuit 411 transmits a transmission signal using a differential driver circuit 411, and the differential driver 411 performs transmission so that the polarity of the signal to be transmitted is inverted between buses 51 and 52.

That is, the differential driver circuit 411 has a bias resistor circuit F? for the bus 51. A constant bias voltage determined by a+ and R22 is applied.■1. A PWM digital signal of iE polarity is transmitted with reference to V12, and a constant bias voltage determined by bias resistor circuits R1 and Rza is applied to the bus 52, and the PWM digital signal of F is inverted with reference to V12. transmits a negative polarity signal.

The receiving section includes an AC coupling section 412 that cuts the DC bias component of the received signal from the transmission line 5, a differential amplifier 413 that amplifies the output of the AC coupling section 412, and a threshold voltage that generates a predetermined threshold voltage. Generation circuit 414 and differential amplifier 4
The comparator 415 compares the output signal of No. 13 with the threshold voltage V th of the threshold voltage generation circuit 415 and outputs the output signal to the communication terminal 1046.

Even if the signal amplitude of the received signal received from the transmission path i by the differential amplifier 413 becomes small due to a failure or the like, as will be described later, this comparator 415 operates as long as the signal amplitude is equal to or greater than a predetermined value V th. is converted back into a digital signal at a constant voltage level and sent to the CPLI 42 side, thereby allowing the CPU 42 to read the received signal without error.

FIG. 3 shows a more detailed example of the configuration of the electric circuit of the receiving section of the bus interface section 41. As shown in the figure, this embodiment includes a capacitor Ci, an AC coupling circuit 4 using CI
This is a bus interface circuit for a balanced transmission system using a bus 51 and a bus 52, and is configured so that even if a bus signal from one of buses 51 and 52 does not come in the event of an abnormality, data can be received using only the other bus signal. ing.

In the figure, resistor RII, capacitor C6 and resistor R+
i and capacitor C6 each constitute a filter that cuts high frequency components of the bus signal.

The diode D8 prevents fluctuations in the DC component due to the duty ratio of the bus signal pulse, and sets the differential receiving sensitivity of the receiving circuit with its forward voltage □. Diode D
Numeral 9 protects the input terminals r of the comparators 4 and 5 by absorbing positive and negative surges of the bus signal. Resistance R
131R14, R16, R+a and resistor Rta set the differential reception sensitivity and hysteresis of the comparator 415.

The base voltage and emitter voltage of the transistor Tr3 are always shifted by approximately the pace-emitter voltage VeM, and since it is connected to the emitter-whirlpool circuit, the input impedance on the base side of the transistor Trp is high, and the signal transmission speed is also high. It's fast enough. Therefore, even if the transistors T.sub.r, .

The emitter follower circuit of the transistor T r 3 also serves to prevent the inverting input terminal (-) of the comparator 415 from going negative. This is because by inserting the transistor Tr3 into the bus interface reception circuit, the transistor Tr3 remains off even if a negative voltage lower than the base-emitter voltage VesIo when the collector of the transistor Tr3 is open is input to the base. This is because the voltage at the inverting input terminal of the comparator 415 does not fall below ground. The diode D10 is used to prevent the positive surge voltage that enters from the base of the transistor Tr from passing through to the collector and being applied to the power supply.

FIG. 4 shows a schematic diagram of the format structure of a transmission frame F transmitted and received through the network F of this frequently used transmission system. This frame F has a frame structure including an SD (start delimiter) code, an ID (identification) code, an own station address, data 1 to data N, an error check code, and an ACK field.

Here, the SD code is a specific code indicating the start of frame F. Also,! The D code is a functional address (
function address). This function address is SAE InLernaL
ional Congress and Exp.
References published in the position (February 1986)
A Prop-osal for a Vehicle
e Network Protocol 5tanda
-Functional addressing in rdJ (
Corresponds to FuncLional Addressingl.

The reception confirmation signal area (ACK field) consists of a plurality of pits, for example 16 bits, and a bit area corresponding to the address of the δ node is assigned to the δ node, thereby making it possible to confirm normal reception. That is, each receiving node uses a check code to check whether there are any errors in the contents of all received frames, regardless of the destination address, and if there are no errors, the bit area corresponding to each node's address is used. In the reception confirmation signal area, a reception confirmation signal (ACK signal) unique to each multiplex node is sent back to the transmitting node.

In FIG. 4, the node address of node 1 is set to A1, the note address of node 2 is set to A2, the note address of node 3 is set to A3, and the node address of fault diagnosis device 4 is set to A4. When the fault diagnosis device 4 transmits data to the buses 51 and 52, the result is as shown in FIG. In other words, as shown in FIG.
A4 is transmitted to the 4th bit ['' which is the code return area.

Note! , node 2. If the node 3 is receiving the data normally, it sends the data to the fault diagnosis device 4 in FIGS. 4(b), (c), and (d).
), the ACK signal is sent to 1. A2. Since A3 is returned, each note has a frame as shown in FIG.
0000), the fault diagnosis device 4 can determine that there is no fault in the network.

The operation of the embodiment apparatus will be described below with reference to the flowchart of FIG. 6 showing the first order of diagnostic processing.

In FIG. 1, it is assumed that a ground fault has occurred at point a of bus 520. At this time as well, since the node 2 can send and receive data normally via the bus 51, the system appears to be normal. When performing a fault diagnosis, the fault diagnosis function of the node 4 is activated to start the diagnosis (step SO).

First, when the relay 44 is turned on in accordance with the instruction from the CPU 42 (step S1), the bus 51 is grounded, so that the node 2 becomes unable to communicate, and even if data is transmitted from the failure diagnosis device 4 (step S2), Since node 2 does not return an ACK signal, it can detect that a failure has occurred in the system (step S3). Moreover, if only node 2 does not return an ACK signal, then bus 5 leading to node 2
It can be determined that there is a failure in branch line 2 (point a). Also, node 2
If both node 1 and node 3 do not return an ACK signal, it can be determined that the main line (point b) of the bus 52 between node 1 and node 2 is out of order.

If no failure is detected in the bus 52, the relay 44 is turned off (step S4).

The relay 45 is turned on (step S5), and it is then diagnosed whether or not there is a failure on the bus 51 side (steps S6 to
S8). Finally, if there is a failure, that fact is displayed on the display device 43 (step S10).

Various modifications are possible in implementing the invention. For example, in the above embodiment, one of the buses 51 or 52 is grounded by the relay 44 or 45 during failure diagnosis, but the invention is not limited to this, and for example, the bus 51 or 52 may be shorted to the power supply line (Vcc). Failure diagnosis may be performed by configuring the bus to disable communication via the bus.

Furthermore, the city transmission system to which the present invention is applied is not limited to the bus-type network of the embodiment, but may be, for example, a loop-type network. Further, the multiple access method is not limited to the C3MA/CD method, and may be other methods such as a polling method.

Furthermore, in the above embodiment, the ACK signal of the ACK field of the transmission frame is used to detect the occurrence of a failure, but the present invention is not limited to this. The presence or absence of this returned frame may be used to check whether there is a failure in the bus or the like.

(Effects of the Invention) According to the present invention, it is possible to accurately diagnose a failure in the transmission function of each communication node, a failure in a multiplex transmission path, or the like. .

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a failure diagnosis device for a multiplex transmission system as an embodiment of misfiring JTI, FIG. 2 is a block diagram showing an example of the configuration of the bus interface section 21 in the embodiment device, and FIG. 3 is a bus interface. FIG. 4 is a diagram showing the format of the transmission frame in the embodiment device, FIG. 5 is a diagram explaining the operation of the ACK signal, and FIG. 6 is a diagram showing the diagnostic processing. It is a flowchart which shows the procedure. l: Balanced bus transmission line 2: Communication node (fault diagnosis device) 3 to 5: Communication notebook 11, 2l, ko3+, 41: Bus interface section 42: Signal amplitude detection circuit 43: CPtJ 411: Differential driver Circuit 412: AC coupling section 413: Differential amplifier 414: L threshold voltage generation circuit 415: Comparator 421.422 Two-level shift circuit 423.424: Beak hold circuit 425: A/D converter 426: Inverter Patent applicant Furukawa Electric Mazda Industrial Co., Ltd.? Figure 2 Figure 3 L ++
+ -” Figure 6

Claims (1)

[Claims] (1) Data is sent and received by time division multiplex communication between multiple nodes via a common transmission line consisting of a pair of signal lines, and each node can also transmit data using only one signal line of the common transmission line. A fault diagnosis device for a multiplex transmission system in which a transmitting/receiving circuit is configured so as to enable a short-circuiting circuit that short-circuits one signal line of the common transmission line to a reference level, and a side that is not short-circuited by the short-circuiting circuit. 1. A failure diagnosis device for a multiplex transmission system, comprising: determining means for determining whether data transmission is performed normally using a signal line;