JPH0220032A - Sealing method for resin of semiconductor element - Google Patents
Sealing method for resin of semiconductor elementInfo
- Publication number
- JPH0220032A JPH0220032A JP63170164A JP17016488A JPH0220032A JP H0220032 A JPH0220032 A JP H0220032A JP 63170164 A JP63170164 A JP 63170164A JP 17016488 A JP17016488 A JP 17016488A JP H0220032 A JPH0220032 A JP H0220032A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- sealing
- semiconductor element
- chip
- range
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000007789 sealing Methods 0.000 title claims abstract description 43
- 229920005989 resin Polymers 0.000 title claims abstract description 38
- 239000011347 resin Substances 0.000 title claims abstract description 38
- 239000004065 semiconductor Substances 0.000 title claims abstract description 17
- 238000000034 method Methods 0.000 title claims description 8
- 238000010438 heat treatment Methods 0.000 claims abstract description 13
- 239000000758 substrate Substances 0.000 claims description 3
- 238000005538 encapsulation Methods 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 5
- 238000004382 potting Methods 0.000 abstract description 3
- 229920002050 silicone resin Polymers 0.000 description 5
- 239000005871 repellent Substances 0.000 description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
本発明は集積回路など半導体素子を回路基板上に樹脂で
封止する方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of sealing a semiconductor element such as an integrated circuit with a resin on a circuit board.
［従来の技術］
集積回路は回路基板上にダイボンディングした後でワイ
ヤボンディングし、その後この集積回路は、この回路の
信頼性確保やワイヤの保護のため、封ＩＬ用樹脂でこの
ワイヤの高さ以上に盛りあげてこの集積回路を封止する
ことは良く知られている。[Prior art] An integrated circuit is die-bonded onto a circuit board and then wire-bonded, and then the height of the wire is sealed with a sealing IL resin to ensure the reliability of the circuit and protect the wire. It is well known to encapsulate this integrated circuit with the above-mentioned conditions.
このような封止方法の従来例の第１は、集積回路の封止
範囲の境界と同一の内面形状の封止枠を回路基板のこの
封止範囲の外側に置き、この封止枠内に封止用樹脂を滴
下して集積回路を封止する方法である。また従来例の第
２は封止範囲の境界に撥水撥油樹脂例えばシリコン樹脂
を塗布してその内側に封止用樹脂を滴下して集積回路を
封止する方法である。The first conventional example of such a sealing method is to place a sealing frame having the same inner surface shape as the boundary of the integrated circuit sealing area outside the sealing area of the circuit board, and to This is a method of sealing an integrated circuit by dropping a sealing resin. A second conventional method is to apply a water- and oil-repellent resin, such as a silicone resin, to the boundary of the sealing area, and drop a sealing resin inside the resin to seal the integrated circuit.
〔解決しようとする課題］
しかし封止枠を使用する第１の封止方法では、この枠自
体及びこの枠の取付けに余分の費用が掛り、そのためコ
スト高となり、さらに封止枠の厚さや幅が増加すること
になり、完成した時計等の薄型化の障害となることがあ
る。また前記第２の例の撥水撥油樹脂を塗布する方法で
は、封止用樹脂を滴下し易いように加熱することが行な
われるが、高温で低粘度となる封止用樹脂に対しては、
所望の高さの封止（ポツティング）が得られ難く、また
その樹脂の流出防止の効果が不十分である。[Problem to be solved] However, in the first sealing method using a sealing frame, extra costs are incurred for the frame itself and the installation of the frame, resulting in high costs.In addition, the thickness and width of the sealing frame are This results in an increase in the thickness of the watch, which may become an obstacle to making the completed watch etc. thinner. In addition, in the method of applying water- and oil-repellent resin in the second example, heating is performed to make it easier to drip the sealing resin, but the sealing resin becomes low in viscosity at high temperatures. ,
It is difficult to achieve sealing (potting) of a desired height, and the effect of preventing the resin from flowing out is insufficient.
そこで本発明の目的は、低コストで確実に所定の高さの
ボッティングができる半導体素子の樹脂封止方法に関す
るものである。SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a method for resin-sealing a semiconductor element, which can reliably perform botting to a predetermined height at low cost.
［課題を解決するための手段］
本発明の特徴は、実装される半導体素子の封止範囲の境
界を囲むようにパターン面上に発熱抵抗体が絶縁被膜を
介して形成してある基板に、上記半導体素子を実装し、
その後で上記封止範囲内の上記半導体素子を覆うように
封止用樹脂を滴下し、上記発熱抵抗体に通電し、この通
電による上記発熱抵抗体の熱により上記封止用樹脂を加
熱しつつ硬化させることにある。[Means for Solving the Problems] A feature of the present invention is that a heating resistor is formed on a pattern surface via an insulating film on a substrate so as to surround the boundary of a sealing range of a semiconductor element to be mounted. Mount the above semiconductor element,
After that, a sealing resin is dropped so as to cover the semiconductor element within the sealing range, the heating resistor is energized, and the encapsulating resin is heated by the heat of the heating resistor caused by the energization. The purpose is to harden it.
［実施例］ 以下図面を参照して本発明の詳細な説明する。[Example] The present invention will be described in detail below with reference to the drawings.
第１図において、プリント基板１には、配線パターン２
が形成されている。配線パターン２面上には半導体素子
（ＩＣチップ）３がグイボンディングしてあり、さらに
ワイヤボンディングして実装されるようになっている。In FIG. 1, a printed circuit board 1 has a wiring pattern 2.
is formed. A semiconductor element (IC chip) 3 is bonded on the surface of the wiring pattern 2, and is further mounted by wire bonding.
プリント基板１の配線パターン２面上には、ＩＣチップ
３のポツティング範囲の境界を囲むように、発熱抵抗体
４が絶縁被膜５を介して形成してある。発熱抵抗体４は
、シリコン樹脂にカーボンなどの導電性物質を混入した
ものを使用する。A heating resistor 4 is formed on the wiring pattern 2 surface of the printed circuit board 1 with an insulating coating 5 interposed therebetween so as to surround the boundary of the potting range of the IC chip 3. The heating resistor 4 is made of silicone resin mixed with a conductive substance such as carbon.
封止範囲内にＩＣチップ３を実装し、この実装されたＩ
Ｃチップ３を覆うように封止用樹脂６を滴下する。そこ
で発熱抵抗体４の両端４ａ、４ｂに電圧を印加しながら
樹脂全体を加熱する。封止用樹脂は、加温されることに
よって瞬間的には粘性が低下したような現象が見られる
が、硬化反応が促進され、煙状のガスを放出しなから封
止用樹脂６が全体的に硬化する。The IC chip 3 is mounted within the sealing range, and the mounted I
The sealing resin 6 is dropped so as to cover the C chip 3. Therefore, the entire resin is heated while applying a voltage to both ends 4a and 4b of the heating resistor 4. When the sealing resin is heated, there is a phenomenon in which the viscosity decreases momentarily, but the curing reaction is accelerated and the sealing resin 6 is completely melted without emitting smoke-like gas. hardens.
次に実験例として、従来の撥水撥油樹脂としてシリコン
樹脂を塗布したものと本発明の発熱抵抗体を使用したも
のを対比したものを示す。これは直径８．０ｍｌ中に封
止用樹脂を滴下した場合、封止範囲に止まる、つまり流
れ止め効果を示す封止用樹脂の重量について対比したも
のである。Next, as an experimental example, a comparison will be made between a conventional water- and oil-repellent resin coated with silicone resin and a heat-generating resistor of the present invention. This is a comparison of the weight of the sealing resin that stays within the sealing range, that is, exhibits a flow-stopping effect when the sealing resin is dropped into a container having a diameter of 8.0 ml.
従来の撥水撥油樹脂としてシリコン樹脂を塗布してその
内側に封止用樹脂を滴下した例では、１．０〜１．５ｇ
であった。In an example in which a silicone resin is applied as a conventional water- and oil-repellent resin and a sealing resin is dropped inside it, the amount is 1.0 to 1.5 g.
Met.
これに対してシリコン樹脂にカーボンを混入した発熱抵
抗体を使用した例では、１．８〜２．２ｇの封止用樹脂
を封止範囲内に確保することができた。On the other hand, in an example using a heating resistor made of silicone resin mixed with carbon, it was possible to secure 1.8 to 2.2 g of sealing resin within the sealing range.
［効果］
以上のように本発明によると、封止用樹脂が敏速に硬化
させることができるため、半導体素子を封止する封止用
樹脂の流れ止め効果が向上し、封止範囲内での封止用樹
脂の高さ、幅などを増加させることができ、そのため半
導体素子を確実に封止することができるものである。[Effect] As described above, according to the present invention, the sealing resin can be cured quickly, so the flow-stopping effect of the sealing resin that seals the semiconductor element is improved, and the sealing resin can be cured quickly within the sealing range. The height, width, etc. of the sealing resin can be increased, and therefore the semiconductor element can be reliably sealed.
図面は本発明の一実施例を示すものであって、第１図は
平面図、第２図は第１図Ａ−Ａ線拡大断面図である。
１・・・基板、
・パターン、
・半導体素子、
・発熱抵抗体、
・絶縁被膜、
・封止用樹脂。
以 上The drawings show one embodiment of the present invention, in which FIG. 1 is a plan view and FIG. 2 is an enlarged sectional view taken along the line A--A in FIG. 1. 1...Substrate, ・Pattern, ・Semiconductor element, ・Heating resistor, ・Insulating coating, ・Encapsulating resin. that's all
Claims (1)
ターン面上に発熱抵抗体が絶縁被膜を介して形成してあ
る基板の上記パターン面に、上記半導体素子を実装し、 その後で上記封止範囲内の上記半導体素子を覆うように
封止用樹脂を滴下し、 上記発熱抵抗体に通電し、 この通電による上記発熱抵抗体の熱により上記封止用樹
脂を加熱しつつ硬化させる ことを特徴とする半導体素子の樹脂封止方法。[Claims] The semiconductor element is mounted on the patterned surface of a substrate on which a heating resistor is formed via an insulating film so as to surround the boundary of the sealed area of the semiconductor element to be mounted. Then, a sealing resin is dropped so as to cover the semiconductor element within the sealing range, the heating resistor is energized, and the encapsulating resin is heated by the heat of the heating resistor caused by this energization. 1. A resin encapsulation method for a semiconductor device, characterized by curing the semiconductor device while curing the device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63170164A JPH0220032A (en) | 1988-07-08 | 1988-07-08 | Sealing method for resin of semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63170164A JPH0220032A (en) | 1988-07-08 | 1988-07-08 | Sealing method for resin of semiconductor element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0220032A true JPH0220032A (en) | 1990-01-23 |
Family
ID=15899870
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63170164A Pending JPH0220032A (en) | 1988-07-08 | 1988-07-08 | Sealing method for resin of semiconductor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0220032A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5850690A (en) * | 1995-07-11 | 1998-12-22 | De La Rue Cartes Et Systemes Sas | Method of manufacturing and assembling an integrated circuit card |
| US6848173B2 (en) * | 1994-07-07 | 2005-02-01 | Tessera, Inc. | Microelectric packages having deformed bonded leads and methods therefor |
-
1988
- 1988-07-08 JP JP63170164A patent/JPH0220032A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6848173B2 (en) * | 1994-07-07 | 2005-02-01 | Tessera, Inc. | Microelectric packages having deformed bonded leads and methods therefor |
| US5850690A (en) * | 1995-07-11 | 1998-12-22 | De La Rue Cartes Et Systemes Sas | Method of manufacturing and assembling an integrated circuit card |
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