JPH02195403A - Multiprocessor system - Google Patents

Abstract

PURPOSE:To prevent a multimaster bus from being occupied by a specific module and to accelerate the real time processing of an NC device or the like by connecting an exclusive bus between modules having much data transfer volume. CONSTITUTION:The exclusive bus 2 is connected between a CPU module 20 and a graphic module 30 and both the modules are mutually connected through buffers 28, 38. Data are transferred to a display device 40 through the exclusive bus 2. The bus 2 is bidirectional bus including many address, data and control lines. Since the exclusive bus 2 is used for data transfer between the CPU module 20 and the graphic module 30 and the multimaster bus 1 can be used for other modules, other modules can be allowed to exchange data at real time.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a multi-processor system such as a numerical control device or a robot control device, and particularly to a multi-processor system in which a dedicated bus is provided between two modules.

[Conventional technology]

Numerical control devices or robot control devices employ multi-processor systems in order to process the positions, speeds, etc. of multiple axes in real time. Each processor used in a multi-processor system is configured as a single module, with its own dedicated ROM, RAM, and local bus. The type or number of these modules is selected depending on the scale of the numerical control device or robot control device to configure the system.

FIG. 2 is a block diagram of the multiprocessor system of the numerical control device. Each multi-master bus 1 has
An axis control module 10, a CPU module 20, and a graphics module 30 are combined. In addition to this, many other modules such as other axis control modules are coupled, but for the sake of simplicity, the other modules are omitted.

The axis control module 10 includes a processor 11, a ROM 12,
It has a RAM 13, a dedicated axis control circuit (ACC) 14, etc., and these elements are connected to each other by a local bus 17. The local bus 17 is connected to the multi-master bus 1 via the buffer 16 .

The CPU module 20 includes a processor 21, a ROM 22,
It has a RAM 23, input/output circuits 24 and 25, etc., and these elements are connected by a local bus 27. The local bus 27 is connected to the multi-master bus 1 via the buffer 26.
It is connected to the.

The graphics module 30 includes a processor 31 and a ROM.
32, RAM 33, graphic control circuit 34, etc., and these elements are connected by a local bus 37.

Local bus 37 is connected to multi-master bus 1 via buffer 36.

In addition, the graphic control circuit 34 sends a video signal to the display device 40 to display the position of each axis of the numerical control device, parameters, the shape of the workpiece to be machined, the machining status of the workpiece, etc. in real time.

[Problem to be solved by the invention]

However, in a numerical control device, data is frequently transferred between the CPU module 20 and the graphics module 30 in order to display or draw the above data or workpiece shape in real time using the data stored in the RAM 23. It will be done. Therefore, multi-master bus 1
is the CPU module 20 and the graphics module 30
It will be occupied by. As a result, other modules cannot use the multi-master bus 1, making it difficult to process data in real time, and making it impossible to function as a numerical control device.

The present invention has been made in view of the above points, and has two
The present invention aims to provide a multi-processor system with a dedicated bus between modules.

[Means to solve the problem]

In order to solve the above problems, the present invention provides a multi-processor system in which each module exchanges data via a multi-master bus, such as a numerical control device or a robot control device, by providing a dedicated bus between at least two modules. A multi-processor system is provided.

[Operation] A dedicated bus is provided between modules that frequently transfer data and occupy the multi-master bus, so that the multi-master bus can be used by other modules.

[Example] Hereinafter, one embodiment of the present invention will be described based on the drawings.

FIG. 1 is a front-end diagram of a multi-processor system according to an embodiment of the present invention. The multi-master bus 1 includes an axis control module 10 and a CPU module 20, respectively.
, graphics module 30 are coupled. In addition to this, many other modules such as other axis control modules are coupled, but for the sake of simplicity, the other modules are omitted. The multi-master bus I is composed of an address line 32, a data line 32, and a control line 8.

The axis control module 10 includes a processor 11, a ROM 12,
It has a RAM 13, a dedicated axis control circuit (ACC) 14, etc., and these elements are connected by a local bus 17. Local bus 17 is connected to multi-master bus 1 via buffer 16. The axis control module 10 receives command data for rotating the servo motor from the CPU module 20 via the multi-master bus 1, and controls the servo motor. Actual numerical control devices control about 2 to 9 axes, and one axis control module can control about 2 axes, so each numerical control device can have 1 to 4 axis control modules. Connected to master bus 1.

CPU-[-Jule 20 is processor 21, ROM2
2, RAM 23, input/output circuits 24 and 25, etc., and these elements are connected by a local bus 27. Local bus 27 is connected to multi-master bus 1 via buffer 26 .

The CPtJ module is the central module of the numerical control device, and 1 to 3 CPtJ modules may be installed depending on the scale of the numerical control device.
U module is used. In the CPU module 20, a CPU 21 controls the entire numerical control device according to a system program stored in a ROM 22. RAM2
3 stores various data, part of which is made up of battery-backed CMO 3 and serves as a non-volatile memory.

The graphics module 30 includes a processor 31 and a ROM.
32, RAM 33, graphic control circuit 34, etc., and these elements are connected by a local bus 37. Local bus 37 is connected to multi-master bus 1 via buffer 36. The graphic control circuit 34 sends a video signal to the display device 40 to display the position of each axis of the numerical control device, parameters, the shape of the workpiece to be machined, the machining status of the workpiece, etc. in real time. Data for this purpose is stored in the RAM 23 of the CPU module 20.

Therefore, a dedicated bus 2 is provided between the CPU module 20 and the graphics module 30, and the two modules are connected via buffers 28 and 38. Data to be displayed on the display device 40 is transferred through this dedicated bus 2. This dedicated bus 2 is a bidirectional bus,
It consists of 48 lines: 24 address lines, 16 data lines, and 8 control lines.

Therefore, data transfer between the CPU module 20 and the graphics module 30 is performed by the dedicated lotus 2,
Multi-master bus 1 is not used, multi-master bus 1
can be used in other modules. As a result, other modules can exchange data in real time.

In the above explanation, a dedicated bus between the CPU module and the graphic module has been described, but a dedicated bus can be similarly provided to transfer data between other modules that transfer a large amount of data.

Further, although this dedicated bus is a bidirectional bus, it may be a unidirectional bus if most of the data is transferred in one direction. Of course, the number of lines mentioned above is just an example, and dedicated buses can be provided depending on the data to be transferred.

Furthermore, in the above explanation, the numerical control device was explained, but the robot control device or PC (programmable
It can also be applied to control devices such as controllers.

[Effects of the Invention] As explained above, in the present invention, a dedicated bus is provided between modules that transfer a large amount of data, so the multi-master bus is not monopolized by a specific module, and real-time l... Processing is facilitated.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a multi-processor system according to an embodiment of the present invention, and FIG. 2 is a block diagram of a multi-processor system of a numerical control device. 1...--Multi-master bus 2
−・・・・・−・・・Private bus 0−・・・・−・−
・−・・−Axis control module 7・・・・−・・・・・・
−・・・Local bus OCPU module 7・・・・・・・・・−・Local bus 8・
−・・−・・・・・・−・Buffer O・−・・・・・・・
・・・・−・−・Graphic module 7・・・・−
・・・−・−・−Local bus 38−−・・・−・
・−・−Buffer 40−・−・−・・Display device patent applicant FANUC Co., Ltd. agent Patent attorney Takeshi Hattori

Claims (3)

[Claims] (1) In a multi-processor system in which each module exchanges data via a multi-master bus, such as a numerical control device or a robot control device, a multi-processor system is characterized in that a dedicated bus is provided between at least two modules.・Processor system. (2) The multi-processor system according to claim 1, wherein the bus is a bidirectional bus. (3) The multi-processor system according to claim 1, wherein the bus is a unidirectional bus.