JPH02149013A - Oscillation circuit - Google Patents

Abstract

PURPOSE:To reduce the number of terminals for externally attached parts in the case where a circuit is made into an IC by providing second and third I<2>L inverters to which the output of a first I<2>L inverter and the collector output of a transistor are inputted respectively and whose mutual input/output terminals are connected so as to constitute a latch circuit, and a feedback circuit to feed back the output of the third I<2>L inverter to the input of the first I<2>L inverter. CONSTITUTION:At time T3 when the potential of the terminal P4 reaches VH of the threshold voltage of the I<2>L inverter X1, the output of the I<2>L inverter X1 becomes L-level, and the storage state of the latch circuit L is inverted. When the potential of the terminal P4 becomes VL, since the transistor Q14 becomes into a conductive state, the storage state of the latch circuit L is inverted again. Then, since the shunt of a capacitor C4 is opened, and charge is started, the potential of the terminal P4 comes to rise again. Henceforward, the charge and discharge to the capacitor C4 is continued repeatedly, and oscillation output can be obtained from the output terminal OUT based on the inversion operation of the latch circuit L.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) This invention is based on I2L (Integrated In
The present invention relates to an oscillation circuit using an inverter, particularly to an IC (integrated circuit) and ultra-low voltage operation.

(Prior Art) As is well known, as an oscillation circuit using a 12L inverter, there is a structure shown in FIG. 5 in the past. Figure 5 is from “Electronic Materials J (June 1978 issue, No. 64)”
The crystal oscillator described in Figure 4) on page 1 is shown.

This crystal oscillator is! It uses a 2L transistor as an inverting amplifier, consisting of a linear amplifier consisting of a transistor Ql, and a transistor Q2. A sine wave oscillation output whose amplitude level is limited to 2VBH is obtained by a DC negative feedback circuit consisting of Q3 and diode D1, crystal Xtal and capacitor C1°C2. This oscillation output is then transferred to the transistor Q4. A buffer clipper circuit consisting of Q5 shapes the waveform and converts it into a rectangular pulse.

However, in the conventional oscillation circuit shown in FIG.
When converting to C, crystal X tal and capacitor C1, C
Since terminal 2 is externally attached, two terminals Pi and P2 are required, which poses a problem that it is not practical.

Therefore, conventionally, an oscillation circuit as shown in FIG. 6 has been considered. FIG. 6 shows a current controlled oscillator for a multiplex integrated circuit using a phase-locked loop, which is described in Japanese Patent Publication No. 58-3112ei. This current controlled oscillator consists of a comparison circuit based on a differential amplifier and a feedback circuit with hysteresis characteristics.
A current 1o corresponding to the phase difference supplied via a low-pass filter (not shown) is passed through an integrating circuit CR consisting of a resistor R1 and a capacitor C3 to transistors Q6 to Q13.
The circuit is designed to be supplied to a Schmitt circuit consisting of:

According to this current controlled oscillator, when integrated into an IC, only the integrating circuit CR is externally attached, so that only one terminal P3 is required. However, the conventional oscillation circuit shown in FIG. 6 has a problem in that the minimum operating voltage is high, making it unsuitable for, for example, equipment using batteries.

(Problems to be Solved by the Invention) As described above, when converting a conventional oscillation circuit into an IC,
External connection has the problem of increasing the number of terminals for components, and also has the problem that reducing the number of terminals increases the minimum operating voltage.

Therefore, this invention was made in consideration of the above circumstances, and when integrated into an IC, the number of external terminals for components can be reduced, and it also has an extremely good performance that can operate at an ultra-low voltage equivalent to, for example, one battery. The purpose is to provide an oscillation circuit.

[Structure of the Invention] (Means for Solving the Problems) An oscillation circuit according to the present invention includes a transistor that is biased to become conductive when the emitter potential reaches a first level, and an emitter of the transistor. a capacitor interposed and connected between the reference potential point, a first 12L inverter to which the emitter output of the transistor is input and whose threshold level is a second level different from the first level; The output of the inverter and the collector output of the transistor are respectively input, and the input and output terminals are connected to each other to form a latch circuit.
and a third 12L inverter, and a feedback circuit that feeds back the output of the third 12L inverter to the input of the first 12L inverter.

(Function) According to the above configuration, it is possible to charge and discharge the capacitor between the first and second levels to obtain an oscillation output. When integrated into an IC, the only external component is a capacitor, so only one terminal is required. Furthermore, the minimum operating voltage can also be set to an extremely low voltage of, for example, 1 V or less.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings. In FIG. 1, Q10 is an NPN type transistor, and a constant voltage Vl is applied to its base. The emitter of this transistor Q14 is connected to an external capacitor C4 via a terminal P4.

Here, the transistor Q14 is biased so that it becomes conductive when its emitter potential reaches VL. In other words, the base of transistor Q14
When the forward voltage between emitters is VF, it is expressed as VL - Vl - VF.

Further, the emitter of the transistor Q14 is connected to the input terminal of a 12L inverter X1 whose input threshold level is a potential V11 higher than the VL. The output terminal of the 12L inverter X1 and the collector of the transistor Q14 are connected to the 12L inverter X2.
They are respectively connected to the input terminals of X3.

These I2L inverters X2. The input and output terminals of X3 are connected to each other to form a latch circuit. ■The output terminal of the 2L inverter X2 is the output terminal OUT.
The output terminal of I2L inverter X3 is connected to I2L
Connected to the input end of inverter XI.

The operation of the above configuration will be described below. First, when the potential difference between both ends of capacitor C4 is 0,
Assume that a constant voltage v1 is applied.

Then, since the transistor Ql becomes completely conductive, its collector becomes L (low) level, and the output of the 12L inverter X3 becomes an oven.

Therefore, the capacitor C4 is only charged, and the potential of the terminal P4 increases sequentially as shown from time tl to t2 in FIG. In this case, until the potential of the terminal P4 reaches vL, the capacitor C4 is rapidly charged by the transistor Q14, so that the slope of the rise in the potential of the terminal P4 is large.

After time t2 when the potential of terminal P4 exceeds VL, transistor Q14 becomes non-conductive, but since the latch circuit maintains the state before time t2, I2L
The output of the inverter X3 remains in the oven, and the capacitor C4 continues to be charged by the injection current of the 12L inverter X1. In this case, since capacitor C4 is charged slowly, terminal P4
The slope of potential rise becomes gentler.

In this way, the time T when the potential of the terminal P4 reaches VH, which is the threshold voltage of the I2L inverter X1.
3, the output of the I2L inverter X1 becomes L level, and the storage state of the latch circuit is inverted. Then I2
The output of L inverter X3 becomes L level, and capacitor C4 is shunted and rapidly discharged. Therefore, the potential of terminal P4 rapidly drops and reaches VL at time t4.

When the potential of the terminal P4 becomes VL, the transistor Q14 becomes conductive, so that the storage state of the latch circuit is reversed again. Then, the shunt of the capacitor C4 is opened and charging is started, so that the potential of the terminal P4 rises again. Thereafter, the above-described charging/discharging operation of the capacitor C4 continues repeatedly, and an oscillation output can be obtained from the output terminal OUT based on the inversion operation of the latch circuit. In this case, the oscillation output of the output terminal OUT becomes H (high) level at the portion of the sawtooth waveform shown in FIG. 2 where the voltage suddenly drops.

FIG. 3 shows an example in which the circuit of the embodiment shown in FIG. 1 is devised so that it can be used more stably, and actual circuit constants are set. The operating principle is exactly the same as the above embodiment, and the 12L inverter X4°X5 and the 12L inverter
The major difference in configuration is that B and X7 are newly added.

12L inverter X, 4. X5 is transistor Q14
is provided to avoid the influence of inverse β when the 12L inverter X8. Xl is capacitor C4
In order to rapidly discharge the charged electric charge, the current absorption ability has been increased.

4(a) to (c) correspond to (a) to (c) in FIG.
The voltage waveform at point C) is drawn by computer simulation. As is clear from FIG. 4, the operating voltage of each part is below IV, and it is possible to operate at an extremely low voltage, for example, about one battery (1.5 V).

It should be noted that the present invention is not limited to the above-mentioned embodiments, and can be implemented with various modifications without departing from the gist thereof. For example, in the above embodiment, the oscillation output is 1
Although it is arranged to take it out from the 2L inverter X2, it may be taken out from any point depending on the purpose. Further, the present invention is suitable for use as an oscillation circuit for starting a motor of an ultra-low voltage sensorless motor drive IC, for example.

[Effects of the Invention] As described in detail above, according to the present invention, when integrated into an IC, the number of external terminals for components can be reduced, and furthermore, it has an extremely good performance that can be operated at an ultra-low voltage equivalent to, for example, one battery. It is possible to provide a unique oscillation circuit.

[Brief explanation of the drawing]

1 and 2 are circuit configuration diagrams showing one embodiment of the oscillation circuit according to the present invention and waveform diagrams for explaining its operation, and FIGS. 3 and 4 respectively show the same embodiment in more detail. FIGS. 5 and 6 are circuit configuration diagrams showing a conventional oscillation circuit, respectively, and a waveform diagram of each part thereof.

Claims (1)

[Claims] A transistor biased to conduct when the emitter potential reaches a first level, a capacitor connected between the emitter of this transistor and a reference potential point, and an emitter output of the transistor as an input. and a first I^2L inverter whose threshold level is a second level different from the first level, the output of this first 1^2L inverter and the collector output of the transistor are respectively inputted, and the second and third I^2L inverters whose input and output terminals are connected to each other to form a latch circuit, and the output of the third I^2L inverter is fed back to the input of the first I^2L inverter. An oscillation circuit comprising a feedback circuit.