JPH02123814A - Voltage comparator - Google Patents

Abstract

PURPOSE:To obtain a voltage comparator having high speed and high resolution with low current consumption by providing a switch means between drains of a differential input pair of a MOSFET being a component of the differential pair. CONSTITUTION:Drains of a MOSFET being a component of a differential pair are short-circuited by turning off SW 11, 12, turning on SW 13, 14 and turning on a SW 15 with a clock in a reset phase. As a result, a current flows to the SW 15 in a direction cancelling the potential difference between the drains of the MOSFET being the component of the differential pair, and the voltage between the drains becomes the equal potential in a short time, thereby reducing the reset phase period considerably to ensure the succeeding comparate. Then the input voltage comparison is implemented with low power consumption without losing the speed and resolution by turning on the SW 11, 12, turning off the SW 13, 14 and also turning off the SW 15 with the clock in the next comparate phase.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a voltage comparator capable of performing voltage comparisons at high speed, high resolution, and low current consumption, and particularly to a clock-controlled voltage comparator.

[Prior art] Recently, C
Digital/analog elements using MOS process technology,
In particular, voltage comparators with high speed and high resolution are attracting attention.

FIG. 2 shows a conventional clock-controlled voltage comparator using MOSFETs forming a differential pair.
Ql~Q5 are MOSFETs, 5lllll N5W4 is a switch, 11 and 12 are inputs Vln+ and Vln
15 is the output V(
14 is a terminal for supplying a bias voltage, 13 is a terminal for supplying a reset voltage, and 101 and 100 are positive and negative power supply lines, respectively.

Is the circuit in Figure 2 a clock-controlled type? 15 to operate as a 1-voltage comparator, first turn off SWI, 2, SW3
．． Turn on differential pair MOSFET Q3. During the 6th voltage comparison, input the same reset voltage to the gate of Q4 (hereinafter, this period will be referred to as the reset phase), turn on SWI, 2, turn off SW3.4, and set Vln.
+ and Vln- voltages to a differential pair of MOSFETs Q3. Q
“0” is input to the gate of 4 and amplified by the same differential pair.
“(Low)” or “1” (High) output V.ut
(hereinafter, this period will be referred to as the humbalate phase).

[Problem to be Solved by the Invention 1] The problem with this circuit is that in the comparator phase, if the potential difference between Vln+ and Vlr+- is excessive, a large potential difference will occur between the drains of the MOSFETs forming the differential pair. This potential difference cannot be sufficiently eliminated in the next reset phase.

Therefore, in this case, there is a risk of erroneously determining input terminals with slight differences in the next comparator phase. This is a difference in the reset phase! V! This is because the current for aligning the potentials of the drains of the MOSFETs that make up the pair is controlled by the current flowing through MOSFET q5, and normally it is not possible to flow a large amount of current here (this would lead to an increase in current consumption). ), and in order to sufficiently eliminate the potential difference, it is possible to lengthen the period of the reset phase, but this will lead to a slowdown of the voltage ratio M unit.

The purpose of the present invention is to improve the speed 1 resolution of the conventional (clock-controlled) voltage comparator as described above without changing the current consumption, and to fully demonstrate its ability at any input voltage. The object of the present invention is to provide a (clock-controlled) voltage comparator that allows

[Means for Solving the Problems] In order to achieve the above objects, the voltage comparator of the present invention includes a switch means for short-circuiting the drains of MOSFETs forming a differential pair, for example, in a reset phase. It is characterized by

[Function] According to the present invention, by providing a switch that short-circuits the drains of MOSFETs constituting a differential pair, for example, in the reset phase, reset after comparing the voltage of an excessive input difference can be performed in a short period of time. speed by turning off this switch in the comparator phase.

Compare input voltages with low current consumption without reducing resolution.

[Embodiment J] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows an embodiment of a clock-controlled voltage comparator using MOSFETs forming a differential pair according to the present invention.

In this figure, Qll to Q15 are M that constitute a differential pair.
OSFET, 5WII ~ 5WIS are switches 21
and 22 are input terminal pairs to which inputs v1□+ and Vln- are supplied, respectively; and 26 is an output V. 24 is a terminal for supplying a bias voltage, 23 is a terminal for supplying a reset voltage, 101 and 100 are positive and negative power supply lines, respectively.The features of the present invention are as follows:
The difference is that l'l15 is provided between the drains of the MOSFETs constituting the differential pair, and the other configurations are the same as in FIG. 2.

In order to operate the circuit of FIG. 1, 5WII and 12 must be turned off by a clock during the reset phase
f At the same time as turning on %5w13 and 14, 5W15
is also turned on to short-circuit the drains of the MOSFETs forming the differential pair. As a result, a current flows in the direction of eliminating the potential difference between the drains of the differential pair in 5115, and the voltage between the drains becomes the same potential in a very short time, which is necessary to ensure the next comparison. reset·
The phase duration can be very short.

In the next compare phase, turn on 5WII, +2 and turn off 5W13.14 by clock.
By turning off SWI5 at the same time as
Input terminal comparison can be performed with low extinction g2T and force without impairing the speed 1 resolution of this comparator.

[Effects of the Invention] As described above, according to the present invention, a voltage comparator with high speed, high resolution, and low current consumption can be realized.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a voltage comparator according to an embodiment of the present invention, FIG. 2 is a circuit diagram of a conventional voltage comparator. Qll Q15...FET. SWI 1~5W15...Switch. Ward 1

Claims (1)

[Claims] 1) A voltage comparator comprising a switch means between the drains of a differential input pair of MOSFETs constituting a differential pair.