JPH02115957A - Relative address access system - Google Patents

Abstract

PURPOSE:To reduce the number of wiring in a packaged board and entire system by converting an address signal to make access to a specific module to a relative value in which a specific address is set as reference, and sending it from a processor. CONSTITUTION:When a microprocessor makes access to a memory device, the address signal PAD is supplied from the processor CPU to a processor address conversion circuit PAC. Simultaneously, an address strobe signal AS is outputted. The circuit PAC receiving a processor reference address PBAD from a processor reference address circuit PBA sends the address signals AD and BA to the memory device. At a memory device side, the signals AD and BA are fetched in a memory address conversion circuit MAC by the signal AS. At the circuit MAC, a memory reference address MBAD is received from a memory reference address circuit MBA, and the signals AD and BA are converted to an absolute address MAD corresponding to an original absolute address PAD.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a relative address access method, and relates to a technique that is effective when used, for example, in a microcomputer system with a large address space.

[Conventional technology]

An addressing method for accessing a specific module such as a memory under the control of a microprocessor employs a method of sending an address signal indicating the location to be accessed to each module and each device within the module. Usually, the upper bits of the address signal select a module and a device within the module, and the lower bits of the address signal select a byte or word within the device.

Examples of literature describing such microprocessor access include CQ Publishing, 1987, 4
Monthly publication ``Transistor Technology'' pages 336-343.

[Problem to be solved by the invention]

When a microprocessor accesses a module,
Since devices such as memory use an absolute addressing method, the entire system including the microprocessor also uses this absolute addressing method. In this method, as the system becomes larger, the number of addresses specifying bytes and words within each device increases, resulting in problems such as an increase in the number of pins of the module fJi connector and an increase in the wiring pattern within the mounting board. That is,
The number of address lines tends to increase as each LSI including memory becomes more highly integrated, but on the other hand, the requirement for high packaging density of components is essential, so the number of pins of connection connectors increases due to the above, and the number of pins on the mounting board increases. The increase in the number of wiring patterns poses a major problem.

An object of the present invention is to provide a relative address access method that can reduce the number of wires within a mounting board and throughout the system.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means to solve the problem]

A brief overview of typical inventions disclosed in this application is as follows.

In other words, the processor converts an address signal for accessing a specific module into a relative value based on a specific address and sends it out, and the module side also converts the signal to a relative value based on the specific address. to access the specified device by converting it into an address signal.

[For production]

According to the above-mentioned means, the number of bits can be reduced because only the relative address using the reference address is sent, and therefore the number of address lines of the processor and the modules and devices accessed by it and the corresponding connection connectors. Pins can be reduced.

〔Example〕

FIG. 1 shows a block diagram of an embodiment of a microcomputer system to which the present invention is applied. In the figure, in order to facilitate understanding of the relative address access method according to the present invention, the most basic small-scale microcomputer system consisting of a microprocessor and one memory device is shown as an example. There is.

The processor CPU itself has a configuration and function similar to a conventional microprocessor.

The following circuit is applied to the processor CPU as shown in 2.

In this embodiment, as shown by the broken line in the same figure, in order to reduce the number of address lines that connect the mounting board on which the processor CPU is mounted to modules such as memory devices, and the number of corresponding connector pins, , a processor reference address circuit PB that generates a reference address value.
A processor address conversion circuit PAC is provided which receives a reference address PBAD formed by the processor reference address circuit PBA and an address signal PAD output from the processor CPU and converts it into relative address signals AD and BA.

Although not particularly limited, when the address signal PAD output from the processor CPU consists of 32 bits, the processor reference address circuit PBA forms a reference address PBAD consisting of 32 bits. Then, the processor address conversion circuit PAC receives the above two address signals, performs arithmetic processing such as subtracting them, and generates an address signal AD consisting of 8 bits and a bank signal B consisting of 4 bits.
Convert to A. As a result, the actual number of address signals output from the microprocessor can be reduced to 12 (8+4) of the signals AD and BA, although the processor sends out as many as 32 bits of address signals.

On the memory device side, a memory address conversion circuit MAC and a memory reference address circuit MBA are provided which correspond to the above relative address and convert it into an absolute address. That is, the memory address conversion circuit MAC performs an inverse operation such as addition to the reference address MBAD formed by the memory reference address circuit MBA and assigned to the memory device with respect to the address signals AD and BA, and converts the reference address MBAD to the above address signals AD and BA to the processor CPU. The address P formed by
Convert to memory address MAD corresponding to AD. As a result, the device (memory) MM that constitutes the memory device
will be supplied with an absolute address consisting of 32 bits.

In this embodiment, although the system has an address space of 32 bits, each module is accessed from the microprocessor by reducing the address space to 12 bits as described above. Therefore, even if the address signals AD and BA are apparently the same, the reference addresses assigned to each module are different, so the addresses converted by the address conversion circuit on the module side are different. Therefore, each module is assigned to a 32-bit address space so that the modules are not designated redundantly. Therefore, when the microprocessor has a plurality of modules, the processor reference address circuit PAB of the microprocessor has a plurality of reference addresses PBA corresponding to each module.
It generates D. Therefore, processor C
Among the address signals PAD output from the PU, an address signal HA such as a specific upper bit corresponding to the designation of the module is supplied to the processor reference address circuit PBA. The processor reference address circuit PBA receives the address signal HA and sends the reference address PBAD of the corresponding module to the processor address conversion circuit PAC.

Note that the processor CPU uses the output address PAD
The address strobe signal AS indicating that the
C, MAC and memory MM. In addition, in an actual microcomputer system, there are a data bus for sending and receiving data, and control signals and timing signal lines other than the above-mentioned address strobe signal As, but these are not used in the relative address access method according to the present invention. Therefore, it is omitted in the figure.

Access to the memory device using the relative address access method of this embodiment is performed as follows.

When a microprocessor accesses a memory device,
An address signal PAD in absolute address format is supplied from the processor CPU to the processor address conversion circuit PAC. Almost at the same time, processor CPLJ outputs an address strobe signal AS indicating that the address signal PAD is valid. This address strobe (No. 8 AS is the processor address conversion port 1W)
PAc is also supplied, and the address strobe signal AS
is used as a timing signal for converting address signal PAD in absolute format into address signals AD and BA in relative address format using reference address PBAD. Processor address conversion circuit PAC
is the processor reference address PB which is the reference for conversion from the processor reference address circuit PBA to a relative address.
Upon receiving AD, address signals AD and BA in a relative address format are sent to the memory device.

On the memory device side, the address signals AD and BA in the converted relative address format are taken into the memory address conversion circuit MAC by the address strobe signal AS from the processor CPU.

In the memory address conversion circuit MAC, a memory reference address M is a reference value for converting to the original absolute address.
BAD is received from the memory reference address circuit MBA, and using the timing of the address strobe signal AS, the relative addresses AD and BA taken in are converted into an absolute address MAD corresponding to the original absolute address PAD. This absolute address MAD is supplied to the memory MM.

The memory MM receives the address MAD by an address strobe signal As, specifies a specific device in the module and a specific byte or word in the device, and in the case of a write operation, writes data sent through a data bus (not shown). Writes data between specified bytes into a word.

For a read operation, the memory device sends a specified byte or word of data onto the data bus, which is then received by the processor CPU.

With the above relative addresses AD and BA, it is possible to specify 256 bytes or words for one bank, and since there are 16 banks in total, one reference address can address 16X256 = 4096 bytes or words. Space can be specified. When the address space of one memory device is larger than the above-mentioned 4096, it is regarded as a module with an apparent upper limit and is divided into a plurality of memory blocks, and a reference address is assigned to each of them.

In this embodiment, the converted relative address consisting of 12 bits is divided into the address signal AD and the bank signal BA as described above, but it is also possible to use only the address signal AD for all bits.

The effects obtained from the above examples are as follows. In other words, (1) The processor converts an address signal for accessing a specific module into a relative value based on a specific address and sends it out, and the module side uses the specific address based on the above reference. By converting to the original address signal and accessing the specified device, it is possible to reduce the number of address lines of the processor and the modules and devices accessed by it, as well as the number of corresponding connector bins. .

(2) Due to (11) above, the number of address signals sent out is reduced, making it possible to downsize the mounting board, and
Since the number of wiring patterns to be formed can be reduced, it is possible to achieve the effect of enabling high-density packaging of devices.

Although the invention made by the present inventor has been specifically explained based on Examples above, the present invention is not limited to the above-mentioned Examples, and it goes without saying that various changes can be made without departing from the gist thereof. Nor. For example, the address conversion circuit and the reference address circuit may be built into a microprocessor constituted by a one-chip semiconductor integrated circuit device. Further, a peripheral device or the like constructed of a one-chip semiconductor integrated circuit device may also have a structure in which an address conversion circuit and a reference address circuit like the above-mentioned memory device are incorporated.

Alternatively, the address conversion circuit and the reference address circuit may be constructed from a single-chip semiconductor integrated circuit device for a microprocessor or module.

The reference address circuit provided in the processors and modules mentioned above may be a fixed one such as an electrically writable programmable ROM (read-only memory), or a RAM, register, etc. It is also possible to use a rewritable circuit like this. In this case,
Since it is necessary to set the reference address each time the system is started, a non-volatile storage element such as EEFROM may be used. In this case, the reference address can be changed by software, and it becomes unnecessary to write the reference address to each module each time the power is turned on again after being turned off.

Further, in the case of a microcomputer system having a board configuration, the address conversion circuit and the reference address circuit may be provided for each board, and an absolute address may be supplied within the board. For example, a memory device or the like provided on a board on which a microprocessor is mounted may be provided with an absolute address from the microprocessor.

Further, when a RAM and a ROM are mounted on the same board, an address signal in an absolute format formed by a common address conversion circuit may be supplied. In this case, the number of address lines and connector pins between the boats can be reduced. In this way, from the perspective of the entire system, addressing in the relative address format and addressing in the absolute address format may be used together.

Further, the number of bits of the processor absolute address PAD, relative addresses AD, BA, etc. output from the processor CPU can be implemented in various ways depending on the processors constituting the system.

The present invention can be widely used in various microcomputer systems as a relative addressing method.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.

In other words, the processor converts an address signal for accessing a specific module into a relative value based on a specific address and sends it out, and the module side also converts the signal to a relative value based on the specific address. By converting the address signal into an address signal and accessing a designated device, it is possible to reduce the number of address lines of the processor, the modules and devices accessed by the processor, and the number of corresponding connector pins.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention. CPU: Processor, PAC: Processor address conversion circuit, PBA: Processor reference address circuit, P
AD...processor absolute address, MPBAD...processor reference address, AD...relative address, BA...
Bank (i, MAC...Memory address conversion circuit, MB
A...Memory reference address circuit, MBAD...Memory reference address, MAD...Memory absolute address, MM...
memory (device)

Claims (1)

[Claims] 1. The processor side converts an address signal for accessing a module or device into a relative address based on a specific address and sends it, and the module or device side converts the address signal for accessing a module or device into a relative address based on the above reference. A relative address access method characterized by converting an address into the original address signal. 2. The relative address access method according to claim 1, wherein the specific address used as the reference is set each time the system is started according to the module. 3. The relative address access method according to claim 1 or 2, wherein the relative address access method is used in combination with the absolute address method depending on the module to be accessed.