JPH0137075B2 - - Google Patents

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to an image recording device, for example, an image recording device that uses a recording medium having a plurality of recording tracks and is capable of recording an image signal on each recording track. Regarding.

[Prior Art] For example, by using a recording medium such as a magnetic disk or a magnetic drum that can set a plurality of magnetic tracks separately from each other, a still image signal can be magnetically recorded for each set track. Image recording devices similar to the above have already been proposed.

Such a recording device has the disadvantage that it is necessary to perform recording while rotating the recording medium, which is a magnetic disk or magnetic drum, relative to the recording head.
This is essentially different from an apparatus that records images using a photosensitive film, and stable rotation of such a recording medium is an important issue in order to perform good recording.

Conventionally, in order to perform stable recording, apparatuses that perform recording after the above-mentioned relative rotation becomes stable have been proposed in Japanese Patent Application Laid-open No. 52-40912 and Utility Model Application No. 52-95408.

However, in such a proposed device, the time lag from when an instruction to record an image is issued until when recording is actually performed greatly affects the rise time of the above-mentioned relative rotational motion.

If a method is adopted in which the motor that performs the relative rotation is constantly rotated so that the time lag can be ignored, the power consumption of the motor increases, and this is difficult to adopt in an apparatus with a limited power supply capacity.

Therefore, in view of the above-mentioned points, Japanese Patent Application Laid-Open No. 53-42517 proposes a device consisting of a two-stage switch: a first switch that starts the rotation of the motor, and a second switch that issues recording instructions. has been done.

[Problems to be Solved by the Invention] However, in the device disclosed in this publication, when the time from when the first switch that starts rotation of the motor is turned on until the second switch is turned on is very short, The first problem is that recording is not possible stably because the recording is performed before the motor rotational state reaches a recordable state, and the second problem mentioned above is that the recording is not possible while recording. When the switch was turned off, the rotational state of the motor became unstable during recording, and a second problem occurred in that stable recording could not be performed.

In particular, the second problem mentioned above is a big problem that cannot be solved conventionally, and it is difficult to perform good processing. Furthermore, it was difficult to solve both the first and second problems.

In view of these points, it is an object of the present invention to provide an image recording device that has a high power saving effect, can quickly record image signals, and can perform stable recording under any circumstances.

[Means for Solving the Problems] In order to achieve the above-mentioned object, the present invention provides a recording means for recording an image signal for each screen on a recording body, and a recording means for recording an image signal for each screen on a recording body, and a recording means that connects the recording body and the recording means when recording. A driving means for relative rotation, an operation section, and the driving means is operated in response to a first operation of the operation section, and the recording means is caused to record in response to a second operation following the first operation. The first to control
a control means for generating a recordable signal after the driving means reaches a recordable rotational state; and a generating means for preventing recording of the recording means regardless of the second operation until the enable signal is generated. At the same time, when the first operation is canceled during the recording operation of the recording means, the driving means continues to be rotationally driven until recording of the image signal for one screen being recorded is completed, and then the rotationally driving is continued. It is characterized by having a second control means for stopping.

[Examples] Examples of the present invention will be described below with reference to the accompanying drawings. The embodiment shown here is a case in which the present invention is applied to a handy camera. First, referring to FIGS. 1 to 3, the camera is indicated by CA in the figures. TL is a photographic lens, 1 is a focusing ring, and 2 is a zooming control rod. Reference numeral 3 denotes a half mirror for extracting the viewfinder light, which is arranged behind the photographing lens L in the camera body. Reference numeral 4 denotes a half mirror for taking out the photometric light, which is placed in the reflected optical path from the mirror 3, and a photometric element 5 is placed so as to receive the reflected light from the mirror 4. Reference numeral 6 denotes a total reflection mirror, and behind the mirror 6, a finder optical system having a known configuration is arranged.
7 is an eye cup for the finder. Reference numeral 8 denotes a photographic diaphragm, which is placed behind the mirror 3, and is constructed so that it is possible to cut the diaphragm. Reference numeral 9 denotes a CCD image sensor as a solid-state imaging device, and here a well-known frame transfer type two-dimensional imaging CCD is used. As will be described later, the front surface of the imaging section of the CCD 9 is equipped with a lenticular lens and a color stripe as is well known.
A filter is placed. 10 is the camera CA
In the cartridge loading chamber, as shown here,
A magnetic recording cartridge 12 rotatably housing a magnetic recording disk 11 is loaded therein.
The cartridge 12 is connected to a shaft 12 as shown in FIG.
The disk 11 is rotatably supported by a, and a camera CA is mounted in a part of the housing.
A central opening 12b for receiving the disk drive spindle 14 on the side and a slot 12c for receiving the magnetic head 15 also provided on the camera CA side are formed. As shown in FIG. 1, the disk 11 has a center hole 11a, and is rotatably supported by the shaft 12a in the center hole 11a.
The cartridge 12 has an arcuate slot 11b concentric with the cartridge 12, and is biased toward the center opening 12b by a leaf spring 13 provided inside the cartridge 12. still,
Here, as shown in FIG. 2, the loading chamber 10 is depressed at its depth, and the cartridge 12 is
When loading, please open the cartridge loading chamber cover 1.
6 is opened and inserted obliquely as shown by the imaginary lines in FIG. When the head 15 is tilted in the direction of the arrow in the figure, it is loaded in the normal position, and at this time, the tip of the head 15 comes into contact with the magnetic recording section 11c of the disk 11. A plurality of recording tracks, for example 40, can be set in this recording section 11c, separated from each other, and magnetic signals for one frame of a still image are recorded on each track, as will be described later. Further, the disk 11 itself has flexibility, and the head pressure of the head 15 can be obtained by its elasticity. Incidentally, when the loading chamber cover 16 is closed, the cartridge 12 is positioned by leaf springs 17 and 18 (shown in the second figure) attached thereto.
The disk drive spindle 14 has a drive pin 14a that can be engaged with the arcuate slot 11b of the disk 11, and is connected to the shaft 1 of the flywheel 19.
9a, the flywheel shaft 1
9a is supported by a bearing metal member 20 in a boss portion 21 of the camera frame in a manner that prevents rotational play and thrust play.
It should be noted that special attention must be paid to the problem of rattling of the shaft 19a, since it has a very large effect on recording performance.

M ₀ is a motor for rotationally driving the flywheel 19, and a rubber belt 23 is stretched between the output pulley 22 and the flywheel 19. Reference numeral 25 denotes a head holding member that holds the head 15 at a bent arm portion 25a at its tip, and is a support that is attached to a part of the camera frame along the slot 12c of the cartridge 12. being slidably obstructed along the rod 24 by a rod 24;
It is energized by a spring 26 in the direction of the arrow in FIG. It has ratchet teeth 25b formed therein. In addition, the head holding member 2
5 is displaced by the spring 26 to the final end position in the direction of the arrow in FIG.
Each element is designed so that the track corresponds to the outermost track in the recording section 11c of the disk 11. In this case, the number of teeth of the ratchet teeth 25b is, for example, 40 in accordance with the set number of tracks on the disk 11. Therefore, head 15
The total number of setting positions is 41. Numeral 27 is a ratchet feed pawl for engaging the ratchet teeth 25b and shifting the holding member 25 one tooth at a time, and is biased by a spring 28 in the direction of engaging with the ratchet teeth 25b. It is coupled to the movable armature Am of the plunger Pl. The plunger Pl is connected to the armature Am depending on its energization.
is designed to project against the spring 29 by a stroke that allows the holding member 25 to be shifted by exactly one tooth. Reference numeral 30 denotes a locking claw for holding the holding member 25 in the forwarded position, which is rotatably supported by a shaft 31 installed in a part of the camera frame. It is biased by a spring 32 in the direction of engagement with the ratchet teeth 25b. 33 is a reset member for automatically returning the holding member 25 to the initial position where the head 15 is in contact with the outermost track of the disk 11 when the loading chamber cover 16 is opened;
It has a hook portion whose head is cut into a tapered or arcuate shape, and is attached to a part of the lid 16 so that the hook portion can engage with the tail end 30b of the locking pawl 30. There is. Therefore, when the lid 16 is opened, the locking pawl 30 is rotated by the reset member 33 against the spring 32, and at this time, the feed pawl 27 also rotates at the tip of the locking pawl 30. The protrusion 27a at the tip is pushed by the head 30a, and it is rotated against the spring 28 using the ring connection point with the armature Am as a fulcrum, and both the ratchet teeth 25 are rotated.
b is disengaged, and as a result, the holding member 25 is automatically returned to the above-mentioned initial position. Note that this reset member 33 has some flexibility, and when the lid 16 is opened beyond a certain angle, the engagement with the locking pawl 30 is released, and when the lid 16 is closed, the reset member 33 releases its engagement with the locking claw 30. When the head abuts against and overcomes the tail end 30b of the locking pawl 30, the hook portion is set at a position where it can engage with the tail end 30b. Therefore, it would be a good idea to make the edge portion of the tail end 30b of the locking pawl 30 rounded as shown in FIG.
In FIGS. 1 and 3, numeral 34 is a release button, which is of a so-called two-stage release type. 35 is the grip part, and here is the power battery E.
is accommodated. Also, in Figure 1, EU is an electric circuit unit, the details of which will be described later.
Further, in FIG. 3, numeral 36 is a dial for mode selection, which can be switched to indexes "S", "C ₁ ", "C ₂ ", and "MV". Here, these indicators mean that "S" means one image shot, "C ₁ " means continuous image shot at a rate of, for example, 7.5 images per second, and "C ₂ " means, for example, one image shot per second.
``MV'' refers to a continuous image shot at a rate of about 3.75 images per second, and ``MV'' refers to a moving image shot at a rate of 30 images per second, which is the standard video recording speed. be). 37 is a slide for selecting the shift of the head 15 relative to the recording track between automatic and manual during one image shot, and can be switched between index "A" and "M";"M" indicates automatic shift, and "M" indicates manual shift. 38 is a push button for shifting the head 15 when manual shift mode "M" is selected;
It is capable of operating the plunger Pl.
It should be noted that it is clearly unreasonable to shift the head 15 manually in the case of modes "C ₁ ", "C ₂ " and "MV", so here, for example, as shown in FIG. , in modes "C ₁ ", "C ₂ " and "MV", the switching from "A" to "M" of the slide 37 is prohibited, and this switching is allowed only in the case of mode "S"; A cam 39 that automatically resets the slide 37 to the "A" position when the mode is switched to "C", "C" or "MV" while the slide 37 is in the "M" position. is provided in interlocking relation with the dial 36, so that the cam 39 faces a follower portion 40a of a pin-slot engagement plate 40 on which the slide 37 is provided. Note that 41 is a click stop spring. Furthermore, the mode symbols shown in parentheses for the cam 39 indicate the cam area corresponding to each mode.

Returning to Figure 3 again, 42 is a jack for external output of a video signal (NTSC signal), and a general VTR device can be connected here, and this is especially true when the mode is set to "MV". used. That is, the number of image frames that can be recorded on the disk 11 is only 40 at most according to the above example.
Therefore, even if you try to record a video on this disk 11 at video recording speed, it will end up being around 1 second, and even if you increase the number of tracks on the disk, there is a limit to the number of tracks, so you will not be able to use the disk after all. It is unreasonable to make a video shot in the first place, but if this jack 42 is provided for the mode "MV", long video shots will be possible depending on the combination with the VTR device, and the camera will This means that the functionality will be further expanded. 43 is a remote control jack, to which a remote controller is connected.

The above is the configuration of the main parts of this camera CA that are particularly relevant to the present invention.Next, the details of the circuit configuration of the electric circuit unit EU will be explained.

First, FIG. 5 shows the configuration of an imaging-video signal (NTSC signal) generation-magnetic recording system, where 44 is an oscillation circuit that generates a relatively low frequency clock pulse on the order of KHz, and 45 is the oscillation circuit. 46 is a synchronous control circuit that generates various synchronous control signals necessary for synchronously controlling the circuit system shown here based on clock pulses from 44;
An oscillation circuit 47 generates a relatively high frequency clock pulse on the order of Hz, and an oscillation circuit 47 generates a clock pulse from the oscillation circuit 46 and a synchronization control circuit 45.
Based on the CCD synchronous drive control signal (this is basically a vertical synchronous signal, for example),
This is a sink driver that outputs various signals necessary to synchronously drive the CCD9. Furthermore, here
As schematically shown in FIG. 6, the CCD 9 includes an imaging section (photosensitive section) 9a consisting of a large number of photosensor elements arranged in a matrix, and each pixel accumulated in the imaging section 9a. A storage section 9b that takes in the charges corresponding to the respective elements and stores them in correspondence with the addresses of each element, and an analog shift block that transfers the charges stored in the storage section 9b in time series. As is well known, all of the registers except the imaging section 9a are shielded from light, and a fifth resistor is provided in front of the imaging section 9a.
As shown in the figure, a color stripe filter 48 and a lenticular lens 49 are arranged. From the sink driver 47 to the CCD
9 includes a signal for controlling the accumulation of charges in the imaging section 9a, and a signal for controlling the accumulation of charges in the imaging section 9a. A clock pulse for transferring the charge to the storage section 9b in a very short time, and a shift register 9c to transfer the charge taken into the storage section 9b to the shift register 9c for, for example, 1/60 seconds (this is 1V- in a TV). It includes clock pulses, etc. for outputting everything in time series (i.e., reading out stored charges) during the period (corresponding to the time of one vertical scan), and the timing of these signals and pulses is is defined based on a control signal from the synchronization control circuit 45.
Although not shown in FIG. 6, it goes without saying that the charge transferred by the shift register 9c is ultimately converted into a voltage, current, or the like and output. In addition, since this type of frame transfer type CCD is already well known, further detailed explanation will be omitted.

Now, returning to Figure 5 and continuing the explanation, 5
Reference numerals 0 and 51 designate sample and hold circuits for removing noise components in the output of the CCD 9, and these circuits are controlled by a control signal (sampling signal) from the synchronization control circuit 45. 52 is a video signal (NTSC signal) generation circuit; a luminance signal output circuit 53 outputs a luminance signal Y according to the output from the sample and hold circuit 50; and a color signal R-Y according to the output from the sample and hold circuit 51. and B
A color signal output circuit 54 that outputs -Y, and signals Y, R-Y, B-Y from these circuits 53 and 54.
An encoder 55 that outputs an NTSC signal based on
As is well known, a color signal output circuit 5
4 and the encoder 55 include the synchronous control circuit 45.
A synchronization control signal is given from. Incidentally, since this type of video signal generating circuit is already well known, only the display based on the functional blocks will be given here. 56 is a magnetic recording circuit for video signals;
Filter 57, pre-emphasis circuit 58, FM
Modulation circuit 59, high pass filter 60, band pass filter 61, frequency conversion circuit 62,
A well-known configuration of a so-called color subcarrier low-pass conversion multiplex recording system consisting of a low pass filter 63, a mixing circuit 64, and a recording amplifier 65 is adopted. still,
Although the operational functions of circuits using this method are already well known, we will briefly touch on them here.
First, when an NTSC signal, that is, a composite color video signal is inputted from the video signal generation circuit 52,
From this video signal, a low pass filter 57,
A band pass filter 61 separates the luminance signal Y and the 3.58 MHz color subcarrier signal fc. The separated luminance signal Y is pre-emphasized by a pre-emphasis circuit 58, subjected to FM by an FM modulation circuit 59, and then sent to a mixing circuit 64 as an FM luminance signal with part of the lower sideband removed by a high-pass filter 60. On the other hand, the color subcarrier signal fc is sent to the frequency conversion circuit 62 and the synchronization control circuit 4
After balanced modulation with the signal fu of a predetermined frequency from 5, the difference signal, that is, the low frequency conversion color subcarrier signal fs=fu−fc is taken out by the low pass filter 63 and applied to the mixing circuit 64. , the mixing circuit 64 generates a signal (that is, a VTR signal) that is a mixture of the color signal carried on the low frequency conversion color subcarrier fs and the FM luminance signal excluding a part of the lower side band. This is then recorded on the track of the disk 11 by the head 15 through the amplifier 65.

Next, a first specific example of the sequence control system according to the present invention applied to the configuration described above will be explained with reference to FIG. In the first example shown here, as the above magnetic head 15,
For example, as shown in FIG. 8, a magnetic track on the disk 11 on which an image signal is to be recorded (hereinafter referred to as "recording") is a magnetic track that has already been recorded. A composite magnetic head consisting of a head 15A and a recording head 15B is used, and when the disk 11 rotates in the direction of the arrow in FIG. 1, the detection head 15A precedes the recording head 15B. If the track is a track that has already been recorded,
This system is designed to prevent double recording on already recorded tracks while properly recording on unrecorded tracks at all times.

In FIG. 7, SW ₂ is a switch linked to the dial 36, and is configured to be in a closed state in all modes other than the "MV" mode. Tr is a switching transistor, and SWR ₁ is a first-stage camera release switch that is turned on at the first stage of the release button 34;
Connected to the base of Tr ₁ . PMC is a photometric circuit that determines an appropriate aperture value based on the output of the photometric element 5 and the charge accumulation time of the imaging section 9a in the CCD 9. In this example, this accumulation time is
It is uniquely defined by the time factor in the control signal given to the sink driver 47 from the synchronization control circuit 45 shown in FIG. It will be a fixed time,
Therefore, in this case, the photometric circuit PMC is given fixed information regarding this time in advance.
By the way, this time corresponds to the exposure time of the film in a camera that uses general silver halide film, so this photometering circuit PMC can be used as is in the configuration of the photometering circuit in well-known film cameras. It is. Reference numeral 66 denotes an aperture drive means such as a meter or a motor that adjusts the aperture 8 to a proper aperture value in response to the output of the photometric circuit PMC, and its output shaft is connected to the aperture 8. still,
As mentioned above, the aperture 8 in this case has a so-called aperture cut configuration (the purpose of this is to prevent so-called "burn-in" of the CCD 9). For example, when a meter is used as the diaphragm driving means 66, a spring is applied to the movable coil so that the diaphragm 8 is held in a fully closed state when the coil is not energized. In addition, when using a motor, a power storage means such as a capacitor is connected to it, and when the output from the photometric circuit PMC is cut off, the power stored in this power storage means is saved. It would be good if the aperture 8 could be forcibly driven to close down the aperture 8 depending on the given condition.

Reference numeral 67 denotes a scale member for displaying the aperture value, which is driven together with the aperture 8 by the aperture driving means 66, and is, for example, a scale member with an aperture value scale marked on a transparent film, and is placed at a visible position within the camera viewfinder. The aperture value at which the diaphragm 8 has been adjusted is displayed depending on the coincidence of the scale with the fixed index 63. La ₁ is the scale member 67
It is a lamp for illuminating from behind, and is connected to the output stage of transistor Tr ₁ , and is powered and lit when transistor Tr ₁ becomes conductive.
Therefore, in addition to illuminating the scale member 67, it also functions to display that the release button 34 has been pressed down to the first stage. MCC is a motor control circuit for controlling the constant speed rotation of the motor _M0 , _SW2 is a switch that is connected to the dial 36 and is only turned on in modes " _C1 " and " _C2 ", and OSP is a This is a one-shot pulse circuit that outputs a momentary high pulse when powered by the conduction of transistor _Tr1 , and this pulse is flipped through OR gate _OG1 .
OR gate to reset input R of flop _FF1
It is applied via OG ₂ to the set input S of flip-flop FF ₂ and via the OR gate OG ₂ to the reset input R of flip-flop FF ₃ . SWR ₂ is a release switch that is turned on at the second stage of the release button 34, and its ON-
The OFF signal is applied to the set input S of the flip-flop _FF1 via the differentiating circuit DFC and the inverter _IV2 . Note that flip-flop FF ₁ is set only after switch SWR ₂ is turned on and its output becomes low, and this output is applied to the base of transistor Tr ₁ , so the release button 34 is pushed down to the second stage, the holding of transistor Tr ₁ becomes stiff,
Even if the press of the release button 34 is immediately released, the transistor Tr ₁ does not become non-conductive, and as will be described later, the switch SWR ₂ is turned off and the detection head 15A detects the general recording track. When this occurs, this holding is released and the circuit becomes non-conductive.

DLC is a delay circuit having a delay time corresponding to the time (50 to 100 msec) required for the motor _M0 to start up, and its output is applied to the AND gate _AG1 .

CNT ₁ inputs the vertical synchronizing signal (FIG. 10a) from the synchronization control circuit shown in FIG. , c and d are output.

AG ₅ is an AND gate that takes the AND of the above A output and B output, and its output is as shown in Figure 10e, and AG ₆ is an AND gate that takes the AND of the above A, B, and C outputs. The output is as shown in FIG. 10f. Now, if the synchronization of the input shown in Figure 10a is 1/30sec, the period of the A output will be 1/15sec, and with the AND gate,
Since the high level time of the AG ₅ and AG ₆ outputs and the A output is 1/30 sec, each output can be used as a recording control signal in modes "S", "C ₁ ", and "C ₂ ", respectively. And, with these output A and the AND gate, the output of AG ₅ and AG ₆ is the dial 3.
The mode "S", "C ₁ ", and "C ₂ " are respectively selected by the switch SW linked to the switch SW 6. In addition, the counter selected by this switch SW ₃
The output of the CNT ₁ is provided between the output stage of the imaging/video signal generation/magnetic recording system circuit 69 configured as shown in FIG. 5 (i.e., the amplifier circuit 65 shown in FIG. 5) and the recording head 15B. analog recording control
It is attached to the switch ASW, and recording is controlled by this. Further, the clear terminal CL of the counter _CNT1 is provided with the Q output of the flip-flop _F2 , and counting is possible only when this Q output is low.

La ₂ depends on the transistor Tr ₂ which receives the Q output of the flip-flop FF ₂ at its base.
This lamp lights up when the output is low, that is, when the counter CNT ₁ is counting, to indicate that recording is being performed.

AP is an amplifier that amplifies the output of the detection head 15A, HIC is a signal integration circuit that integrates the signal output from the amplifier AP, and COM is a comparator.
The output of the comparator COM is high for a recorded track and low for an unrecorded track, which is connected to the AND gate AG ₃ and the OR gate.
Assigned to gates OG ₁ , OG ₂ and OG ₃ . Further, the inverted signal of the output of the comparator COM is applied to AND gates _AG1 and _AG2 .

CNT ₂ is a counter that receives the clock pulse from the 5th oscillation circuit 44 shown in the figure and divides the frequency thereof, and by giving two appropriate outputs thereof to AND gate AG ₄ , drives the plunger Pl. I am trying to obtain a pulse with a duty that is sufficient for this purpose. The output of the AND gate _AG4 is applied to the AND gate _AG3 , and the output of the AND gate _AG3 is applied to the base of the transistor _Tr3 .

La ₃ is a lamp that lights momentarily to indicate this when a track has already been recorded in mode "S-M", that is, 1 image shot - manual head shift mode. 37
It is connected to the collector side of the transistor Tr 3 in mode "M" by the switch SWM ₁ interlocked with the transistor Tr ₃ .

In addition, the switch SWM ₁ connects the plunger Pl to the collector of the transistor Tr ₃ in mode "A". SWP is the above-mentioned
The push switch SWM ₂ , which is turned on by the button 38, is a switch that connects the switch SWP to the plunger Pl in mode "M" in conjunction with the slide 37.

In addition, the jack 42 for external output of the above NTSC signal
is connected to the circuit 69, ie, more specifically, to the output stage of the video signal generating circuit 52 shown in FIG.
In addition, the remote jack 43 is as shown in the figure.
Switch SWR ₁ via diode D ₁ , D ₂ ,
Connected in parallel with SWR ₂ .

SWE is a normally closed end switch that is opened when all tracks on the disk 11 have finished recording, and is connected in series with the transistor _Tr1 . Incidentally, it would be reasonable to use the configuration shown in FIG. 9, for example, as a configuration for activating this end switch SWE. That is, in the illustrated configuration, the tail end is attached to a part of the camera frame as the axis 70.
A track count member 72 is pivotally attached to the head holding member 25, and a pin 71 set on the head holding member 25 is engaged with a slot 72a in the middle thereof, thereby swinging in response to the feeding of the holding member 25. established,
A pointer 73 attached to the tip of the counting member 72
This allows the number of recorded tracks to be displayed on the track number scale plate 75 disposed in the window 74, and furthermore, the holding member 25 is moved to the left in the figure by the total number of its ratchet teeth 25b. At the point when the counting member 7 is shifted inward, that is, when the recording portion 11c of the disk 11 has left the track of the innermost circumference and is further shifted inward by one tooth, the counting member 7
The end switch SWE can be opened by a switch opening protrusion 76 at the tip of the end switch SWE.
In addition, the power supply to the circuit system shown in Figure 5 is from the photometry circuit.
Like the PMC, it is controlled by the transistor _Tr1 .

Now, next, the operation of the camera having the above electrical system configuration will be explained. As mentioned above, this camera has two modes: "S-A" (single image shot - automatic head shift) and "S-M".
(1 image shot - manual head shift), "C ₁ "
There are five modes: (continuous shots at 7.5 images/second), "C ₂ " (continuous shots at 3.75 images/second), and "MV" (video shots depending on the VTR speed using a VTR device). However, in order to facilitate understanding, the case of mode "SA" will first be explained with reference to the timing chart of FIG.

First, the camera CA is loaded with a cartridge 12 in which all tracks on the disk 11 are unrecorded (at this time, the head 15 is set at its initial position as described above, and therefore end switch SWE is also on), and the dial 36 is in the "S" mode position, switch SW ₁ is in the closed state, SW ₂ is in the open state, and switch SW ₃ is in the counter state.
Connected to the A output terminal of CNT ₁ . Further, when the slide 37 is set to the "A" mode position in this state, the switch SWM ₁ is connected to the plunger Pl side, the switch SWM ₂ is opened, and the camera CA becomes the "S-A" mode.

In this state, while looking through the viewfinder, the camera CA
Aim the camera at the desired object and press the release button 34 to the first step to release the release switch.
Since SWR ₁ is turned on, transistor Tr ₁ becomes conductive, and therefore, the photometric circuit PMC is activated and the aperture 8 is turned on.
When the aperture value is adjusted from the fully aperture state to the appropriate aperture value, the lamp La ₁ is turned on to illuminate the scale plate 67, and the motor M ₀ is started to rotate the disk 11. This situation is the first
1 a, b, d-f. Furthermore, when the transistor _Tr1 becomes conductive, the one-shot pulse circuit OSP outputs a pulse as shown in _FIG .
Flops FF ₁ and FF ₂ are reset and set, respectively, and their Q and Q outputs are shown in Figure 11h and i.
It becomes high as shown in .

On the other hand, when the transistor Tr ₁ becomes conductive, power is supplied to the circuit system shown in FIG. 5 to start driving the CCD 9.
Imaging - video signal generation - VTR signal output starts. At this time, the synchronous control circuit 45
Since then, a vertical synchronizing pulse as shown in FIG. 11k is applied to the counter CNT ₁ .
Since the Q output of flip-flop FF ₂ is low, CNT ₁ is locked in a clear state, that is, in a non-counting state, and does not count any of the pulses, so its A output is shown in FIG. It's low and the analog switch ASW remains off. Also, at this time, the counter
A clock pulse is now applied to CNT ₂ from the oscillation circuit 44. Furthermore, when the time required for the motor _M0 to rise to a steady speed has elapsed after the conduction of the transistor _Tr1 , the output of the delay circuit DLC becomes high, as shown in FIG. AT AND GATE AG ₁ of 1
Input goes high.

Also, at this time, since the disk 11 is completely unrecorded, no signal appears in the output of the detection head 15A, so the output of the comparator COM is low as shown in Figure 11n. . Therefore, the plunger Pl is not energized and the head 15
A, 15B are initial positions, that is, disk 1
It is held at a position in contact with the outermost track in the recording section 11c of No. 1. Also, inverter IV ₁
One input of AND gate AG ₁ becomes high depending on the output of .

Now, when the release button 34 is pressed down to the second stage in this state (as shown in FIG. 11a), the release switch SWR ₂ is turned on as shown in FIG. 11c, and the inverter
The output of IV ₂ is inverted from low to high, so flip-flop FF ₁ is set, and at this time the output of AND gate AG ₂ is high, so that the AND signal is applied to the set input S of flip-flop FF ₃ . The output of gate AG ₂ is applied to set the flip-flop FF ₃ and its Q output goes high as shown in FIG. 11m. According to this and gate
Since all three inputs of AG ₁ are high, its output is high at this point, and therefore the Q output of flip-flop FF ₂ is inverted low as shown in Figure 11i, so that the counter CNT ₁ is cleared and starts counting input pulses.

Incidentally, when the output of the inverter _IV2 is reversed from low to high, the flip-flop _FF1 is set and its output becomes low as shown in Fig. 11h.
Therefore, since the transistor Tr ₁ is kept conductive, even if the release button 34 is released at this point, the power supply to the circuit system is not cut off and the following operation continues.

Now, when the counter CNT ₁ starts counting its input pulses and its A output goes high as shown in Figure 11l, this causes the analog switch to
When the ASW is turned on, the output of the fifth amplifier circuit 65 shown in the figure is applied to the recording head 15B, so that a signal for one frame of the target image is magnetically recorded on the outermost track of the disk 11. . Here, the A output at this time is the 10th output in this embodiment.
As explained with reference to the figure, the frequency of the vertical synchronization signal (FIG. 10a) from the synchronization control circuit 45 is divided by 2, and the high level time is one period of this vertical synchronization signal, that is, 1 / 30 seconds, while
In the circuit system shown in FIG. 5, as is well known, the reading of the CCD output is repeated twice in this 1/30 second period.
The signal of field-1 frame will be magnetically recorded. Also, for this reason, the motor control circuit is designed here to control the motor _M2 at a constant speed of 1800 rpm.

In this way, when 1/30 second elapses after the A output of the counter CNT ₁ becomes high, the A output becomes low again and the analog switch ASW turns off.
During this time, one frame worth of signals is recorded on the track of the disk 11 using the two-field method, but as described above, the detection head 15
Since the detection head 15A is provided in advance of the recording head 15B, when one frame of recording is completed, the detection head 15A picks up the magnetic signal recorded by the recording head 15B, and therefore detects the magnetic signal recorded by the recording head 15B. Since the signal component begins to appear in the output, at this point the output of the comparator COM becomes high as shown in Figure 11n, and as a result, the output of the inverter IV ₁ becomes low, so that the output of the AND gate AG ₁ becomes high. Output goes low. Also, due to the high output of the coparator COM at this time, the flip-flop _FF2 is set and its Q output becomes high as shown in FIG. 11i. As a result, the counter CNT ₁ is cleared and is restricted to a non-counting state, so its A output remains low after the end of recording, as shown in Figure 11l, and the analog switch ASW
remains off. Also, comparator COM
When the output of becomes high, the output pulse from the AND gate AG ₄ is applied to the base of the transistor Tr ₃ through the AND gate AG ₃ , so that the transistor Tr ₃ becomes conductive and the plunger Pl conducts. Since the head holding member 25 is moved by one tooth of its ratchet teeth 25b by the second shown feeding pawl 27, the heads 15A, 15B are shifted to the second track of the disk 11, and here. Now, since disk 11 is completely unrecorded, heads 15A and 15B
When the shift to the second track is performed, the output from the detection head 15A loses its signal, so the output of the comparator COM becomes the first track.
As shown in FIG. 1n, at this point it becomes inverted to low.

Furthermore, when the output of comparator COM becomes high,
Flip-flop _FF3 is reset. or,
When the output of the comparator COM goes high, the flip-flop _FF1 is reset and its output goes high as shown in FIG. 11h, so that the conductivity of the transistor _Tr1 is released. Therefore, at this point, the release button 34 has been released and the release switch SWR ₁ ,
If SWR ₂ is off, transistor Tr ₂ becomes non-conductive and power supply to the entire circuit system is cut off. Also, regarding the timing to release the press of the release button 34, for example, as shown in FIG. 11a, after pressing the release button 34 to the second step,
That is, once the switch SWR ₂ is turned on, the conduction of the transistor Tr ₁ is maintained by the action of the flip-flop FF ₁ as described above.
The camera automatically performs the above operations to
5A and 15B, it stops when it finishes shifting to the second track.
As shown in the figure, if the first stage is pressed but the second stage is not pressed before the release is released, this transistor Tr ₁ is not maintained conductive, so the camera is activated when the release button 34 is released. It will stop.

Although the explanation is complicated, while the Q output of flip-flop FF ₂ is low, that is,
During recording, the transistor Tr ₂ becomes conductive, causing the lamp La ₂ to light up, thus displaying that recording is in progress. In addition, this lamp La ₂ is
It would be convenient to arrange the lighting so that it can be visually recognized within the viewfinder.

In this mode "S-A", the camera is 1
After the recording of frames is completed, the heads 15A, 15
B is stopped or on standby with an automatic shift to the next track being performed, and therefore, the above-mentioned operation is repeated every time the release button 34 is pressed down to the second stage. Then, disk 1
One frame worth of image signals is sequentially recorded on each track.

The number of recorded tracks at this time is sequentially indicated on the track number scale plate 75 by a pointer 73 attached to the tip of the counting member 72 shown in the ninth figure. Further, when the recording of the innermost track of the disk 11 is completed and the heads 15A, 15B are automatically shifted, the end switch SWE is opened by the protrusion 76 at the tip of the count member 72.
The power supply to the entire circuit system will be temporarily cut off.

Now, the above is a case in which no recording has been made on the disk 11 at all, but if, for example, a cartridge in which recording has already been done up to the middle track is loaded, the situation will be as follows. That is, first, if the first track of disk 11 is already recorded, the switch SWR ₁
Since the output of the comparator COM becomes high when the motor _M0 is turned on and the motor M0 starts, recording is prohibited as described above, and the plunger
Pl is energized and the heads 15A, 15B are shifted to the next track. Also, at this time, the output of inverter IV ₁ becomes low, so even if flip-flop FF ₁ is set at this time, that is, even if switch SWR ₂ is closed, its output remains low. Therefore, flip-flop _FF3 is not set. On the other hand, head 15
If the new track is unrecorded when A and 15B are shifted, the comparator
Since the output of COM becomes low, recording prohibition is canceled, and the output of AND gate AG ₂ becomes high and flip-flop FF ₃ is set, so one frame is recorded as described above. signal is recorded on this new track, but if this new track is also a previously recorded signal, the comparator
Since the output of COM remains high, the heads 15A and 15B are further shifted to the next track while recording is prohibited.

Therefore, if a cartridge is used in which some of the tracks have already been recorded, recording will be prohibited for the already recorded tracks, and heads 15A and 15B will be automatically shifted without double recording. Then, when an unrecorded track is detected, recording is started on the unrecorded track.

Now, the above was for the case where the mode is "S-A", but next, in the case of the mode "S-M", that is, one image shot - manual head shift, the slide 37 is moved to the "M" position. Switch by switching
Since SWR ₁ is switched from the plunger Pl side to the lamp La ₃ side and the push switch SWP is connected to the plunger Pl via the switch SWM ₂ , the tracks that the heads 15A and 15B are facing are already recorded. Even if this is detected, the heads 15A, 15B are not automatically shifted to the next track, but instead, the lamp La ₃ lights up momentarily to indicate that the adjacent track of the heads 15A, 15B has already been recorded. A warning will be displayed. In this case, by pressing the push button 38 and turning on the switch SWP, the head 15A,
15B can be shifted to the next track.

Therefore, in this mode "S-M", if the contact tracks of the heads 15A and 15B are not recorded from the beginning, recording is performed in the same manner as described above by the camera release. Also, even if the output of the comparator COM becomes high at the end of this recording, the lamp La ₃ will only turn on for a moment and the heads 15A and 15B will not be shifted to the next track.
The shift is performed by turning on the push switch SWP. On the other hand, head 15A, 1
If the track connected to 5B has already been recorded from the beginning, lamp La ₃ will light up momentarily, so if you turn on the switch SWP now, heads 15A and 15B will be shifted to the next track, and this track will become unrecorded. If so, it will be recorded on this unrecorded track. Of course, if this track has already been recorded, the lamp will
La ₃ lights up again momentarily to warn you, so in the end,
The warning is repeated by lighting the lamp La ₃ until the heads 15A and 15B reach the unrecorded track.
It is not until the heads 15A, 15B reach the unrecorded track by repeatedly pressing the push button 38 that recording begins on the unrecorded track.

Next, in the case of mode "C ₁ " or "C ₂ ", that is, in the case of continuous image shots, the switches SW ₁ to _{SW 3} are switched by switching the dial 36 to the mode "C ₁ " or "C ₂ " position. In either case, the mode is switched to the "C ₁ " or "C ₂ " terminal.

Therefore, the differentiator circuit DFC is short-circuited by the switch SW ₂ , and while the switch SWR ₂ is on, the flip-flop FF ₁ remains set, and therefore the release button 34 remains set.
While pressing up to the second step, the heads 15A, 15
As long as the contact track B is an unrecorded track, recording is not prohibited and recording continues and continuous image shots are performed. Of course, in this case, as can be understood from the operation in mode "S-A" mentioned above, if there is a recorded track on the way,
As soon as this recorded track is detected, the output of the comparator COM goes high, so flip-flop FF ₂ is set and the counter
When CNT2 is cleared (that is, recording is prohibited), the plunger Pl is energized and the heads 15A, 1
5B is automatically shifted to the next track, and if this track is unrecorded, recording will be performed on that track. This operation continues as long as the release button 34 is pressed down to the second position. In addition, transistor Tr ₁
The conduction is maintained in the same way as in the above case.
Also, in the case of mode "C ₁ ", A and gate
When the output of AG5 is in the mode "C ₂ ", the output of the AND gate AG6 is selected by the switch _SW3 , but as explained with reference to FIG. _7.5 images/
It becomes a continuous shot of 3.75 images/second in the case of mode "C ₂ ".

By the way, this camera has an external output jack of 42.
When a general VTR device is connected to the , and dial 36 is set to mode "MV", the normal VTR speed,
That is, it is possible to shoot moving pictures at a speed of 2 fields - 30 frames/second. That is, dial 36
When set to mode "MV", switch SW ₁
~ SW ₃ are all switched to their mode “MV” terminals, so in this case, release button 3
Follow 4 to the first step and press the switch.
Simply turning on SWR ₁ activates the circuit 69 and outputs an NTSC signal from the jack 42, which causes magnetic recording in the VTR device in a well-known manner.

Next, a second specific example of the sequence control system according to the present invention will be described with reference to FIG. In the second example shown in FIG. 12, one magnetic head is used both for detecting recorded tracks and for recording, and its operation mode is switched as appropriate using the output of the counter _CNT1 . This allows the control system to function in exactly the same way as the control system shown in FIG.
In the figure, elements designated by the same reference numerals as in FIG. 7 are completely the same as those described above, and therefore, only the parts that are different from the configuration shown in FIG. 7 will be explained here. In the figure, 15' is a magnetic head for detection and recording, and is connected to the analog switch described above.
An analog signal provided at the input stage of the ASW and the unrecorded track detection circuit (i.e., amplifier AP, signal integration circuit HIC, and comparator COM).
The analog switch ASW' is connected to an inverter IV of the signal to be applied to the analog switch ASW'.
4 is provided. Therefore, according to this circuit configuration, when the output of counter CNT ₁ is low, the analog
Switch ASW' is turned on and head 15' is not turned on.
It is used to detect recorded tracks, and at this time unrecorded tracks are detected and the counter is
When the output of CNT ₁ becomes high, the analog switch ASW is turned on and the head 15' becomes used for recording on the unrecorded track. The other details of the operation are exactly the same as those of the circuit system shown in FIG. 7, so a description thereof will be omitted.

Now, in all of the embodiments shown above, the heads are mechanically shifted with respect to the tracks of the disk 11, but in the end, the magnetic heads are shifted to a multi-track position corresponding to the number of tracks on the disk 11.
This section describes an embodiment in which this is fixedly provided as a channel head, and by sequentially switching channels, it is possible to determine whether each track is unrecorded or recorded, and to record on unrecorded tracks. This will be explained with reference to FIGS. 13 and 14. Note that Figures 13 and 14 only show the configuration of the main parts to obtain the above functions, and other necessary parts are the same as those in Figures 7 and 12. Explain using

First, the example shown in Fig. 13 is for the configuration shown in Fig. 7. In the figure, CNT ₃ is a counter with a built-in decoder for channel shift, and its clear terminal CL has the one shot The output of the pulse circuit OSP is provided.
IV5 is an inverter for obtaining an inverted signal of the output of the one-shot pulse circuit OSP;
OC is a one-shot circuit that is triggered by the rising edge of the output of the inverter IV5, and OG4 is an AND gate with the output of the one-shot circuit OC.
An OR gate configured to receive both the Q output of AG3 and the output of the OR gate OG4 as a count up _clock.
It is designed to be applied to the clock input terminal CK of the circuit.

_15A1 to 15An are fixedly provided so as to correspond to each track of the disk 11, respectively.
The recorded track detection heads _15B1 to 15Bn are recording heads fixedly provided in correspondence with each track, and these are so-called multi-track recording heads.
It is configured as a channel head, and
As in the case of the head 15 shown in FIG. 8, when the disk 11 rotates, the detection heads 15A ₁ to 1
5An is integrated and arranged so that it always precedes the recording heads _15B1 to 15Bn. ASW′ ₁ to ASW′n are each head 15A ₁ to 1, respectively.
5An is the analog switch connected to the input stage of the above-mentioned unrecorded track detection circuit,
That is, it is connected to the amplifier AP. ASW ₁ ～
ASWn is an analog switch connected to each head _15B1 to 15Bn, and each of them is an analog switch connected to each head 15B1 to 15Bn.
It is connected to the output stage of the video signal generation/magnetic recording system circuit 69. AND ₁ to ANDn are ANDs of the A output of the counter CNT ₁ selected by the switch SW ₃ or the output of the AND gate AG5 or AG6, and each output 1 to n of the counter CNT ₃ . - Gates, the output of each of which is given to an analog gate ASW ₁ to ASWn, respectively. In addition, analog switch ASW′ ₁ ~
ASW′n has outputs 1 to n of counter CNT ₃ , respectively.
will be granted.

According to the above configuration, first, in the first stage of the release, the one-shot pulse circuit OSP
As shown in Figure 1g, when a one-shot pulse is output, the counter CNT ₃ receives a power signal.
When the UP/CLEAR is completed, each of the outputs 1 to n become low. Next, inverter IV at this time
One shot circuit depending on the output rise of 5
When OC is triggered and a one shot pulse is output, this causes the counter CNT ₃ to count up by one and its output 1 goes high first. Therefore, if the mode is set to "C ₁ " or "C ₂ " and the output of counter CNT ₁ is low, the analog switch
Only ASW'1 is turned on, and the output of the detection head _15A1 is applied to the amplifier AP. and,
If the first track where heads 15A ₁ and 15B ₁ are in contact with each other is unrecorded, the counter
Since the output of CNT ₁ goes high, the AND gate
The output of AND1 goes high, so that recording head _15B1 starts recording on the first track. When this recording is finished and the detection head _15A1 detects that it has already been recorded,
In the same way as above, the Q output of AND gate AG3 goes high, which causes counter _CNT3 to count up by one, and output 2 goes high this time, so this time the analog switch
Since ASW'2 is turned on, the detection head 15A2
It is detected whether or not the second track is unrecorded, and if it is unrecorded, the second track is recorded by the recording head 15B2 when the output of the counter _CNT1 becomes high in the same way as described above. Recording will now begin. Also, if it has already been recorded, the output of AND gate AG3 goes high, so the counter CNT ₃ counts up by one and its output 3 goes high, so that the output for the third track is The above detection is performed and the mode is "C ₁ " after all.
Alternatively, in the case of "C ₂ ", recording to the unrecorded track will be repeated as long as the release button 34 is pressed, as in the case of the previous embodiment.

In addition, when the mode is "S", after recording to the unrecorded track is finished, the Q output of AND gate AG ₃ becomes high, and the counter CNT ₃ is incremented by one, and the flip is started.・Flop
The camera is stopped by the action of FF ₃ , and when the release button 34 is released and then pressed again, the detection heads start from detection head _15A1 until an unrecorded track is detected. When channels 15A ₁ to 15An are switched and an unrecorded track is detected, recording is performed using the recording head corresponding to this track.

The example shown in FIG. 14 is for the configuration shown in FIG. 12, and the head 1 in the configuration shown in FIG.
5A ₁ to 15An and 15B ₁ to 15Bn are shown as 1 in the figure.
As shown by 5' ₁ to 15'n, analog switches ASW' ₁ and ASW ₁ , ASW' 2 and ASW ₂ . . . ,
Connect to ASW'n and ASWn to create a multi-channel head for both detection and recording.
Each counter is selected by switch SW ₃ .
Invert signal and counter of A output of CNT ₁ or output of AG ₅ or AG ₆ by inverter IV ₆
AND with each output 1 to n of CNT ₃ .
Gates AND′ ₁ to AND′n are provided, and each output of the AND gates AND′ ₁ to AND′n is analog
The switches ASW′ ₁ to ASW′n are attached to the switches ASW′ 1 to ASW′n.

Note that the operation when the configuration shown in FIG. 14 is used in a relaxed manner can be easily understood from the explanation of the circuit configuration shown in FIGS. 12 and 13, so a description thereof will be omitted.

According to the structure shown in FIGS. 13 and 14, no mechanical structure for head shifting as shown in FIG. 2 is required. Furthermore, when adopting this configuration, it is inconvenient to provide a configuration for switching between "A" and "M", that is, a slide 37, a push button 38, and switches SWM ₁ , SW ₂ , and SWP. Probably. Incidentally, in this case, if the lamp La ₃ is connected to the collector of the transistor Tr 3, the count up of the counter CNT ₁ , that is,
The state of channel switching of the heads 15A ₁ to 15An and 15B ₁ to 15Bn is displayed.

In order to display the number of recorded tracks when the configuration shown in Figs. 13 and 14 is adopted, for example, as shown in each figure, a display unit DU consisting of a decoder, a driver, and a seven-segment LED for display is used. It may be possible to provide a digital display by providing the outputs 1 to n of the counter _CNT3 to the decoder in the display unit DU, or alternatively, a It would be better to display the number of dots using an LED dot array display. Particularly in this case, it is convenient to display the image within the camera viewfinder.

Further, as a configuration for controlling the end switch SWE, for example, the counter CNT ₃
A transistor Tr4 with an electromagnet Mg connected to its collector side as shown in the figure is connected to the n+1st output terminal of the transistor Tr4.
It would be better to connect the base of , and when this n+1 output goes high, the electromagnet Mg is energized, thereby opening the end switch SWE.

In the embodiment described above, the recording means for recording the screen signal for each image on the recording medium is the head 15 for recording on the disk 11,
The driving means for relatively rotating the recording body and the recording means during recording is a motor _M0 that rotates the disk 11, and the operating section is a release button 34, and the release button 34 is used as the operating section. actuating the drive means to perform a second operation following the first operation;
a first control means that controls the recording means to perform recording in response to an operation of a switch that is turned on by pressing the release button in the first step;
Flip-flops FF1, FF2, FF3, and counter CNT ₁ , which supply power to the motor control circuit MCC according to SWR 1, and whose states change according to switch SWR ₂ , which is turned on when the release button is pressed to the _second step. , analog switch ASW, etc.

Further, in this embodiment, the generating means for generating a recordable signal after the driving means reaches a recordable rotational state is a timer DLC that outputs a signal to the AND gate AG shown in FIG. 7.

Further, until the enable signal is generated, the second
The recording of the recording means is prevented regardless of the operation of the recording means, and the first
In the embodiment, the second control means continues to rotate the driving means until the recording of the image signal for one screen is completed when the operation is released, and then stops the rotational driving. AND gate AG1 and comparator COM connected to the reset input terminal R of flip-flop FF2 shown in FIG.
It is composed of a transistor Tr1 and the like driven by a flip-flop FF1 to which a recording discrimination signal from the FF1 is inputted via an OR gate _OG1 .

[Effects of the Invention] As explained above, according to the present invention, the power saving effect is high, and image signals can be recorded quickly and stably to the end in any case. .

[Brief explanation of drawings]

FIG. 1 is a transparent perspective view of the main parts of a camera incorporating an embodiment of the device of the present invention, FIG. 2 is a cross-sectional view of FIG. 1, and FIG. 3 is a cross-sectional view of FIG. 1. −
4 is a plan view of essential parts showing the related structure of the mode select dial and mode select slide shown in FIG. 3, and FIG. 5 is an imaging-video signal applicable to the device of the present invention. A block circuit diagram showing the basic configuration of an example of a generation/magnetic recording system circuit, FIG. 6 is a schematic diagram of a CCD image sensor as a solid-state image sensor employed in the circuit shown in FIG. FIG. 8 is an enlarged perspective view of the main parts showing details of the configuration of a magnetic head suitable for the circuit shown in FIG. 7, and FIG. suitable for the circuit shown,
FIG. 10 is a transparent perspective view of the main part showing the configuration for displaying the number of recorded tracks; FIG. 10 shows the relationship of the output signal to the input signal of the counter for outputting the recording control signal in the circuit shown in FIG. 7; 11 is a timing chart showing the output relationship of the main circuit sections of the circuit shown in FIG. 7 in mode "S" (one image shot);
The figure shows the second configuration of the electric circuit system in the device of the present invention.
FIG. 13 is a circuit diagram showing a specific example of the circuit shown in FIG. 12, and FIG. 14 is a circuit diagram showing a modified example of the circuit shown in FIG. FIG. 3 is a circuit diagram showing the configuration of main parts related to the change. 11... Recording body (magnetic disk), 11c...
Recording section where recording tracks are set, 36, SW ₁ ~
SW ₃ ...Mode switching means (mode select
(dial and interlocking switch), 43... Jack for external output of NTSC signal, 52... NTSC signal generation circuit, 15A; 15A ₁ to 15An... detection head, 15B; 15B ₁ to 15Bn... recording head,
15';15'1 to 15'n... Heads for both detection and recording.

Claims (1)

[Scope of Claims] 1. A recording means for recording an image signal for each screen on a recording body, a driving means for relatively rotating the recording body and the recording means during recording, an operation section, and an operation section for the operation section. a first control means that operates the driving means in response to a first operation and controls the recording means to perform recording in response to a second operation following the first operation; generating means for generating a recordable signal after the rotation state is in a recordable state; and until the enable signal is generated, the recording means is prevented from recording regardless of the second operation, and the recording means is in the recording operation. a second control means that continues to rotate the drive means until recording of the image signal for one screen being recorded is completed when the first operation is canceled, and then stops the rotation drive; An image recording device comprising: